JPH01120672A - Production system for circuit connection information - Google Patents

Abstract

PURPOSE:To obtain accurate pin mutual connection information by tracking and searching successively and automatically connection among input and output pins. CONSTITUTION:One of output pins serving as function symbols and a signal line/input pin searching means 41 searches an input pin including said extracted output pin and a signal line. When a normal line is searched by a connection rule violation detecting means 42, the means 41 searches again a signal line including said normal line. When an input pin is searched by the means 41, the information is outputted to show that the searched input pin and the extracted output pin are connected to each other.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a circuit connection information generation system, and in particular to circuit diagram information in which each input/output pin and signal line of a circuit diagram composed of a plurality of circuit function symbols is represented as coordinate information. This invention relates to a circuit connection information creation method for generating connection information between input and output pins between functional symbols.

Prior Art Conventionally, in order to extract and generate connection information between input and output pins between functional symbols from circuit diagram information expressed as coordinate information, the designer himself checked for overlaps and disconnections in signal lines and looked at the drawings. This is done by sequentially tracing each connection. Therefore, there are disadvantages in that mistakes occur and the burden of man-hours increases.

Purpose of the Invention Therefore, the present invention has been made to solve the above-mentioned drawbacks of the conventional technology.The purpose of the present invention is to determine mutual relationship between input and output pins of a circuit function symbol from graphical information expressed in coordinates. An object of the present invention is to provide a circuit connection information generation method that can generate connection information dynamically and accurately.

Structure of the Invention According to the present invention, connections between input and output pins of the functional symbols are determined from circuit diagram information in which each input/output pin and signal line of a circuit diagram composed of a plurality of circuit function symbols is expressed as coordinate information. A circuit connection information generation method for generating information, the method comprising: a search means for searching for a signal line including one extracted signal line or output pin and an input pin using coordinate values; connection rule violation detection means for detecting and eliminating error lines that violate predetermined connection rules;
One of the output pins of the functional symbol is extracted and the search means searches for input pins and signal lines including this output pin, and when the connection rule violation detection means searches for a normal line, the search means again searches for a normal line. A signal line and an input pin including this normal line are searched based on this normal line, and when the input pin is searched by the searching means, information indicating that this input pin and the extracted output pin are interconnection pins. A circuit connection information generation method is obtained, which is characterized in that it outputs.

Example Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a system block diagram of an embodiment of the present invention.

In the figure, 1 is an input/output device that performs input/output processing of various data, 2 is an arithmetic processing device that processes these various data and controls the circuit connection information generation mechanism 4 according to a predetermined program, and 3 is an input/output device that performs input/output processing of various data. A data storage device 4 that stores data necessary for data processing and control processing is a circuit connection information generation mechanism that is the basic configuration of the embodiment of the present invention, and is realized by software or hardware.

The circuit connection information generation mechanism 4 includes a signal line and input pin search means 41, a connection rule violation detection means 42, an output information generation means 43, and a branch point detection means 44.

The signal line and input pin search means 41 searches for a signal line or input pin including one extracted signal line or output pin using coordinate values.
Two methods are used, shown in FIG.

Figure 3 shows the pinpoint method, and (A) shows the end point coordinates (xi, l) of output pin a of symbol A and line 12.
Looking at the relationship with the end point coordinates (x2, y2), xl
=x2 and yi=y2, it is determined that two points are connected. (B) and (C
) is determined by the coordinates of each end point of one line 13 and 14 (
If there is a relationship similar to A), it is determined that both lines are connected.

Figure 4 shows the range method, and (A) shows the coordinates of the end point of output pin a of symbol A (xl, yl) and the coordinates of the start and end points of line 15 (x3, y3), (x4゜y4)
The relationship between xl = x3 = x4, y3≦y1
If ≦y4, it is determined that the two are connected. (B) shows two lines 15.1
6, and is the same as method (A). (C) is an example where the two lines 15.16 are orthogonal and are not connected simply by crossing, because the coordinates of all the end points of both lines 15.16 are not equal. , it is determined that there is no connection.

The connection rule violation detection means 42 detects an error line that violates a predetermined connection rule.
Judgment is made based on the example of connection rule violation shown in the figure. (A
) is the case where the two lines 15 and 16 partially overlap, and (B) is the case where 3 lines are connected to the output pin a of symbol A.
Line(s) of books 12. 14 are connected.

(C) is a case where the line 12 orthogonally intersects the output pin a to the symbol, and (D) is a case where the end point of the line 12 connected to the output pin a to the symbol is an oven. Each of these cases is an example of a violation of wiring rules,
Violations of these connection rules can be easily detected using each coordinate value.

The operation of the embodiment of the present invention will be explained below using the operation flowchart of FIG. In this case, explanation will be given with reference to a specific example circuit diagram shown in FIG. First, from the logic information of the circuit diagram shown in FIG. , and temporarily stores it in the data storage device 3.

In step 21, the output pin information of the symbol is extracted and read, and in this example, the coordinate information regarding the output pin a to the symbol is read (step 22). The signal line and input pins (belonging to other symbols) including this extracted output pin a are searched using the pinpoint method and range method explained in FIGS. 3 and 4 (step 23).
. Lines 11, 12 and 13 separating the output pin a are detected.

In the next step 24, a line violating the connection rule is detected according to the rule violation rules shown in FIGS. 5(A) to 5(D). In this example, line segment 11 is a line that crosses pin a,
This is an error line. Also, the end point of line 12 is an oven line and is an error line, and these error lines 11 and 12 are excluded. In step 25, it is determined whether there is only an error line, and in this example, line 13 is a normal line, so the process advances to step 26.

Since there is a normal line, the process returns to step 23 to search for a signal line or input pin that includes this normal line 13.

Only the signal line 15 includes this signal line 13, and since this line 15 is a normal line, the process returns to step 23 via steps 24, 25, and 26. Lines 14 and 16 include this signal line 15.
Since line 14 is an error line that partially overlaps line 15, it is detected and eliminated in step 24.

Therefore, there is only the normal line 16, and step 23 is performed again.
Input pin b included in this line 16 is detected at
In step 27, output information is generated indicating that output pin a and this input pin b are normally interconnected.

It is determined in step 2B whether an unsearched branch point exists, and one branch point is detected. The signal line and input pin including this branch point 19 are detected in step 23, and finally the input pin C of symbol C is detected, and it is detected that output pin a and this input pin C are interconnected. It is output.

The above processing is performed for all output pins of all symbols, and when the processing is completed for all output pins (step 22), the entire operation is completed.

As described above, according to the present invention, accurate pin interconnection information can be obtained by automatically sequentially tracing and searching connections between input and output pins.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is an operation flow diagram of the blocks in FIG. 1, FIGS. 3 and 4 are diagrams showing the search method of the signal line and input pin search means, FIG. 5 is a diagram showing a detection method of the connection rule violation detection means, and FIG. 6 is a diagram showing a graphic example of logical information used in the embodiment of the present invention. Explanation of symbols of main parts 41...Signal line, input pin search means 42.
... Connection rule violation detection means 43 ... Output information generation means

Claims (1)

[Claims] A circuit connection information generation method that generates connection information between input and output pins between functional symbols from circuit diagram information in which each input/output pin and signal line of a circuit diagram composed of a plurality of circuit function symbols is expressed as coordinate information. a search means for searching for a signal line including one extracted signal line or output pin and an input pin using coordinate values; connection rule violation detection means for detecting and eliminating error lines, extracting one of the output pins of the functional symbol and using the search means to search for input pins and signal lines including this output pin; When the connection rule violation detection means searches for a normal line, the search means again searches for a signal line and input pin including this normal line using this normal line as a reference, and the search means searches for an input pin. A circuit connection information generation method characterized in that information indicating that the input pin and the extracted output pin are mutual connection pins is output.