JPH01128682A - Field memory with 1/2h address jumping function - Google Patents

Abstract

PURPOSE:To attain a false interlace scanning from the video signal of one side field at the time of reproducing a still picture and to reproduce the still picture with a high vertical resolution by executing a second field scanning, the starting point of which is dislocated for 1/2H from the starting point of a first field scanning, when a 1/2H jumping requesting signal is inputted from an external part. CONSTITUTION:When a 1/2H jumping requesting signal RJP is once recognized, and a 1/2H address jumping indicating signal JUMP becomes an 'H' level, a 1/2H address jumping is executed for each field of an even number, and an apparent interlace scanning based on the video signal of the one side field, namely, the false interlace scanning, can be executed by alternately repeating a pulse (a) in the vertical blanking period of the obtained first field scanning and a pulse (b) in the vertical blanking period of a second field scanning. Thus, the vertical resolution can be improved to about 1.5 times.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a field memory with a 1/2H address jump function that can perform interlaced scanning during still image reproduction.

<Prior art> When reproducing one image based on a color television signal,
In order to reduce the scanning band, one screen is divided into two coarse screens, the first field and the second field, as shown in Figure 4(a).
As shown in the figure, a screen is first created by performing vertical scanning while repeating horizontal scanning using the first field scanning indicated by the solid line, and then by scanning the second field indicated by the dotted line in the same manner between the solid lines created by the first field scanning. Fill in this 2
One complete image is reproduced in one scan.

On the other hand, when playing still images with a conventional video tape recorder, the first field scanning and the second field scanning are
Among the field scans, as shown in FIG. 4(b), the image is reproduced by non-interlaced scan based only on the video signal from one field in the first field scan, for example.

<Problems to be Solved by the Invention> As described above, when playing still images with a conventional video tape recorder, the first . Since the image is reproduced by non-interlace scanning based only on the video signal from one field of the video signal of the second field, there is a problem that the vertical resolution is low and the screen looks somewhat rough.

Therefore, an object of the present invention is to skip a predetermined range of 1/2H (H is the horizontal scanning period) of data when reading video data from the field memory, thereby keeping the same field memory capacity as the conventional one when playing back still images. An object of the present invention is to provide a field memory with a 1/2H address jump function, which makes it easy to perform pseudo-interlaced scanning and improves the vertical resolution of reproduced images.

<Means for Solving the Problems> In order to achieve the above object, the field memory with 1/2H address jump function of the present invention serially accesses, reads out and outputs the video signal stored in the memory section. Normal data output means serially accesses data at an address of the video signal stored in the memory section, which is located half a horizontal scanning period ahead of the address from which the normal data output means is currently reading data. When a 1/2H address jump request signal is input from the outside, it outputs a 1/2H address jump instruction signal until the next vertical synchronization signal is input. The 1/2H address jump instruction means that continues to output the 1/2H address jump instruction signal and the 1/2H address jump instruction means mentioned above! While the /2H address jump instruction signal is output, the 1/2H address jump and data from the 1/2H address jump data output means are selected, but the 1/2H address jump instruction signal is not output. The present invention is characterized in that it includes 1/2H address jump control means for selecting data from the normal data output means.

As mentioned above, when reproducing one image based on a color television signal, in order to lower the scanning band, the
One screen is reproduced by interlaced scanning consisting of a first field scan indicated by a solid line and a second field scan indicated by a dotted line. In addition, in order to perform interlaced scanning, the fourth
As shown in Figure (a), the starting point of the first field scan must be at the top left corner of the screen, and the starting point of the second field scanning must be at the top center of the screen. That is, the starting point of the first field scanning must match the horizontal synchronization of the color television signal, and the starting point of the second field scanning must be shifted from the starting point of the first field scanning by 1/2 of the horizontal scanning period H. It won't happen.

FIG. 5 shows the pulses of the vertical blanking period for each field of a color television signal. (a) shows a pulse during the vertical blanking period of the first field scan, and (b) shows a pulse during the vertical blanking period of the second field scan.

The present invention focuses on the fact that the start point of the first field scan and the start point of the second field scan are shifted by 1/2L, and the start point of the first field scan and the start point of the second field scan are shifted by 1/2L. Skip the subsequent equalization pulse la (that is, 1/2H when reading the field memory
Figure 1 (
The pulse signal for the vertical blanking period of the second field scan in FIG. 1(b) is generated from the pulse signal for the vertical blanking period of the first field scan in a).

Function> When reproducing a still image based on the video signal stored in the memory section, the memory section is accessed serially by the normal data output means and the data of the video signal stored in the memory section is read out. It will be done. At the same time, the data at the address of the memory section that is half one horizontal scanning period (1/2H) before the address of the memory section from which the normal data output means is currently reading data is transferred to the 1/2H address jump data output means. It is serially accessed and read by.

When a 1/2H address jump request signal is input from the outside, the 1/2H address jump instruction means continues to output the 1/2H address jump instruction signal until the next vertical synchronization signal is input. Then, the 1/2H address jump control means continues to select and output the 1/2H address jump data from the 1/2H address jump data output means. After that, when a vertical synchronization signal is input from the outside, the 1/2H address jump instruction means
Stops outputting the address jump instruction signal. Then, the 1/2H address jump control means selects and outputs the data from the normal data output means.

By doing this, when the 1/2H address jump instruction signal is not output, the first field scan shown by the solid line in FIG. 4(a) is executed based on the data from the normal data output means. - On the other hand, when a 1/2H address jump request signal is input from the outside and a 1/2H address jump instruction signal is output, the above-mentioned l/2H from 1st field scan
A second field scan indicated by the dotted line in FIG. 4(a) is executed, which is shifted forward by the same amount. Therefore, pseudo incremental scanning can be performed only from the video signal of one field.

<Example> Hereinafter, the present invention will be explained in detail with reference to illustrated embodiments.

FIG. 2 is a circuit diagram showing an embodiment of a field memory with a first address jump function. This circuit consists of block ■ and block ■, and the timing at which one block reads data from field memories 1a and 2a is 1/2H more than the timing at which the other block reads data from field memories la and 2a. Keep it moving forward. Then, 1/2H address jump is performed by selecting data advanced by 1/2H in accordance with 1/2H address jump signal JUMP inputted from the outside.

The circuit shown in Figure 1 uses the sampling frequency 3f of the NTSC system.
The specifications are adapted to the field memories 1a and 2a of a system including a 9-resolution 6-bit quantizer (fsc: color subcarrier frequency of 3.579545 MHz). Therefore, in this case, the number of sample points per horizontal scanning line is 682, which is 720 by providing approximately 5% redundancy.

One line of data from row address O to row address 359 of field memory 1a is transferred to read register l of block I, and similarly data of field memory 2a is transferred to read register l of block I.
One line of data from row address 360 to row address 719 is transferred to read register 2 of block (2).

A first selector (not shown) accesses the address of read register 1.2 as follows, and accesses the address of word register 1.2.
2 data read operation is performed. That is, after accessing the first bit (address O) of read register 1 of block ■ and outputting the first bit data, the first selector sequentially selects the address of read register l to be accessed each time the basic clock is input. The read register 1 is incremented and the read register 1 is sequentially accessed to output data from the 2nd bit to the 359th bit. After accessing the 360th bit (address 359) and outputting the 360th bit data, the address is moved to the 361st bit (address 360) of the read register 2 of block (2).

Thereafter, for each basic block input, the data from the 361st bit to the 719th bit of read register 2 is output as described above, and the data from the 720th bit (address 719) to the last bit is output.
) and outputs the 720th bit data. and,
1 of read register 1 of block r at the next basic clock
Return to bit-th (address O) again. At this time, read register 1.2 contains field memories 1a and 2a.
The next line of data is being transferred.

At this time, as shown in FIG. 2, when the first selector accesses addresses 0 to 340 of the read register I, the input signal A of the Nant gate 3 of the data line selector section 21 is "H" level, and input signals B, C, D of Nant gates 4, 5.6 to "L" level.
"Level. By doing so, Nantes Gate 4
, 5.6 are all "H", so data from address 0 to address 340 of read register 1 can be read out at point X via Nant gate 11 and NOT gate 13. Similarly, while the first selector accesses addresses 3'41 to 359 of the read register 1, only the input signal B of the Nant gate 4 is set to "H".
``At the level, the first selector.

While accessing addresses 360 to 681 of the register 2, only the input signal C of the Nant gate 5 is set to “H”.
To access the first selector or addresses 682 to 719 of the read register 2 to the read register level, set the input signal of the Nantes gate 6 to "H" level. .

2 data can be read out serially at point X.

On the other hand, set the access address of the second selector (not shown) by 1/2H (
341 bits) Start from the previous address, and then
The second selector accesses an address that precedes the first selector by 1/2H. By doing so, at the same time that the normal first selector accesses address O of read register 1, the second selector accesses l/
, 2H addresses (that is, address 34I of read register I) can be accessed. Therefore, while the normal first selector accesses address 0 to address 719 of read register 1.2, the second selector accesses address 341 to address 0 to address 340 of read register 1.2.

During this time, in block ■, Nantes Gate 7.8, 9.
By setting the input signals E, F, G, and H of 10 to "H" level at the timing shown in FIG. 2, the Nant gate 12. The read register 1' read out at the above point X at point Y via the knot gate 14.
+2 data can be read from read register 1.2 by 1/2H address jump (hereinafter referred to as 1/2H jump data).

The jump control unit 22 selects either the normal data taken out at the X point or the 1/2H jump data taken out at the Y point, based on the 1/2H address jump instruction signal JUMP. That is, the 1/2H address jump instruction signal JUM is applied to the gates of the P-channel MOS transistor 15 and the N-channel MOS transistor 18.
P is input to the gates of the N-channel MO8) transistor 17 and the P-channel MOS transistor 16.
1/2H with level reversed by knot gate 19
When address jump instruction signal JUMP is input, transistors l6 and 18 are turned on. Then, the 1/2H jump data at the Y point is selected and output from the knot gate 20. That is, the 1/2H address jump instruction signal JUMP is normally at the "L" level, and normal data from point X is extracted and output, but as will be described later, the 1/2H address jump request signal RJP is input. Then, the 1/2H address jump instruction signal JUMP becomes “H” level, and the 1/2H address jump instruction signal JUMP goes to “H” level, and
Address jump data is extracted and output.

The 1/2H address jump instruction signal JUMP is generated as follows. In Figure 3, the above 1/2H
When the address jump request signal R-P is input, the transistors 31 and 32 are activated at the falling edge of the system clock m.
operates and the l/2H address jump request signal π-“p
- is latched, and at the rising edge of system clock 37Σ, D flip-flop 33 operates to output 1/2H address jimbe instruction signal JUMP. Also, l/
2H address jump request signal recognizes DingF and 1
When the /2H address jump instruction signal J UMP goes to "H" level, the 1/2H address jump instruction signal JUMP is set to "H" level by the NOR gate 35 and 36 until the vertical synchronization signal RST is inputted to the NOR gate 34 from the outside. “Holded at the level.

Therefore, in the normal case, the 1/2H address jump instruction signal JUMP goes to "L" level, and the normal data from the point X in FIG. 1 is output, and based on this normal data, the solid line in FIG. The first field scan shown is performed. On the other hand, once the 1/2H jump request signal Wty is recognized and the 1/2H address jump instruction signal JUMP goes to "H" level, the sequence shown in FIG. 1/2H address jump data from point Y is output, and based on this 1/2H address jump data, the second field scan shown by the dotted line in FIG. 4(a) is performed.

In this way, the 1/2H address jump is performed every field of interval, and the pulses of the vertical blanking period of the first field scan ((a) in FIG. 5) and the vertical blanking period of the second field scan are obtained. Pulse during blanking period ((b) in Figure 5)
), it becomes possible to perform apparent interlaced scanning, that is, pseudo-interlaced scanning, based on the video signal of one field. Therefore, the vertical resolution is improved by about 1.5 times.

In the above embodiment, the sampling frequency of the NTSC system is 3fsc,
Although the present invention is adapted to the field memory of a system including a quantizer with a resolution of 6 bits, the present invention is not limited thereto. In other words, the present invention can be applied to any device that reproduces a still image based on a single field video signal from a memory section.

<Effects of the Invention> As is clear from the above, the field memory with 1/2H address jump function of the present invention has a normal data output means for serially accessing and reading out video signals stored in the memory section, and a memory section as described above. 1/2H address jump data output means for reading out the video signal by jumping 1/2H address from the normal data output means, 1/2H address jump instruction means, and 1/2H address jump control means. Then, the first field scan is normally performed based on the data from the normal data output means. When a 1/2H jump request signal is input from the outside, the 1/2H address jump request signal from the 1/2H address jump data output means is output according to the 1/2H address jump instruction signal from the 1/2H address jump instruction means.
Based on the 2H address jump data, the second field scan is performed with the start point shifted by 1/2H from the start point of the first field scan, so when playing back a still image, a pseudo interface is generated from the video signal of one field. It is now possible to perform race scanning, and still images with high vertical resolution can be reproduced with the same field memory capacity as before.

[Brief explanation of the drawing]

Figure 1 shows the 1/2H address jump function of this invention→
A circuit diagram of an embodiment of the yield memory, FIG. 2 is a diagram showing the relationship between the input signal level and address of each Nant gate for data line switching, and FIG. Created circuit diagram, Figure 4 (a)
4(b) is a diagram showing interlaced scanning, FIG. 4(b) is a diagram showing non-interlaced scanning, and FIG. 5 is a diagram showing pulses in the vertical blanking period for each field of a color television signal. 1.2... Read register, 1 a, 2 a... Field memory, 3.4, 5
, 6, 7, 8, 9, 10, 11.12... Nantes Gate, 13, 14.20... Not Gate, 15.16
, 17, 18, 31. 32...MOS transistor,
33...D flip-flop, 34.35°, 36.
...Noah Gate.

Claims (1)

[Claims] (1) normal data output means for serially accessing and reading out and outputting the video signal stored in the memory section; and the normal data output means for reading out and outputting the video signal stored in the memory section; 1/2H address jump data output means that serially accesses, reads and outputs data at an address that is half one horizontal scanning period ahead of the current address; , 1/2H address jump instruction means that outputs a 1/2H address jump instruction signal and continues to output the 1/2H address jump instruction signal until the next vertical synchronization signal is input; and the 1/2H address jump instruction. While the means outputs the 1/2H address jump instruction signal, selects the 1/2H address jump data from the 1/2H address jump data output means and outputs the 1/2H address jump instruction signal. 1. A field memory with a 1/2H address jump function, comprising 1/2H address jump control means for selecting data from the normal data output means when data is not being output.