JPH0113265B2 - - Google Patents
Info
- Publication number
- JPH0113265B2 JPH0113265B2 JP55083296A JP8329680A JPH0113265B2 JP H0113265 B2 JPH0113265 B2 JP H0113265B2 JP 55083296 A JP55083296 A JP 55083296A JP 8329680 A JP8329680 A JP 8329680A JP H0113265 B2 JPH0113265 B2 JP H0113265B2
- Authority
- JP
- Japan
- Prior art keywords
- line
- printing
- time
- heating resistor
- recording
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
- B41J2/315—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
- B41J2/32—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
- B41J2/35—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads providing current or voltage to the thermal head
- B41J2/355—Control circuits for heating-element selection
- B41J2/36—Print density control
Landscapes
- Electronic Switches (AREA)
- Fax Reproducing Arrangements (AREA)
Description
【発明の詳細な説明】
本発明はフアクシミリ、プリンタ等の熱印字用
発熱抵抗体列の駆動制御回路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a drive control circuit for a heating resistor array for thermal printing in facsimile machines, printers, and the like.
感熱記録がフアクシミリ、プリンタなど多くの
記録装置に採用され、記録紙も改良され、発色色
素と発色剤とを溶融発色させる方式のものはその
安定性も優れていることから、ますます多方面に
応用されるに到つている。一方、感熱ヘツドも、
極めて高密度な記録ができるようになり、他の静
電記録等と比較しても、十分対抗できる良質な記
録が可能となつている。 Thermal recording has been adopted in many recording devices such as facsimiles and printers, and recording paper has also been improved, and the method of melting coloring pigments and coloring agents has excellent stability, so it is being used in more and more applications. It is now being applied. On the other hand, the heat-sensitive head also
Extremely high-density recording has become possible, and even when compared with other electrostatic recording methods, high-quality recording has become possible.
しかしながら、高速性の点では未だ静電記録に
およばない。これは発熱抵抗体の熱応答に遅いた
めてある。従来、中速フアクシミリに用いられて
いるサーマルヘツドにおいては、発色濃度は各発
熱体の平気印加電力と該印加時間の積でほぼ決ま
つた。ところが、サーマルヘツドを高速で駆動す
るようになると各発熱抵抗体の駆動周期、すなわ
ち、ある発熱抵抗体に一度電力が印加されてから
再び印加されるまでの周期によつても発色濃度が
変化してしまう。 However, in terms of high speed, it still cannot compete with electrostatic recording. This is due to the slow thermal response of the heating resistor. Conventionally, in thermal heads used in medium-speed facsimile machines, the color density is approximately determined by the product of the power normally applied to each heating element and the application time. However, when a thermal head is driven at high speed, the color density changes depending on the driving cycle of each heating resistor, that is, the period from when power is once applied to a certain heating resistor until it is applied again. I end up.
第1図は発熱抵抗体の駆動周期T′と発色濃度
dの一般的関係を表わした特性図であり、この図
によれば、一般に発色濃度に駆動周期についての
飽和特性を有する単調減少関数であることがわか
る。 Figure 1 is a characteristic diagram showing the general relationship between the driving period T' of the heating resistor and the coloring density d. According to this diagram, the coloring density is generally a monotonically decreasing function with saturation characteristics with respect to the driving period. I understand that there is something.
また、第2図は発熱抵抗体の電力印加時間Wと
発色濃度dの一般的関係を表わした特性図であ
り、この図によれば、一般に発色濃度は電力印加
時間についての飽和特性を有する単調増加関数で
あることがわかる。従つて、一定の発色濃度を得
るには、一般に駆動周期T′と電力印加時時間W
の関係が第3図のようになるように制御すればよ
い。しかしながら、各発熱抵抗体ごとに各駆動周
期に応じて電力印加時間を制御することは膨大な
制御回路を必要とし、事実上不可能である。 Furthermore, Fig. 2 is a characteristic diagram showing the general relationship between the power application time W of the heating resistor and the coloring density d. According to this diagram, the coloring density is generally monotonous with saturation characteristics with respect to the power application time. It can be seen that it is an increasing function. Therefore, in order to obtain a constant color density, generally the driving period T' and the power application time W are
It is only necessary to control the relationship so that it becomes as shown in FIG. However, controlling the power application time for each heating resistor according to each drive cycle requires an enormous amount of control circuitry, and is virtually impossible.
また、第2図は発熱抵抗体の印加電力の波高値
Pと発色濃度dの一般的関係も表わしている。従
つて、一定の発色濃度を得るには、一般に駆動周
期T′と印加電力の波高値Pの関係が第3図のよ
うに制御することもできる。しかしながら、各発
熱抵抗体ごとに駆動周期に応じて印加電力の波高
値を制御することは、電力印加時間を制御するの
と同様に、膨大な制御回路を必要とし、事実上不
可能である。 FIG. 2 also shows the general relationship between the peak value P of the power applied to the heating resistor and the coloring density d. Therefore, in order to obtain a constant color density, the relationship between the driving period T' and the peak value P of the applied power can generally be controlled as shown in FIG. However, controlling the peak value of the applied power according to the driving cycle for each heating resistor requires an enormous amount of control circuits, just like controlling the power application time, and is virtually impossible.
一方、限られた帯域内で高能率にフアクシミリ
等の画像信号を伝送する手法として、各種の圧縮
方式が採用されている。受信された圧縮画情報
は、通常、デコーダによつて1ラインごとに元の
画信号に変換され、バツフアメモリを介して1ラ
インごとに記録部に送られる。バツフアメモリか
ら記録部への1ライン分の画信号の転送時間は記
録部の印字速度に対応するが、1ラインの印字時
間は現在のA4判の高速フアクシミリでは一定で、
5〜10msが普通である。全黒や全白のような圧
縮率の高い画情報では間断なくバツフアメモリか
ら記録部に画信号が送られるが、圧縮率の低い複
雑な画信号ではコードが長くなるので、バツフア
メモリから記録部に第iラインの画信号を送つて
から第i+1ラインの画信号を送るまでに100m
s以上を要する。第iラインで印字し、かつ第i
+1ラインで印字する発熱抵抗体の駆動周期は第
iラインの印字開始時から第i+1ラインの印字
開始時までの時間Tであり、一方、第iラインで
は印字せず、第i+1ラインで印字する発熱抵抗
体の駆動周期は時間Tより長くなる。しかしなが
ら、第i−1ライン、第iライン、第i+1ライ
ンと黒が続く記録像において、第iラインの黒の
濃度が第i−1ライン、第i+1ラインの黒の濃
度より低いと視覚的に目立つが、第i−1ライン
が白で、第iライン、第i+1ラインが黒のと
き、あるいは第i−1ライン、第iラインが黒で
第i+1ラインが白のときには、第iラインの黒
の濃度が黒が連続した場合の黒より低くとも視覚
的には目立たない。 On the other hand, various compression methods have been adopted as methods for transmitting image signals such as facsimiles with high efficiency within a limited band. The received compressed image information is normally converted into an original image signal line by line by a decoder, and sent to the recording unit line by line via a buffer memory. The transfer time for one line of image signals from the buffer memory to the recording section corresponds to the printing speed of the recording section, but the printing time for one line is constant with current A4-size high-speed facsimile machines.
5 to 10 ms is normal. For image information with a high compression ratio, such as all black or all white, the image signal is sent from the buffer memory to the recording section without interruption, but for complex image signals with a low compression ratio, the code becomes long, so the image signal is sent from the buffer memory to the recording section without interruption. 100m from sending the image signal of the i line to sending the image signal of the i+1th line
It takes more than s. Print on the i-th line, and print on the i-th line.
The driving cycle of the heating resistor that prints on the +1 line is the time T from the start of printing on the i-th line to the start of printing on the i+1-th line.On the other hand, no printing is performed on the i-th line, but printing is performed on the i-th line. The driving cycle of the heating resistor is longer than the time T. However, in a recorded image where black continues from the i-1st line, the i-th line, and the i+1th line, if the black density of the i-th line is lower than that of the i-1st line and the i+1th line, it is visually Although it is noticeable, when the i-1st line is white and the i-th line or i+1th line is black, or when the i-1st line or i-th line is black and the i+1th line is white, the i-th line is black. Even if the density of black is lower than that of continuous black, it is not visually noticeable.
本発明は以上のような視覚的特性を利用して成
されたものであり、従つて本発明の目的とすると
ころは、感熱記録において発熱抵抗体の駆動周期
の変化によつて生じる濃度むらを視覚的に軽減す
ることにある。 The present invention has been achieved by utilizing the above-mentioned visual characteristics, and therefore, an object of the present invention is to eliminate density unevenness caused by changes in the driving cycle of the heating resistor in thermal recording. The goal is to visually reduce it.
本発明の上記目的は、熱印字用発熱抵抗体列の
駆動回路において、画信号に応じてあるラインの
各画素に対応する各発熱抵抗体に電力を印加して
前記画信号に応じた印字を得るときに、前ライン
の印字開始時から当該ラインの印字開始時までの
時間に応じて当該ラインの印加時間を制御する制
御手段を具備し、前記制御手段により記録像の濃
度むらを視覚的に軽減することを特徴とする熱印
字用発熱抵抗体列駆動制御回路、又は、熱印字用
発熱抵抗体列の駆動回路において、画信号に応じ
てあるラインの各画素に対応する各発熱抵抗体に
電力を印加して前記画信号に応じた印字を得ると
きに、前ラインの印字開始時から当該ラインの印
字開始時までの時間に応じて当該ラインの印加電
力の波高値を制御する制御手段を具備し、前記制
御手段により記録像の濃度むらを視覚的に軽減す
ることを特徴とする熱印字用発熱抵抗体列駆動制
御回路、によつて達成される。すなわち本発明は
前ラインの印字開始時から現ライン(印字するラ
イン)の印字開始までの時間に応じて現ラインの
印字エネルギーを制御するものである。 The above-mentioned object of the present invention is to apply electric power to each heating resistor corresponding to each pixel of a certain line in accordance with an image signal in a drive circuit for a heating resistor array for thermal printing to print in accordance with the image signal. The control means is provided for controlling the application time of the line according to the time from the start of printing of the previous line to the start of printing of the line, and the control means visually detects density unevenness of the recorded image. In a heating resistor array drive control circuit for thermal printing or a driving circuit for a heating resistor array for thermal printing, the heating resistor array corresponding to each pixel in a certain line is controlled according to an image signal. When applying electric power to obtain a print according to the image signal, the control means controls the peak value of the applied electric power to the line according to the time from the start of printing of the previous line to the start of printing of the line. This is achieved by a heating resistor array drive control circuit for thermal printing, characterized in that the control means visually reduces density unevenness in a recorded image. That is, the present invention controls the printing energy of the current line according to the time from the start of printing of the previous line to the start of printing of the current line (line to be printed).
以下、本発明をその良好な実施例について添付
図面を参照しながら具体的に説明する。 Hereinafter, preferred embodiments of the present invention will be specifically described with reference to the accompanying drawings.
第4図は第3図を直線的に近似したグラフであ
る。しかしながら、第4図の横軸Tは第iライン
の印字開始時から第i+1ラインの印字開始時ま
での時間であり、第3図における横軸T′つまり
発熱抵抗体の駆動周期に対応する。第4図のグラ
フは本発明の一実施例を説明するものであり、第
iラインの印字開始時から第i+1ラインの印字
開始時までの時間Tによつて第i+1ラインの発
熱抵抗体の電力印加時間Wを、あるいは印加電力
の波高値Pをグラフのように制御することを意味
している。該グラフにおいて、T0は第iライン
の印字開始時から第i+1ラインの印字開始時ま
での最低時間である。 FIG. 4 is a graph obtained by linearly approximating FIG. 3. However, the horizontal axis T in FIG. 4 is the time from the start of printing on the i-th line to the start of printing on the i+1-th line, and corresponds to the horizontal axis T' in FIG. 3, that is, the drive period of the heating resistor. The graph in FIG. 4 explains one embodiment of the present invention, and shows that the power of the heating resistor of the i+1st line is determined by the time T from the start of printing of the ith line to the start of printing of the i+1th line. This means controlling the application time W or the peak value P of the applied power as shown in the graph. In this graph, T 0 is the minimum time from the start of printing of the i-th line to the start of printing of the i+1-th line.
第5図は本発明に使用される熱印字用発熱抵抗
体列駆動回路を示す図であり、発熱抵抗体H1〜
H320からなる発熱抵抗体列を80個を単位とす
る4ブロツクに分割し、4行80列のマトリクス結
線よつて駆動する回路である。該駆動回路はトラ
ンジスタTRB1〜TRB4及びTRB1′〜TRB
4′から成る4組のドライブ回路、トランジスタ
TRD1〜TRD80からなる80個のスイツチング
回路によつて全発熱抵抗体のマトリクス制御を行
なつており、各発熱抵抗体の駆動は次のようにし
て行なわれる。 FIG. 5 is a diagram showing a heating resistor array drive circuit for thermal printing used in the present invention, and shows heating resistors H1 to H1.
This circuit divides a row of heating resistors made of H320 into 4 blocks each having 80 resistors, and drives them through a matrix connection of 4 rows and 80 columns. The drive circuit includes transistors TRB1 to TRB4 and TRB1' to TRB.
4 sets of drive circuits consisting of 4' transistors
Matrix control of all the heating resistors is performed by 80 switching circuits consisting of TRD1 to TRD80, and each heating resistor is driven as follows.
1ラインの記録は発熱抵抗体H1〜H80、H
81〜H160、H161〜H240、H241
〜H320の各ブロツクごとに4回に分けて行な
われる。第1回目の記録を発熱抵抗体H1〜H8
0とするには、群信号パルスBP1に論理“1”
の電位を記録に必要な時間だけ与え、トランジス
タTRB1′,TRB1を“ON”すると共に、画信
号に応じてドツト信号パルスDP1〜DP80に論
理“0”あるいは“1”の電位を与え、トランジ
スタTRD1〜TRD80を“オン”、“オフ”す
る。例えば、ドツト信号パルスDP1が論理“1”
の電位ならば、トランジスタTRD1は“オン”
し、従つて記録電源の陽極+VRからトランジス
タTRB1によつて印字された電流は発熱抵抗体
H1を通つてトランジスタTRD1によつて記録
電源の陰極に流れる。よつて、発熱抵抗体H1
は、発熱し、感熱紙上に印字する。他の発熱抵抗
体もも同様にして印字する。同様にして、順次ト
ランジスタTRB2′とTRB2、TRB3′とTRB
3、TRB4′とTRB4を“オン”にし、画信号
に応じてスイツチング回路のトランジスタを“オ
ン”、“オフ”する。 One line of recording is heating resistors H1 to H80, H
81~H160, H161~H240, H241
The process is divided into four times for each block of ~H320. The first record is the heating resistor H1 to H8.
To set it to 0, set the group signal pulse BP1 to logic “1”.
is applied for the time required for recording, transistors TRB1' and TRB1 are turned ON, and a potential of logic 0 or 1 is applied to dot signal pulses DP1 to DP80 in accordance with the image signal, and transistor TRD1 is turned ON. ~Turn TRD80 “on” and “off”. For example, dot signal pulse DP1 is logic “1”
If the potential is , transistor TRD1 is “on”
Therefore, the current printed by the transistor TRB1 from the anode +VR of the recording power source flows through the heating resistor H1 to the cathode of the recording power source by the transistor TRD1. Therefore, the heating resistor H1
generates heat and prints on thermal paper. Other heating resistors are also printed in the same manner. Similarly, transistors TRB2' and TRB2, TRB3' and TRB
3. Turn on TRB4' and TRB4, and turn on and off the transistors of the switching circuit according to the image signal.
以上の方法によつて第i+1ラインを記録する
ときに、第iラインの印字開始時から第i+1ラ
インの印字開始時までの時間Tによつて、第4図
のグラフに従つてそれぞれ群信号パルスBP1〜
BP4に与える論理“1”の電位のパルス幅Wを
制御する。パルス幅Wの制御の一実施例を第6図
に示す。 When recording the i+1th line by the above method, each group signal pulse is generated according to the time T from the start of printing of the ith line to the start of printing of the i+1th line according to the graph of FIG. BP1~
Controls the pulse width W of the logic "1" potential applied to BP4. An example of controlling the pulse width W is shown in FIG.
第6図Dはデコーダから記録部に1ライン分ず
つ画信号を転送するタイミングを示す。第6図D
において、デコーダの出力側のバツフアメモリか
ら記録部へ実際に画信号を転送している時間、白
抜きの部分はバツフアメモリから画信号を転送し
ていない時間を夫々示している。バツフアメモリ
からの1ラインの画信号転送時間は一定(時間
t0)であり、記録部の1ライン記録時間に等し
い。なお、1ライン記録時間は後述するように記
録部が最大幅の群信号パルスで記録する時間であ
る。この実施例では第i−1ラインの画信号転送
開始から第iラインの画信号転送開始までの時間
T′0であり、これに第i−1ラインの印字開始か
ら第iラインの印字開始までの時間T0(=t0)に
等しい。同様に、第iラインの画信号転送開始か
ら第i+1ラインの画信号転送開始までの時間は
T′1であり、これは第iラインの印字開始から第
i+1ラインの印字開始までの時間T1に等しい。
第i+1ラインの画信号転送開始から第i+2ラ
インの画信号転送開始までの時間はT′3であり、
これは第i+1ラインの印字開始から第i+2ラ
インの印字開始までの時間T3に等しい。それぞ
れT0、T1、T3の時間によつて夫々第iライン、
第i+1ライン、第i+2ラインの電力印字時間
を第4図に従つて制御する。すなわち、第4図に
おいて、T=T0のときの電力印加時間WはW0で
あり、従つて、第6図Aに示すように、第iライ
ン印字時の群信号パルスBP1,BP2,BP3,
BP4のパルス幅は夫々W0となる。同様にして、
第i+1ライン、第i+2ラインの群信号パルス
BP1,BP2,BP,BP4のパルス幅は夫々第6
図B,Cに示す通りである。該実施例では、電力
印加時間は、第4図に示すように、W0〜W2の範
囲であり、1ラインの記録時間は4W2、従つてデ
コーダから記録部への1ライン分の画信号転送時
間も4W2となつている。 FIG. 6D shows the timing at which image signals are transferred line by line from the decoder to the recording section. Figure 6D
In the figures, the time during which the image signal is actually transferred from the buffer memory on the output side of the decoder to the recording section, and the white area indicate the time during which the image signal is not transferred from the buffer memory, respectively. The image signal transfer time for one line from the buffer memory is constant (time
t 0 ), which is equal to one line recording time of the recording section. Note that the one-line recording time is the time during which the recording section records with the group signal pulse of the maximum width, as will be described later. In this embodiment, the time from the start of image signal transfer of the i-1th line to the start of image signal transfer of the i-th line
T'0 , which is equal to the time T0 (= t0 ) from the start of printing of the i-1th line to the start of printing of the i-th line. Similarly, the time from the start of image signal transfer of the i-th line to the start of image signal transfer of the i+1th line is
T′ 1 , which is equal to the time T 1 from the start of printing of the i-th line to the start of printing of the i+1-th line.
The time from the start of image signal transfer of the i+1th line to the start of image signal transfer of the i+2th line is T' 3 ,
This is equal to the time T 3 from the start of printing on the i+1th line to the start of printing on the i+2th line. i-th line, respectively, depending on the time of T 0 , T 1 , and T 3 , respectively.
The power printing time of the i+1th line and the i+2th line is controlled according to FIG. That is, in FIG. 4, the power application time W when T=T 0 is W 0 , and therefore, as shown in FIG. 6A, the group signal pulses BP1, BP2, BP3 when printing the i-th line are ,
The pulse width of BP4 is W0 . Similarly,
Group signal pulse of i+1st line and i+2th line
The pulse widths of BP1, BP2, BP, and BP4 are respectively 6th
As shown in Figures B and C. In this embodiment, the power application time is in the range of W 0 to W 2 as shown in FIG. The signal transfer time is also 4W2 .
第7図は本発明を用いたフアクシミリ受信機の
記録系の一実施例を示す構成図、第9図は第7図
の記録系の動作を示すタイムチヤートである。本
実施例は第6図Dのタイミングで印字を実行す
る。コード化された画信号Sは、デコーダ71に
入力されると、1ラインごとに元の画信号に変更
され、デコーダ出力S1はバツフアメモリ72に転
送される。このとき、デコーダ出力S1はデコーダ
コード化画信号を復号するごとに発生する。した
がつて1ライン分のコード化画信号をバツフアメ
モリ72へ転送終了するまでの時間は1ライン分
のコード化画信号の復号時間に依存する。1ライ
ン分のデコーダ出力がすべてバツフアメモリ72
に転送されると、バツフアメモリ72からバツフ
アメモリ出力S2が発生し記録部の印字速度に応じ
て直列−並列変換レジスタ78に蓄積され、ラツ
チ回路79によつてラツチ信号LATCHの「ハ
イ」のタイミングで同時印字する数だけの画信
号、つまり第5図の実施例では80個の画信号を同
時にラツチし、スイツチング回路77を動作させ
る。デコーダ71の処理状況は記録制御部73に
伝えられ、該情報に応じてバツフアメモリ72か
ら直列−並列変換レジスタ78への画信号の転
送、ラツチ回路79のラツチタイミングが制御さ
れる。 FIG. 7 is a block diagram showing an embodiment of a recording system of a facsimile receiver using the present invention, and FIG. 9 is a time chart showing the operation of the recording system of FIG. In this embodiment, printing is executed at the timing shown in FIG. 6D. When the coded image signal S is input to the decoder 71, it is changed line by line to the original image signal, and the decoder output S1 is transferred to the buffer memory 72. At this time, the decoder output S1 is generated every time the decoder encoded image signal is decoded. Therefore, the time required to complete the transfer of one line's worth of coded image signals to the buffer memory 72 depends on the decoding time of one line's worth of coded image signals. All decoder output for one line is stored in the buffer memory 72.
, a buffer memory output S2 is generated from the buffer memory 72, stored in the serial-parallel conversion register 78 according to the printing speed of the recording section, and is output by the latch circuit 79 at the "high" timing of the latch signal LATCH. The number of image signals to be simultaneously printed, that is, 80 image signals in the embodiment shown in FIG. 5, are latched at the same time, and the switching circuit 77 is operated. The processing status of the decoder 71 is transmitted to the recording control section 73, and the transfer of the image signal from the buffer memory 72 to the serial-parallel conversion register 78 and the latch timing of the latch circuit 79 are controlled in accordance with the information.
また、分周回路74−1、駆動周期カウンタ7
4−2、ラツチ回路74−3、プリセタブルカウ
ンタ74−4によつて、ドライブ回路76に与え
るドライブパルス幅Wを第4図に示すように制御
する。すなわち高周波パルスHFPを分周回路7
4−1で分周したパルスを駆動周期カウンタ74
−2にて、第i−1ラインの印字開始後T0経過
した時から第iラインの印字開始時までの期間計
数する。すなわち、第4図におけるT−T0の値
を測定する。該時間T−T0を第iラインの印字
開始時にラツチ回路74−3にてラツチし、第i
+1ラインの印字開始時まで保持する。プリセタ
プルカウンタ74−4は、第4図に示す駆動周期
Tとパルス幅Wの関係に従つて、ドライブ回路7
6の駆動時間を制御し、印字パルス幅を制御する
ものであり、各印字タイミングにおいてラツチ回
路74−3に保持されている値をプリセツトし、
印字パルス幅がW0に達した時点から高周波パル
スHFPを数計してプリセツトされた値に達する
まで印字パルスを保持する。HFPを充分高周波
パルスで、分周回路74−1の分周比を適当に設
定すれば、前記方法にて第iラインの印字パルス
幅は第4図の如く設定できる。 In addition, a frequency dividing circuit 74-1, a drive cycle counter 7
4-2, the drive pulse width W applied to the drive circuit 76 is controlled as shown in FIG. 4 by the latch circuit 74-3 and presettable counter 74-4. In other words, the high frequency pulse HFP is divided into frequency dividing circuit 7
The pulse frequency divided by 4-1 is sent to the drive cycle counter 74.
-2, the period from the time T0 has elapsed after the start of printing of the i-1th line to the start of printing of the i-th line is counted. That is, the value of T-T 0 in FIG. 4 is measured. The time T-T 0 is latched by the latch circuit 74-3 at the start of printing of the i-th line, and
It is held until printing of +1 line starts. The preset pull counter 74-4 controls the drive circuit 7 according to the relationship between the drive period T and the pulse width W shown in FIG.
6 and controls the printing pulse width, and presets the value held in the latch circuit 74-3 at each printing timing.
From the time when the print pulse width reaches W0 , the high frequency pulse HFP is counted and the print pulse is held until it reaches a preset value. If the HFP is a sufficiently high-frequency pulse and the frequency division ratio of the frequency dividing circuit 74-1 is appropriately set, the printing pulse width of the i-th line can be set as shown in FIG. 4 using the method described above.
第i+1ライン、第i+2ライン、……の印字
パルス幅も上述と同様にして設定することができ
る。 The printing pulse width of the i+1st line, the i+2nd line, . . . can also be set in the same manner as described above.
次に、第i−1ラインの印字開始から第iライ
ンの印字開始までの時間Tによつて第iラインを
印字するときの記録電源電圧+VRを第4図のT
−P特性を満足するように制御する場合の実施例
について説明する。第8図はこれを実行するため
の一実施例の構成図である。第8図と第7図の共
通部分は同一の構成であることを示す。異なるの
は第7図の74−1,74−2,74−3,74
−4が第8図では74−5,74−6,74−
7,74−8になつていることである。すなわ
ち、第7図においては分周回路74−1、駆動周
期カウンタ74−2、ラツチ回路74−3、プリ
セタプルカウンタ74−4によつて、ドライブ回
路76に与えるドライブパルス幅Wを第4図のT
−W特性のように制御しているのに対し、第8図
では駆動周期カウンタ74−5、ラツチ回路74
−6、D−A変換器74−7、電力増幅器74−
8によつてドライブ回路76の記録電源電圧+
VRを第4図のT−P特性のように制御してい
る。ここで、記録電源電圧+VRと発熱体間電力
の波高値Pはほぼ比例していると考えてよい。 Next, the recording power supply voltage +VR when printing the i-th line is determined by the time T from the start of printing of the i-1th line to the start of printing of the i-th line.
An example in which control is performed to satisfy the -P characteristic will be described. FIG. 8 is a block diagram of an embodiment for implementing this. Common parts between FIG. 8 and FIG. 7 indicate the same configuration. The differences are 74-1, 74-2, 74-3, and 74 in Figure 7.
-4 is 74-5, 74-6, 74- in Figure 8
7, 74-8. That is, in FIG. 7, the drive pulse width W given to the drive circuit 76 is determined by the frequency divider circuit 74-1, drive cycle counter 74-2, latch circuit 74-3, and preset pull counter 74-4 as shown in FIG. T of
-W characteristics, whereas in FIG.
-6, DA converter 74-7, power amplifier 74-
8, the recording power supply voltage of the drive circuit 76 +
VR is controlled as shown in the T-P characteristic shown in FIG. Here, it may be considered that the recording power supply voltage +VR and the peak value P of the power between the heating elements are approximately proportional.
第8図において、高周波パルスHFPを駆動周
期カウンタ74−5にて第i−1ラインの印字開
始後T0経過した時から第iラインの印字開始時
までの期間計数する。すなわち、第4図における
T−T0の値を測定する。該時間T−T0を第iラ
インの印字開始時にラツチ回路74−6にてラツ
チし、第i+1ラインの印字開始時まで保持す
る。D−A変換器74−7はラツチ回路74−6
のデイジタル値をアナログ値に変換し、該変換さ
れた値を電力増幅器74−8によつて増幅し、第
4図のT−P特性を満足するような記録電源電圧
+VRを得る。 In FIG. 8, the high frequency pulse HFP is counted by a drive cycle counter 74-5 for a period from the time when T0 has elapsed after the start of printing of the i-1th line until the start of printing of the i-th line. That is, the value of T-T 0 in FIG. 4 is measured. The time T-T 0 is latched by the latch circuit 74-6 at the start of printing of the i-th line, and held until the start of printing of the i+1-th line. The DA converter 74-7 is a latch circuit 74-6.
The digital value of is converted into an analog value, and the converted value is amplified by a power amplifier 74-8 to obtain a recording power supply voltage +VR that satisfies the T-P characteristic shown in FIG.
第i+1ライン、第i+2ライン……の記録電
源電圧も上述と同様にして得ることができる。 The recording power supply voltages for the i+1st line, the i+2nd line, etc. can also be obtained in the same manner as described above.
以上説明した2つの実施例では発熱抵抗体列の
各発熱抵抗体に加える電力を印加している時間を
制御したり、印加する電力の波高値を制御するこ
とによつて、ドライブ回路76から各発熱抵抗体
に印加するエネルギーを制御している。以上詳し
く説明したように、本発明による熱印字用発熱抵
抗体列駆動制御回路を用いれば、感熱記録におい
て発熱抵抗体の駆動周期の変化によつて生じる濃
度むらを視覚的に軽減することができる。 In the two embodiments described above, by controlling the time period during which power is applied to each heat generating resistor in the heat generating resistor array and controlling the peak value of the applied power, each of the heat generating resistors from the drive circuit 76 is It controls the energy applied to the heating resistor. As explained in detail above, by using the heating resistor array drive control circuit for thermal printing according to the present invention, it is possible to visually reduce density unevenness caused by changes in the driving cycle of the heating resistors in thermal recording. .
第1図は発熱抵抗体の駆動周期T′と発色濃度
dの一般的関係を示す特性図、第2図は発熱抵抗
体の電力印加時間Wと発色濃度dの一般的関係及
び発熱抵抗体の印加電力の波高値Pと発色濃度d
の一般的関係を示す特性図、第3図は一定の発色
濃度を得るための発熱抵抗体の駆動周期T′と電
力印加時間Wの関係及び一定の発色濃度を得るた
めの発熱抵抗体の駆動周期T′と印加電力の波高
値Pの関係を示す特性図、第4図は本発明の一実
施例の説明図であり、第iラインの印字開始時か
ら第i+1ラインの印字開始時までの時間Tと第
i+1ラインの発熱抵抗体の電力印加時間W及び
発熱抵抗体の印加電力の波高値Pを示す図、第5
図は本発明に使用される熱印字用発熱抵抗体列駆
動回路の構成例を示す図、第6図は本発明の一実
施例の説明図であり、発熱抵抗体の電力印加時間
Wの制御の一実施例を示す図、第7図は本発明を
用いたフアクシミリ受信機の記録系の第一の実施
例を示すブロツク構成図、第8図は本発明を用い
たフアクシミリ受信機の記録系の第二の実施例を
示すブロツク構成図、第9図は第7図の記録系の
動作を示すタイムチヤートである。
T′……発熱抵抗体の駆動周期、T……第iラ
インの印字開始時から第i+1ラインの印字開始
時までの時間、d……発色濃度、W……発熱抵抗
体の電力印加時間、P……発熱抵抗体の印加電力
の波高値、H1〜H320……発熱抵抗体、BP
1〜BP4……群信号パルス、DP1〜DP80…
…ドツト信号パルス、S……画信号、HFP……
高周波パルス、71……デコーダ、72……バツ
フアメモリ、73……記録制御部、74−1……
分周回路、74−2……駆動周期カウンタ、74
−3……ラツチ回路、75−5……駆動周期カウ
ンタ、74−6……ラツチ回路、74−7……D
−A変換器、74−8……電力増幅器、75……
発熱抵抗体列、76……ドライブ回路、77……
スイツチング回路、78……直列−並列変換レジ
スタ、79……ラツチ回路。
Fig. 1 is a characteristic diagram showing the general relationship between the driving period T' of the heating resistor and the coloring density d, and Fig. 2 is a characteristic diagram showing the general relationship between the power application time W of the heating resistor and the coloring density d, and the general relationship between the heating resistor's driving period T' and the coloring density d. Peak value P of applied power and color density d
Figure 3 shows the relationship between the driving cycle T' of the heating resistor and the power application time W to obtain a constant color density, and the driving of the heating resistor to obtain a constant color density. FIG. 4 is a characteristic diagram showing the relationship between the period T' and the peak value P of the applied power, and is an explanatory diagram of an embodiment of the present invention. 5th diagram showing the time T, the power application time W of the i+1th line heating resistor, and the peak value P of the applied power to the heating resistor.
The figure is a diagram showing an example of the configuration of a heating resistor row drive circuit for thermal printing used in the present invention, and FIG. FIG. 7 is a block diagram showing a first embodiment of a recording system of a facsimile receiver using the present invention, and FIG. 8 is a recording system of a facsimile receiver using the present invention. FIG. 9 is a block diagram showing the second embodiment of the present invention, and FIG. 9 is a time chart showing the operation of the recording system shown in FIG. T'...driving cycle of the heating resistor, T...time from the start of printing of the i-th line to the start of printing of the i+1th line, d...color density, W...power application time to the heating resistor, P... Peak value of applied power to heating resistor, H1 to H320... Heat generating resistor, BP
1 to BP4...Group signal pulse, DP1 to DP80...
...Dot signal pulse, S...Picture signal, HFP...
High frequency pulse, 71...decoder, 72...buffer memory, 73...recording control section, 74-1...
Frequency dividing circuit, 74-2... Drive cycle counter, 74
-3...Latch circuit, 75-5...Drive cycle counter, 74-6...Latch circuit, 74-7...D
-A converter, 74-8...Power amplifier, 75...
Heating resistor array, 76... Drive circuit, 77...
Switching circuit, 78...Serial-parallel conversion register, 79...Latch circuit.
Claims (1)
される発熱抵抗体列に一ライン分の画信号を次々
に供給してラインの記録を行うサーマルヘツドの
駆動回路において、前記発熱抵抗体列の各発熱抵
抗体に同一の印字エネルギーを供給することので
きる駆動手段と、前ラインの印字開始時から現ラ
インの印字開始時までの時間を計数する手段と、
前記現ライン記録時に前記駆動手段から前記各発
熱抵抗体へ印加されるエネルギーの大きさを前記
計数時間の増加に応じて大きくする制御手段とを
有することを特徴とする発熱抵抗体列駆動制御回
路。1. In a drive circuit for a thermal head that records a line by sequentially supplying image signals for one line to a heating resistor array composed of a large number of heating resistors arranged in one direction, the heating resistor array a driving means capable of supplying the same printing energy to each heating resistor; and means for counting the time from the start of printing of the previous line to the start of printing of the current line;
A heating resistor array drive control circuit comprising: control means for increasing the amount of energy applied from the driving means to each of the heating resistors in accordance with an increase in the counting time when recording the current line. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8329680A JPS578181A (en) | 1980-06-19 | 1980-06-19 | Drive controlling circuit for thermoprinting heat resistor train |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8329680A JPS578181A (en) | 1980-06-19 | 1980-06-19 | Drive controlling circuit for thermoprinting heat resistor train |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS578181A JPS578181A (en) | 1982-01-16 |
| JPH0113265B2 true JPH0113265B2 (en) | 1989-03-06 |
Family
ID=13798429
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8329680A Granted JPS578181A (en) | 1980-06-19 | 1980-06-19 | Drive controlling circuit for thermoprinting heat resistor train |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS578181A (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57208280A (en) * | 1981-06-19 | 1982-12-21 | Nippon Telegr & Teleph Corp <Ntt> | Heat-sensitive recorder |
| JPS58128873A (en) * | 1982-01-26 | 1983-08-01 | Fuji Xerox Co Ltd | Driving device for thermal head |
| JPS58145746U (en) * | 1982-03-29 | 1983-09-30 | 沖電気工業株式会社 | thermal recording device |
| JPS6327273A (en) * | 1986-07-18 | 1988-02-04 | Nec Corp | Thermal transfer printer |
| JP2581230B2 (en) * | 1989-10-02 | 1997-02-12 | 神鋼電機株式会社 | Thermal printer |
| JP2739694B2 (en) * | 1991-06-05 | 1998-04-15 | 富士通株式会社 | Thermal printer and print processing method thereof |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54153647A (en) * | 1978-05-25 | 1979-12-04 | Oki Electric Ind Co Ltd | Thermal head driving system |
-
1980
- 1980-06-19 JP JP8329680A patent/JPS578181A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS578181A (en) | 1982-01-16 |
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