JPH01139687U - - Google Patents

Info

Publication number
JPH01139687U
JPH01139687U JP1988035682U JP3568288U JPH01139687U JP H01139687 U JPH01139687 U JP H01139687U JP 1988035682 U JP1988035682 U JP 1988035682U JP 3568288 U JP3568288 U JP 3568288U JP H01139687 U JPH01139687 U JP H01139687U
Authority
JP
Japan
Prior art keywords
circuit
gate pulse
integrating
time constant
pulse generating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1988035682U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988035682U priority Critical patent/JPH01139687U/ja
Publication of JPH01139687U publication Critical patent/JPH01139687U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Pulse Circuits (AREA)
  • Processing Of Color Television Signals (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例のゲートパルス発生
回路の回路図、第2図と第3図は動作説明用の波
形図である。
FIG. 1 is a circuit diagram of a gate pulse generation circuit according to an embodiment of the present invention, and FIGS. 2 and 3 are waveform diagrams for explaining the operation.

Claims (1)

【実用新案登録請求の範囲】 (1) カラーバースト抜き取り用のゲートパルス
を発生する回路において、 水平同期信号が印加される放電時定数と充電時
定数の異なる第1積分回路と、同信号が印加され
る放電時定数と充電時定数が同じ第2積分回路と
、該第1及び第2積分回路の出力の論理積を取る
ゲートとから成ることを特徴とするゲートパルス
発生回路。 (2) 上記第1積分回路の放電時定数が上記第2
積分回路の時定数よりも大きいことを特徴とする
実用新案登録請求の範囲第1項記載のゲートパル
ス発生回路。 (3) 上記ゲートの出力側に遅延回路を設けたこ
とを特徴とする実用新案登録請求の範囲第1項記
載のゲートパルス発生回路。
[Scope of Claim for Utility Model Registration] (1) In a circuit that generates a gate pulse for color burst extraction, a first integrating circuit with different discharge time constants and charging time constants to which a horizontal synchronizing signal is applied, and a first integrating circuit to which the horizontal synchronizing signal is applied 1. A gate pulse generating circuit comprising: a second integrating circuit having the same discharge time constant and charging time constant; and a gate that takes the AND of the outputs of the first and second integrating circuits. (2) The discharge time constant of the first integrating circuit is the same as that of the second integrating circuit.
The gate pulse generating circuit according to claim 1, wherein the gate pulse generating circuit has a time constant larger than that of the integrating circuit. (3) The gate pulse generating circuit according to claim 1, which is characterized in that a delay circuit is provided on the output side of the gate.
JP1988035682U 1988-03-17 1988-03-17 Pending JPH01139687U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988035682U JPH01139687U (en) 1988-03-17 1988-03-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988035682U JPH01139687U (en) 1988-03-17 1988-03-17

Publications (1)

Publication Number Publication Date
JPH01139687U true JPH01139687U (en) 1989-09-25

Family

ID=31262325

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988035682U Pending JPH01139687U (en) 1988-03-17 1988-03-17

Country Status (1)

Country Link
JP (1) JPH01139687U (en)

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