JPH0334329U - - Google Patents
Info
- Publication number
- JPH0334329U JPH0334329U JP9293289U JP9293289U JPH0334329U JP H0334329 U JPH0334329 U JP H0334329U JP 9293289 U JP9293289 U JP 9293289U JP 9293289 U JP9293289 U JP 9293289U JP H0334329 U JPH0334329 U JP H0334329U
- Authority
- JP
- Japan
- Prior art keywords
- input
- output
- comparator
- capacitor
- reset state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000007599 discharging Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Pulse Circuits (AREA)
Description
第１図ａ，ｂは本考案によるパルス周波数変調
器の一実施例を示すブロツク図、第２図ａ，ｂは
従来のパルス周波数変調器のブロツク図である。
１……充電用定電流源、２……充電用スイツチ
回路、３……放電用定電流源、４……スイツチ回
路、５……コンデンサ、６……比較器、７……モ
ノマルチ回路、８……Ｄフリツプフロツプ、９…
…デイレーライン。
1A and 1B are block diagrams showing an embodiment of a pulse frequency modulator according to the present invention, and FIGS. 2A and 2B are block diagrams of a conventional pulse frequency modulator. 1... Constant current source for charging, 2... Switch circuit for charging, 3... Constant current source for discharging, 4... Switch circuit, 5... Capacitor, 6... Comparator, 7... Mono multi circuit, 8...D flip-flop, 9...
...Daily line.
Claims (1)
る放電用定電流源と、前記コンデンサの電位と基
準電位とを比較する比較器と、前記比較器の出力
をＣ入力とし該出力Ｑをデイレーラインによりγ
だけ遅延させてＲ入力とし出力をＤ入力として
パルス幅一定のパルスを作り出すモノマルチ回路
と、前記モノマルチ回路の出力パルスで制御され
る充電用定電流源と、前記充放電コンデンサとに
並列接続されかつ前記モノマルチ回路がリセツト
状態で停止したとき該リセツト状態を解除するス
イツチ回路とを備えたパルス周波数変調器。 A charging/discharging capacitor, a constant current source for discharging controlled by an input signal, a comparator for comparing the potential of the capacitor with a reference potential, the output of the comparator being input to C, and the output Q being connected to a delay line. γ
A monomulti circuit that generates a pulse with a constant pulse width by using the R input as the R input and the output as the D input with a delay of and a switch circuit for canceling the reset state when the monomulti circuit stops in the reset state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9293289U JPH0334329U (en) | 1989-08-09 | 1989-08-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9293289U JPH0334329U (en) | 1989-08-09 | 1989-08-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0334329U true JPH0334329U (en) | 1991-04-04 |
Family
ID=31642340
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9293289U Pending JPH0334329U (en) | 1989-08-09 | 1989-08-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0334329U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4873054A (en) * | 1971-12-24 | 1973-10-02 | ||
| JPS5834833U (en) * | 1981-08-31 | 1983-03-07 | 株式会社東芝 | Paper sheet feeding device |
-
1989
- 1989-08-09 JP JP9293289U patent/JPH0334329U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4873054A (en) * | 1971-12-24 | 1973-10-02 | ||
| JPS5834833U (en) * | 1981-08-31 | 1983-03-07 | 株式会社東芝 | Paper sheet feeding device |