JPH01143295A - Manufacture of multilayer printed wiring board - Google Patents
Manufacture of multilayer printed wiring boardInfo
- Publication number
- JPH01143295A JPH01143295A JP30137287A JP30137287A JPH01143295A JP H01143295 A JPH01143295 A JP H01143295A JP 30137287 A JP30137287 A JP 30137287A JP 30137287 A JP30137287 A JP 30137287A JP H01143295 A JPH01143295 A JP H01143295A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- multilayer printed
- outer layer
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
[発明の目的]
(産業上の利用分野)
本発明は多層印刷配線板の製造方法に係わり、特にブラ
インドピアホールを有しパターン精度の高い多層印刷配
線板を製造する方法に関する。[Detailed Description of the Invention] [Object of the Invention] (Industrial Field of Application) The present invention relates to a method for manufacturing a multilayer printed wiring board, and particularly to manufacturing a multilayer printed wiring board with blind pier holes and high pattern accuracy. Regarding the method.
(従来の技術)
従来からブラインドピアホールを有する高密度多層印刷
配線板を製造する方法としては、以下に示すような方法
が行われている。(Prior Art) Conventionally, as a method for manufacturing a high-density multilayer printed wiring board having blind peer holes, the following method has been used.
(1)予めスルーホールを設けかつ内層面に回路パター
ンを形成してなる外層板を、内層板とプリプレグを介し
て重ね合わせ、加熱加圧して一体に積層成形した後、常
法によって、スルーホールを形成するとともに外層回路
パターンを形成する方法。(1) The outer layer board, which has through-holes formed in advance and a circuit pattern formed on the inner layer surface, is stacked on the inner layer board via the prepreg, heated and pressurized to form an integral layer, and then the through-holes are formed by a conventional method. A method for forming an outer layer circuit pattern.
(2)従来からの方法で、ブラインドピアホールのない
多層印刷配線板を製造した後、この多層印刷配線板の所
望の箇所に、レーザまたはドリルを用いて非貫通孔を穿
設し、次いで常法によって外層回路パターンの形成を行
う方法。(2) After manufacturing a multilayer printed wiring board without blind peer holes using a conventional method, non-through holes are drilled at desired locations on the multilayer printed wiring board using a laser or a drill, and then A method of forming an outer layer circuit pattern by a method.
(発明が解決しようとする問題点)
しかしながらこれらの方法のうち(1)の方法において
は、外層板の製造時のスルーホールめっきと積層後のス
ルーホールめっきとの2回のめっき工程で、外層面が2
度めっきされ、その導体厚が60μm以上と厚くなりす
ぎるため、外層回路パターンのパターン幅やギャップの
管理が難しく、精度の高い回路パターンを形成すること
ができないという問題があった。(Problems to be Solved by the Invention) However, in method (1) among these methods, the outer layer is plated in two steps: through-hole plating during the production of the outer layer board and through-hole plating after lamination. 2 layer planes
Since the conductor is plated multiple times and the conductor thickness becomes too thick at 60 μm or more, it is difficult to control the pattern width and gap of the outer layer circuit pattern, making it impossible to form a highly accurate circuit pattern.
また(2)の方法においては、工程が複雑で作業性が悪
いばかりでなく、信頼性の高いブラインドピアホールを
形成することができないという問題があった。Further, in the method (2), there was a problem that not only the process was complicated and workability was poor, but also a highly reliable blind pier hole could not be formed.
本発明はこれらの問題を解決するためになされたもので
、高精度の回路パターンの形成が可能であり、高速高密
度化に対応することができる多層印刷配線板を製造する
方法を提供することを目的とする。The present invention has been made to solve these problems, and provides a method for manufacturing a multilayer printed wiring board that can form highly accurate circuit patterns and can respond to high-speed and high-density demands. With the goal.
[発明の構成]
(問題点を解決するための手段)
本発明の多層印刷配線板の製造方法は、両面銅張積層板
にスルーホールを設けかつ内層面にのみ回路パターンを
形成した後、この配線板を両面に回路パターンが形成さ
れた内層板と、前記内層面を内側にしプリプレグを介し
て重ね合わせ、加熱加圧して一体に積層した後、スルー
ホールおよび外層回路パターンを形成する多層印刷配線
板の製造方法おいて、前記両面銅張8¥屑板として、外
層面の銅箔厚が内層面のそれより薄いものを用いること
を特徴としている。[Structure of the Invention] (Means for Solving the Problems) The method for manufacturing a multilayer printed wiring board of the present invention includes providing through holes in a double-sided copper-clad laminate and forming a circuit pattern only on the inner layer surface, and then forming a circuit pattern only on the inner layer surface. Multilayer printed wiring in which a wiring board has an inner layer board with a circuit pattern formed on both sides, and the inner layer surface is placed inside through a prepreg, and the through holes and the outer layer circuit pattern are formed after they are laminated together by heating and pressing. The method for manufacturing the board is characterized in that the double-sided copper-clad 8 yen scrap board is made of copper foil on the outer layer surface that is thinner than that on the inner layer surface.
なお、外層面の銅箔厚は、内層面の銅箔厚が18〜70
μmの範囲では、5〜18μlの範囲のものであること
が望ましい。Note that the copper foil thickness on the outer layer surface is 18 to 70 mm thick on the inner layer surface.
In the μm range, it is desirable that the amount is in the range of 5 to 18 μl.
(作用)
本発明の多層印刷配線板の製造方法においては、外層板
を製造する両面鋼張積層板として、外層面の銅箔厚が内
層面のそれより薄い積層板が使用されているので、この
面が、外層板製造の際のスルーホールめっき工程と積層
板におけるスルーホール形成の際のめつき工程で、2回
めっきされても、外層銅箔厚が厚くなりすぎることがな
い。(Function) In the method for producing a multilayer printed wiring board of the present invention, a laminate in which the thickness of the copper foil on the outer layer surface is thinner than that on the inner layer surface is used as the double-sided steel-clad laminate for producing the outer layer board. Even if this surface is plated twice in the through-hole plating process when manufacturing the outer layer board and the plating process when forming the through-holes in the laminate, the outer layer copper foil will not become too thick.
従って、通常のエツチングによって、パターン幅やパタ
ーンギャップ等の精度の高い外層回路パターンを形成す
ることができる。Therefore, an outer layer circuit pattern with high precision in pattern width, pattern gap, etc. can be formed by ordinary etching.
(実施例)
以下、本発明の多層印刷配線板の製造方法を図面に基い
て説明する。(Example) Hereinafter, a method for manufacturing a multilayer printed wiring board of the present invention will be explained based on the drawings.
第1図に示すように、絶縁板の両面に厚さ5μIの銅箔
1と厚さ18μlの銅箔2をそれぞれ貼着してなる両面
銅張積層板3の所定の位置に貫通孔4を設けた後、第2
図に示すように、孔4の内壁面を含む全面に銅めつき層
5を設けた0次いで、この基板の厚い方の銅箔2(18
μl)側の面に、常法によって回路パターン6を形成し
、薄い銅箔1側の面を外層面とする外層板7を製造した
。As shown in FIG. 1, through-holes 4 are formed at predetermined positions in a double-sided copper-clad laminate 3 made by pasting copper foil 1 with a thickness of 5 μl and copper foil 2 with a thickness of 18 μl on both sides of an insulating plate. After setting, the second
As shown in the figure, a copper plating layer 5 is provided on the entire surface including the inner wall surface of the hole 4. Next, the thicker copper foil 2 (18
A circuit pattern 6 was formed on the surface of the thin copper foil 1 by a conventional method to produce an outer layer board 7 having the thin copper foil 1 side as the outer layer surface.
次に第3図に示すように、この外層板72枚と両面にそ
れぞれ内層回路パターン8が形成された内層板9とを、
間に複数枚のプリプレグ10を介挿させて重ね合わせ、
加熱加圧し一体に積層成形した。Next, as shown in FIG. 3, these 72 outer layer plates and inner layer plates 9 each having an inner layer circuit pattern 8 formed on both sides,
A plurality of prepregs 10 are inserted between them and overlapped,
It was heated and pressurized and laminated into one piece.
次いで、こうして得られた多層板の所定の位置に、第4
図に示すように、貫通孔11を設けた後、この孔11の
内壁面および外層面全体に銅めっき層12を形成し、し
かる後第5図に示すように、外層面に常法によって回路
パターン13を形成した。Next, a fourth layer was placed at a predetermined position on the thus obtained multilayer board.
As shown in the figure, after providing a through hole 11, a copper plating layer 12 is formed on the entire inner wall surface and outer layer surface of the hole 11, and then, as shown in FIG. 5, a circuit is formed on the outer layer surface by a conventional method. Pattern 13 was formed.
このように構成された実施例の方法によれば、積層成形
によって得られる多層板の外層の導体ノブが薄いので、
スルーホールめっき時にこの上に銅めっき層12を形成
しても、全体の外層導体厚は厚くなりすぎることがない
。従って、この外層導体のエツチングによって精度の高
い回路パターン13を形成することができる。According to the method of the embodiment configured as described above, since the conductor knob on the outer layer of the multilayer board obtained by lamination molding is thin,
Even if the copper plating layer 12 is formed thereon during through-hole plating, the overall outer layer conductor thickness will not become too thick. Therefore, a highly accurate circuit pattern 13 can be formed by etching this outer layer conductor.
し発明の効果]
以上の説明から明らかなように、本発明の多“層印刷配
線板の製造方法においては、外層の導体厚が薄いため、
パターン幅、ギャップ等の精度の高い外層回路パターン
を形成することができ、高速高密度化に対応することが
できる高精度多層印刷配線板を得ることができる。[Effects of the Invention] As is clear from the above explanation, in the method for manufacturing a multilayer printed wiring board of the present invention, since the conductor thickness of the outer layer is thin,
It is possible to form an outer layer circuit pattern with high precision in pattern width, gap, etc., and to obtain a high precision multilayer printed wiring board that can respond to high speed and high density.
第1図乃至第5図はそれぞれ本発明の多層印刷配線板の
製造方法の実施例を工程順に説明するための断面図であ
る。
3・・・・・・・・・・・・両面銅張FA層板5.12
・・・銅めっき層
6.8・・・・・・内層回路パターン
9・・・・・・・・・・・・内層板
10・・・・・・・・・・・・プリプレグ13・・・・
・・・・・・・・外層回路パターン出願人
株式会社 東芝
代理人 弁理士 須 山 佐 −
第3図
第4図FIGS. 1 to 5 are cross-sectional views for explaining an embodiment of the method for manufacturing a multilayer printed wiring board according to the present invention in the order of steps. 3・・・・・・・・・Double-sided copper-clad FA layer board 5.12
...Copper plating layer 6.8...Inner layer circuit pattern 9...Inner layer board 10...Prepreg 13...・・・
......Outer layer circuit pattern applicant
Toshiba Corporation Representative Patent Attorney Sasa Suyama - Figure 3 Figure 4
Claims (1)
面にのみ回路パターンを形成した後、この配線板を両面
に回路パターンが形成された内層板と、前記内層面を内
側にしプリプレグを介して重ね合わせ、加熱加圧して一
体に積層した後、スルーホールおよび外層回路パターン
を形成する多層印刷配線板の製造方法において、前記両
面銅張積層板として、外層面側の銅箔厚が内層面のそれ
より薄いものを用いることを特徴とする多層印刷配線板
の製造方法。(1) After providing through holes in a double-sided copper-clad laminate and forming a circuit pattern only on the inner layer surface, this wiring board is combined with an inner layer board with circuit patterns formed on both sides, and a prepreg with the inner layer surface inside. In the manufacturing method of a multilayer printed wiring board in which through-holes and outer layer circuit patterns are formed after the two-sided copper-clad laminate is laminated together through heat and pressure and then laminated together, the copper foil thickness on the outer layer side is A method for producing a multilayer printed wiring board characterized by using a layer thinner than that of the layer surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30137287A JPH01143295A (en) | 1987-11-28 | 1987-11-28 | Manufacture of multilayer printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30137287A JPH01143295A (en) | 1987-11-28 | 1987-11-28 | Manufacture of multilayer printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01143295A true JPH01143295A (en) | 1989-06-05 |
Family
ID=17896076
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30137287A Pending JPH01143295A (en) | 1987-11-28 | 1987-11-28 | Manufacture of multilayer printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01143295A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03159297A (en) * | 1989-11-17 | 1991-07-09 | Kokusai Electric Co Ltd | Multilayer printed wiring board and manufacture thereof |
-
1987
- 1987-11-28 JP JP30137287A patent/JPH01143295A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03159297A (en) * | 1989-11-17 | 1991-07-09 | Kokusai Electric Co Ltd | Multilayer printed wiring board and manufacture thereof |
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