JPH01147828A - Manufacture of multilayer semiconductor substrate - Google Patents

Abstract

PURPOSE:To form a single-crystal layer having few irregularities onto an insulating film by preventing melting and recrystallization within a specified range on the downstream side in the direction of scanning of laser beams on viewing from an opening for a scribing line shaped to the insulating film on a substrate. CONSTITUTION:An opening 3 (width of 100-200mum and length of 10-20mm) for a scribing line and openings 4 (a square of 5mum) for seeding at the time of a change into a single crystal are formed to an SiO2 film 2 on a single-crystal Si substrate 1. A poly Si film 5 in thickness of 0.5mum and an SiO2 film 6 in thickness of 100Angstrom are shaped through a CVD method, and nitride films 7, 8, 12 for controlling temperature distribution are formed. Laser beams 9 are scanned in the direction of the arrow, the poly Si layer 5 is melted 10 and recrystallized, and a single-crystal Si film 11 is shaped onto the insulating film 2. Melting is not conducted within a fixed range on the downstream side of the direction of scanning of laser beams 9 of the opening 3 at that time, and the poly Si 5 is left. Accordingly, a phenomenon in which the thickness of the Si film on the insulating film 2 in the vicinity of the opening 3 by reason of the temperature difference of molten Si in the opening 3 and on the insulating film 2 can be prevented.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor substrate, and particularly to a method for manufacturing a semiconductor substrate in which circuit elements such as transistors are formed on a single crystal semiconductor substrate formed on an insulator. It is about the method.

[Prior art] In order to improve the performance of semiconductor devices, attempts have been made to separate circuit elements with dielectrics to manufacture semiconductor integrated circuits with low stray capacitance, or to manufacture so-called three-dimensional circuit elements in which circuit elements are stacked three-dimensionally. One method is to form a non-single-crystal semiconductor layer on an insulating layer, heat only the surface layer by irradiating it with energy beams such as laser light, and form a single-crystal semiconductor layer. There is a way to form. At this time, an opening that partially reaches the semiconductor ill crystal substrate is provided in the insulator, and by causing the melting of the non-single crystal semiconductor layer to reach the surface of the single crystal semiconductor substrate in the opening, the non-single crystal semiconductor layer is melted. Attempts have been made to make the semiconductor layer a single crystal having the same crystal axis as the single crystal substrate.

FIG. 4 is a plan view of a crystal substrate immediately before being irradiated with a conventional energy beam, and FIG. 5 is a cross-sectional view taken along the line -■ in FIG.

The configuration will be described below with reference to both figures.

First, an oxide film 2 made of silicon dioxide is formed to a thickness of 1 μm on a silicon substrate 1 made of 111 crystal, and an opening 3 reaching the silicon substrate 1 is provided at a predetermined position. Chemical vapor deposition (CV) is performed on the oxide film 2, including the inside of the opening 3.
Polycrystalline silicon 5 is deposited to a thickness of 0.5 μm using the method D), and an oxide film 6 is deposited thereon to a thickness of 10 OA using the CVD method. Further, on the oxide film 6, a striped nitride film 7 is deposited to a thickness of 50 OA above the opening 3 by the CVD method. Further, on the oxide film 6 sandwiched between the nitride films 7, a nitride film 12 having a thickness of 500 Å is formed with a width of 5 μm and an interval of 10 μm using the same CVD method. Here, opening 3
is usually called a scribe line and has a width of 100 to 200 μm.
, is provided as a region for dividing a semiconductor integrated circuit chip with a length of 10 to 20 mm.

FIG. 6 is a cross-sectional view of the semiconductor substrate during irradiation with energy beams.

The irradiation state will be described below with reference to the drawings.

A substrate having a structure as shown in FIG. 5 is irradiated with continuous wave argon laser light 9 focused to 100 μm while scanning at a scanning speed of 25 cm/s to melt polycrystalline silicon 5. The melted silicon 10 is solidified and recrystallized from the single crystal silicon substrate 1 in the opening 3 to the polycrystalline silicon 5 on the oxide film 2.
When the laser beam irradiation is completed, the polycrystalline silicon 5 on the oxide film 2 becomes a single crystal silicon 11 having the same crystal axis as the single crystal silicon substrate. On this occasion,
The nitride film 7 on the aperture 3 acts as an anti-reflection film for laser light during laser light irradiation, and the aperture 3 has greater thermal diffusion than the oxide film 2.
This is provided to prevent the temperature of the polycrystalline silicon inside from dropping. Furthermore, the striped nitride film 12 provided on the polycrystalline silicon 5-L of the oxide film 21- controls the lateral temperature distribution of the polycrystalline silicon 5 during laser beam irradiation, and allows single crystal growth to occur over the entire chip. The recrystallization mechanism is described in detail in Japanese Patent Application No. 61-048468. Further, the oxide film 6 is provided as a contamination prevention film to prevent nitrogen in the nitride films 7 and 12 from being mixed into the molten silicon 10 melted during laser beam irradiation. After the laser beam irradiation is finished and the polycrystalline silicon 5 in the chip has become a single crystal, the nitride film 7.12 and the oxide film 6 are removed, and then the single crystal on the oxide film 2 is formed by a normal integrated circuit manufacturing process. Circuit elements are formed on the silicon oxide 11. After all processes are completed, the semiconductor substrate is scribed along the openings 3 to complete semiconductor integrated circuit chips of 10 to 20 m square. Therefore, the opening 3 serves to manufacture the ilj crystallized silicon 11 having the same crystal axis as the single crystal silicon substrate 1 on the oxide film 2, and also as a scribe line for dividing the integrated circuit chip after the completion of all processes. have a role.

[Problems to be Solved by the Invention] In the conventional manufacturing method as described above, the opening 3 is formed in a straight line over a large area. Therefore, since the temperature distribution during melting of the polycrystalline silicon 5 in the opening 3 and the polycrystalline silicon 5 on the oxide film 2 is different (the temperature of the polycrystalline silicon 5 on the oxide film 2 is higher), the viscosity of the molten silicon 10 is The portion on the oxide film 2 is smaller. Therefore, the oxide film 2.
Due to the surface tension acting on the interface C with 6, the thickness of the polycrystalline silicon 5 on the oxide film 2 in contact with the end of the opening 3 becomes thin during recrystallization (single crystallization).

FIG. 7 is a sectional view of the semiconductor substrate showing this state.

As shown in the figure, the polycrystalline silicon 5 on the oxide film 2 at the end of the opening 3 is recessed to form a fourth part 15, and the recessed part is the 11t crystallized silicon 11 of the oxide film 21- at the end of the opening 3 on the downstream scanning side. The convex portion 16 is generated by swelling the convex portion 16. In some cases, this depression may progress further and the monocrystalline silicon 11 at the end of the opening 3 may disappear (the film thickness becomes 0) due to the movement of the molten silicon 10 during melting.

It is clear that this problem can be solved by making the temperature uniform during melting of the polycrystalline silicon 5 on the opening 3 and the oxide film 2, but in fact it is costly to make the temperature uniform in various structures. It was difficult due to the problem of In this way, a rectangular (linear) opening 3 with each side of 5 μm or more is used as a scribe line.
After recrystallization, the single crystal silicon 11 around the single crystallized silicon 11 always decreases in film thickness, and a convex portion is formed at the other end.

This invention was made to solve the above-mentioned problems.
The purpose is to obtain a crystalline semiconductor layer without reducing the film thickness.

[Means for Solving the Problems] In the method for manufacturing a multilayer semiconductor substrate according to the present invention, when thermal energy is scanned and applied to melt a non-single-crystal semiconductor layer, the heat of the opening formed in the insulating film is This method does not melt only the semiconductor layer on the insulating film in a predetermined range on the downstream side of the energy scan.

[Function] In the present invention, since the semiconductor layer on the downstream side of the scan of the thermal energy of the opening is not melted, this portion is not depressed, and the change in film thickness of the single crystal semiconductor layer after recrystallization is suppressed.

[Example] FIGS. 1A to 1F are schematic process cross-sectional views showing a manufacturing method in an embodiment of the present invention, and FIG. 2 is a cross-sectional view of a semiconductor substrate corresponding to FIG. It is also a side view.

This manufacturing method will be explained below with reference to these figures.

First, an oxide film 2 made of silicon dioxide having a thickness of 1 μm is formed on a silicon substrate 1 made of a single crystal (see FIG. 1A), and an opening 3.4 reaching the silicon substrate 1 is formed by patterning this. Here, the opening 3 is a scribe line (width 100 to 200 μm, length 10 to 20 m)
m), and the opening 4 is used for seeding during single crystallization of a polycrystalline semiconductor layer in a later step. Therefore, if the non-single crystal semiconductor layer does not need to be a single crystal with the same crystal axis as the single crystal silicon substrate, it is not necessary to form the opening 4 (see Figure 1B).
.

Polycrystalline silicon is deposited to a thickness of 0.5 μm on the oxide film 2, including inside the openings 3 and 4, using the CVD method, and then an oxide film 6 is deposited to a thickness of 100 A using the same CVD method ( (See Figure 1C).

Next, a nitride film is deposited on the oxide film 6 by the CVD method, and this is patterned to form striped and rectangular nitride films 7 and 8 with a thickness of 500A at positions corresponding to the respective upper portions of the openings 3 and 4. (see Figure 1D).

FIG. 2 shows a plan view of the state shown in FIG. 1D (FIG. 1D is a sectional view taken along line xx' in FIG. 2). In the area on the oxidized film 6,
Furthermore, striped nitride films 12 are provided at predetermined intervals. As in the conventional example, this nitride film 12 functions to control the temperature distribution in the lateral direction (laser scanning direction) of the polycrystalline silicon 5 during laser beam irradiation so that single crystal growth continues throughout the chip. However, in this invention, the nitride film 12 is not provided in a range of 20 μm on the right side of the nitride film 7 on the left side in the drawing.

Beam diameter 10 from above of a semiconductor substrate with such a configuration
A 0 μm argon laser beam 9 is irradiated while scanning in the direction of X-X' in FIG. Then, first, the polycrystalline silicon 5 in the opening 3 on the X side melts and becomes molten silicon 10. However, the polycrystalline silicon 5 on the right side on which the nitride film 12 is not formed on the oxide film 2 has a high reflectance even when irradiated with laser light (only the oxide film 100A is exposed to the laser light with a wavelength of 4880A). The reflectance in case of is about 38
%, and the reflectance in the case of nitride film 50OA/oxide film 100A is 0. 2%) does not melt. Therefore, since forces such as surface tension do not work, the film thickness of polycrystalline silicon 5 does not decrease at the right end of opening 3. Next, the laser beam will irradiate the top of the aperture 4, but since the aperture 4 is a square with a side of 5 μm and is provided discretely, the non-uniformity of the temperature when the polycrystalline silicon 5 is melted is reduced. It is limited to the area around the small opening 4.

Therefore, the decrease in the film thickness of the single crystal silicon 11 after recrystallization around the opening 4 is reduced, and the crystal axis of the single crystal silicon 11 after recrystallization is the same as that of the single crystal silicon substrate 1. (see Figure 1E).

After the laser beam irradiation is completed, the nitride films 7, 8° 12 and the oxide film 6 are removed, and circuit elements can be formed on the single crystal silicon 11-1x by a normal integrated circuit manufacturing process (1st F). Note that in Example 1-1, the polycrystalline silicon at the end of the opening 3, which corresponds to the scribe line, was not melted; Any opening having a side length of 5 μm or more (in the j direction (perpendicular to the scanning direction)) can be similarly applied regardless of its purpose (such as a scribe line or an alignment mark).

In the above embodiment, the nitride film 12 was not formed above the polycrystalline silicon at the end of the opening 3 in order to prevent it from melting, but by changing the irradiation intensity of the laser beam, only that part is prevented from melting. A similar effect can also be achieved by doing so.

In addition, in the second embodiment, the nitride film 7 is provided over the opening 3 to melt the polycrystalline silicon 5, but if it is not necessary, the polycrystalline silicon in the linear opening 3 may not be melted. You can.

Further, in the embodiment 1-, an example was shown in which no device was formed under the oxide film 2, but the same effect can be obtained even if a device is formed.

FIG. 3 is a schematic sectional view showing such a configuration as another embodiment.

In the figure, a device made up of a gate electrode 13, wiring 14, etc. on a silicon substrate 1 is covered with an oxide film 2, on which a polycrystalline silicon 5 and an oxide film 6 are formed. The laser beam irradiation procedure and the like are the same as in the above embodiment.

[Effects of the Invention] As described above, according to the present invention, the non-single crystal A conductor layer in a predetermined range downstream of the thermal energy scanning of the aperture is prevented from melting, so that the single crystallization after the thermal energy scanning is prevented. There is an effect that a semiconductor layer having a uniform thickness can be obtained in the insulator 1- without unevenness in film thickness.

[Brief explanation of the drawing]

1A to 1F are schematic process sectional views showing a manufacturing method in an embodiment of the present invention, and FIG. 2 is a plan view corresponding to FIG. Figure), 3rd
The figure is a schematic cross-sectional view during energy beam irradiation in another embodiment of the present invention. Figures 4 to 7 all show conventional examples;
The figure is a plan view of the semiconductor substrate before energy beam irradiation, Figure 5 is a cross-sectional view taken along the line V-■ in Figure 4, Figure 6 is a cross-sectional view of the semiconductor substrate during energy beam irradiation, and Figure 7 is after energy beam irradiation. FIG. 2 is a cross-sectional view of a semiconductor substrate showing the state of a semiconductor layer. In the figure, 1 is a silicon substrate, 2 is an oxide film, 3.4 is an opening, 5 is polycrystalline silicon, 6 is an oxide film, 7 is a nitride film,
9 is a laser beam, 10 is molten silicon, 11 is single crystal silicon, and 12 is a nitride film. In each figure, the same reference numerals indicate the same or corresponding parts. Patent applicant: Director of the Agency of Industrial Science and Technology Sachi Iizuka Figure 1A Figure 3 Figure 4 Figure 85 Figure 6 Manwa Uta

Claims (7)

[Claims] (1) A step of preparing a semiconductor substrate made of a single crystal having a main surface, a step of forming a first insulating film on the main surface of the semiconductor substrate, and a step of forming a first insulating film at a predetermined position of the first insulating film. forming a first opening of a predetermined size that reaches the semiconductor substrate; forming a non-single-crystal semiconductor layer on the first insulating film, including the inside of the first opening;
forming a second insulating film on the semiconductor layer; and scanning in a direction across the first opening to form a second insulating film in a predetermined range in contact with the first opening on the downstream side of the scanning. The method includes the steps of: applying thermal energy to melt the semiconductor layer except for the semiconductor layer in a region on the film, converting the melted semiconductor layer into a single crystal; and removing the second insulating film. , a method for manufacturing a multilayer semiconductor substrate. (2) The step of forming the first opening includes the step of forming a second opening reaching the semiconductor substrate in the first insulating film excluding the predetermined range on the downstream side of scanning of the thermal energy. 2. The method of manufacturing a multilayer semiconductor substrate according to claim 1, wherein the semiconductor layer is also formed inside the second opening. (3) forming a first nitride film corresponding to the size of the first opening on the second insulating film above the first opening; and forming a striped second nitride film along the scanning direction of the thermal energy on the second insulating film, wherein the second nitride film covers the first insulating film in the predetermined range. 3. The method of manufacturing a multilayer semiconductor substrate according to claim 1, wherein the semiconductor is not formed above the semiconductor on a part of the film. (4) The semiconductor substrate is a silicon substrate, the semiconductor layer is polycrystalline silicon, and the first and second insulating films are silicon dioxide,
The method for manufacturing a multilayer semiconductor substrate according to item 2 or 3. (5) The method for manufacturing a multilayer semiconductor substrate according to any one of claims 1 to 4, wherein the thermal energy is generated by irradiation with energy beams. (6) The method for manufacturing a multilayer semiconductor substrate according to claim 5, wherein the energy beam is continuous wave argon laser light. (7) The method for manufacturing a multilayer semiconductor substrate according to any one of claims 1 to 6, wherein the first opening has a length of 5 μm or more in a direction perpendicular to the energy scanning direction. .