JPH01158171U - - Google Patents

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Publication number
JPH01158171U
JPH01158171U JP5427788U JP5427788U JPH01158171U JP H01158171 U JPH01158171 U JP H01158171U JP 5427788 U JP5427788 U JP 5427788U JP 5427788 U JP5427788 U JP 5427788U JP H01158171 U JPH01158171 U JP H01158171U
Authority
JP
Japan
Prior art keywords
module
die pad
storage recess
chip storage
module according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5427788U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5427788U priority Critical patent/JPH01158171U/ja
Publication of JPH01158171U publication Critical patent/JPH01158171U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のICモジユール説明図であり
、第2図は本考案の他の実施例のICモジユール
説明図であり、第3図は一般的なICカードの斜
視図であり、第4図及び第5図は従来のICモジ
ユール説明図である。 5……ICチツプ、6,7,8……本考案にお
けるダイパツド、9……従来のダイツド、11…
…第1の基板、12……第2の基板、14……基
板、18……外部接続端子パターン、26,28
……ICチツプ収納凹部。
FIG. 1 is an explanatory diagram of an IC module according to the present invention, FIG. 2 is an explanatory diagram of an IC module according to another embodiment of the present invention, FIG. 3 is a perspective view of a general IC card, and FIG. 1 and 5 are explanatory diagrams of a conventional IC module. 5...IC chip, 6, 7, 8... Die pad in the present invention, 9... Conventional die pad, 11...
...First board, 12... Second board, 14... Board, 18... External connection terminal pattern, 26, 28
...IC chip storage recess.

Claims (1)

【実用新案登録請求の範囲】 1 単数或いは積層された複数の基板にICチツ
プ収納凹部が形成されてなるICモジユールにお
いて、前記ICチツプ収納凹部の底部及び内壁面
に渡つてダイパツドを設けてなることを特徴とす
るICモジユール。 2 前記ダイパツドを絞り加工により形成せしめ
る請求項1記載のICモジユール。
[Claims for Utility Model Registration] 1. In an IC module in which an IC chip storage recess is formed in a single or a plurality of laminated substrates, a die pad is provided over the bottom and inner wall surface of the IC chip storage recess. An IC module featuring 2. The IC module according to claim 1, wherein the die pad is formed by drawing.
JP5427788U 1988-04-22 1988-04-22 Pending JPH01158171U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5427788U JPH01158171U (en) 1988-04-22 1988-04-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5427788U JPH01158171U (en) 1988-04-22 1988-04-22

Publications (1)

Publication Number Publication Date
JPH01158171U true JPH01158171U (en) 1989-11-01

Family

ID=31280213

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5427788U Pending JPH01158171U (en) 1988-04-22 1988-04-22

Country Status (1)

Country Link
JP (1) JPH01158171U (en)

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