JPS6418778U - - Google Patents
Info
- Publication number
- JPS6418778U JPS6418778U JP1987113376U JP11337687U JPS6418778U JP S6418778 U JPS6418778 U JP S6418778U JP 1987113376 U JP1987113376 U JP 1987113376U JP 11337687 U JP11337687 U JP 11337687U JP S6418778 U JPS6418778 U JP S6418778U
- Authority
- JP
- Japan
- Prior art keywords
- thick film
- film substrate
- integrated circuit
- hybrid integrated
- location
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
第１図は本考案の厚膜基板の断面図、第２図は
従来の厚膜基板の断面図である。
１……混成集積回路用厚膜基板、２……ＩＣチ
ツプ、３……ミニモールドＴｒ、４……チツプコ
ンデンサ、５……外部リード。
FIG. 1 is a sectional view of a thick film substrate of the present invention, and FIG. 2 is a sectional view of a conventional thick film substrate. 1... Thick film substrate for hybrid integrated circuit, 2... IC chip, 3... Mini mold transistor, 4... Chip capacitor, 5... External lead.
Claims (1)
れる個所の導電体膜が厚膜基板の所定領域に形成
された凹部の底面に設けられていることを特徴と
する混成集積回路用厚膜基板。 1. A thick film substrate for a hybrid integrated circuit, characterized in that a conductive film at a location where a component is mounted in the thick film substrate for a hybrid integrated circuit is provided on the bottom surface of a recess formed in a predetermined area of the thick film substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987113376U JPS6418778U (en) | 1987-07-23 | 1987-07-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987113376U JPS6418778U (en) | 1987-07-23 | 1987-07-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6418778U true JPS6418778U (en) | 1989-01-30 |
Family
ID=31353157
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987113376U Pending JPS6418778U (en) | 1987-07-23 | 1987-07-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6418778U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09191061A (en) * | 1996-01-09 | 1997-07-22 | Nec Corp | Chip carrier |
-
1987
- 1987-07-23 JP JP1987113376U patent/JPS6418778U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09191061A (en) * | 1996-01-09 | 1997-07-22 | Nec Corp | Chip carrier |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS60121650U (en) | Chippukiyariya | |
| JPH0353853U (en) | ||
| JPS62107458U (en) | ||
| JPH0288240U (en) | ||
| JPS6384941U (en) | ||
| JPS6181140U (en) | ||
| JPH0183340U (en) | ||
| JPS60125764U (en) | Hybrid integrated circuit device | |
| JPS63142843U (en) | ||
| JPH0279041U (en) | ||
| JPS61207043U (en) | ||
| JPH01139441U (en) | ||
| JPS6316455U (en) | ||
| JPS6252968U (en) | ||
| JPS6196558U (en) | ||
| JPS6251242U (en) | ||
| JPS62112144U (en) | ||
| JPS62134240U (en) | ||
| JPS6457080U (en) | ||
| JPS63164246U (en) | ||
| JPH02142533U (en) | ||
| JPS6343446U (en) | ||
| JPH0472635U (en) | ||
| JPS6367235U (en) | ||
| JPH01113363U (en) |