JPH0117112B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital signal selective level measuring device for frequency-selectively measuring the level of an external digital signal under test.

Conventionally, a device shown in FIG. 1 has been used to directly measure the selection level from an external digital signal under test. That is, in Fig. 1, 1 and 1' are multipliers, to which the signal under test is applied to one input terminal, and to the other input terminal digital sine and cosine signals with a center frequency _f0 are respectively applied. As a result, the signal under test undergoes complex modulation, and a spectrum shifted by the center frequency f ₀ is obtained. Low-pass digital filters 2 and 2' receive the outputs of the multipliers 1 and 1', respectively, and extract near-DC components, and square detectors 3 and 3' perform square-law detection. 4 is an adder which adds the outputs of the square multipliers 3 and 3' to obtain an absolute value and measure the level. In this way, the conventional method used was to obtain signals corresponding to the real part and imaginary part by complex modulation in parallel using the same circuit, and then add them. I needed one.

This invention was made to solve the above problem, and is a digital signal that simultaneously measures the real part and imaginary part of multiplexed external input digital signals in a single configuration and measures the selected level of the digital signal. A selection level measuring device is provided.
This invention will be explained below.

FIG. 2 is a block diagram of a measuring device showing one embodiment of the present invention. In this figure, reference numeral 5 denotes a multiplexing converter, which is composed of two shift registers each having n bits equal to the number of bits of an external input digital signal consisting of one word of n bits, and converts the external input digital signal into its sign. The converted signal having the same data as the external input digital signal is converted to a code speed twice that of the digital signal, and the converted signal having the same data as the external input digital signal is transmitted twice in succession, that is, after being multiplexed twice. 9
is a digital signal generator, for example, a digital oscillator 6 that digitally generates a sine signal, and a sine signal output from this digital oscillator 6.
It consists of a π/binary phaser 7 for converting into a cos signal, and a switch 8 for switching and connecting the output end of the digital oscillator 6 to the input end of the π/binary phaser 7. A digital multiplier 10 multiplies the output signal of the digital signal generator 9 and the output signal of the multiplex converter 5. 11 is a low-pass digital filter, 12 is a squarer, 13 is an adder,
14 is a unit delay device. Further, 18 is a digital integrator, which includes an adder 15 and two unit delays 1.
6 and 17. 19 is a logarithmic converter.

Next, the operation will be explained. An external input digital signal is applied to the multiplex converter 5, the same data as the external input digital signal is converted to double the code rate and sent out twice in succession, and the output is sent to one input terminal of the multiplier 10. Add to. On the other hand, the digital signal generator 9 digitally generates a sine signal of a predetermined frequency from the digital oscillator 6,
Further, the sine signal is applied to a π/binary phase shifter via the switch 8 to be converted into a cos signal and generated. This sin
The signal and the cos signal are generated from the digital signal generator 9 by controlling the switch 8 and switching alternately so as to correspond to each of the two same data output from the multiplex converter 5, and the other signal from the multiplier 10. Multiply in addition to the input end of . Therefore, the output of the multiplier 10 becomes the real part when multiplied by the cos signal, and becomes the imaginary part when multiplied by the sin signal. A low-pass digital filter 11 selects and outputs direct current and its vicinity from the output of the multiplier 10 consisting of a real part and an imaginary part. The output of the low-pass digital filter 11 is square-detected by a squarer 12, and its output is applied to one input terminal of an adder 13, and the output of the squarer 12 is further passed through a unit delay device 14 to the adder 13. The real part and the imaginary part are added to calculate the instantaneous power.

FIG. 3 shows a time chart of the operations so far. That is, (1) is A ₀ , A ₁ , ......,
An external digital signal with data of A _o (2)
converter 5 that multiplexes the external input digital signal in (1)
This is the output signal of the multiplexing converter 5, which converts the code rate to double the code rate by , and sends out the same data twice in succession. (3) is the output of the multiplier 10, and A _i S _i is A _i
sin2πf _L t _i (f _L : frequency of digital generator 6, i is 0, 1, 2, ......, n), A _i C _j is A _i cos2πf _L t _j (j
represents 0, 1, 2, ......, n). (4) shows the output when the output of (3) is applied to the digital filter 11 constituting the reduction filter; HC ₀ ,
HS ₁ , HC ₁ , ......, HS ₁ , HC _j , ...... are signals
A ₀ C ₀ , A ₁ S ₁ , A ₁ C ₁ , ......, A _i S _i , A _j C _j , ...
This is the calculation result of the digital filter. (5) is the result of addition of the outputs (HS _i ) ² and (HC _j ) ² of the squarer 12 by the adder 13, which is valid data only when i=j and invalid data when i≠j.

As described above, the output of the adder 13 is applied to the digital integrator 18. Since the digital integrator 18 has two unit delay units 16 and 17, after integrating the valid data and invalid data separately, only the valid data output from one unit delay unit 16 is logarithmically converted. A logarithmic transformation is performed by a transformer 19. The output is applied to a display circuit (not shown) to display the result.

In the embodiment shown in FIG. 2, instead of the digital oscillator 6 and the π/2 phase advancer 7, for example, sin and cos digital oscillators may be provided separately and outputted alternately.

As explained above, the present invention has a configuration in which signals corresponding to the real part and the imaginary part can be time-multiplexed and measured through the same route using two external input digital signals converted into the same data. So it can be measured with a single configuration.

Also, when measuring selected levels, increase the degree of multiplexing of the multiplex converter and digital signal generator.
sin2πf _L1 t, cos2πf _L1 t, sin2πf _L2 t, cos2πf _L2 t
to occur. At this time, the distortion factor can be measured by selecting f _L2 to be an integral multiple of f _L1 and measuring the levels of the fundamental wave and harmonics. Furthermore, f _L1 ,
By setting f _L2 to have an appropriate frequency relationship depending on the input signal, advantages such as being able to grasp cross-modulation characteristics can be obtained.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a conventional quadrature detection waveform selection level measuring device, FIG. 2 is a block diagram of a measuring device showing an embodiment of the present invention, and FIG. 3 is a time chart of the operation of FIG. 2. In the figure, 5 is a multiplex converter, 6 is a digital oscillator, 7 is a π/2 phase advancer, 8 is a switch, 9 is a digital signal generator, 10 is a multiplier, 11 is a low-pass digital filter, and 12 is a 2 multiplier, 13 is adder,
14 is a unit delay device.

Claims (1)

[Claims] 1 The external input digital signal is converted to its code speed n
(n is an integer of 2 or more) a multiplexing converter for converting into a signal with a code rate times as high as that of the external input digital signal, multiplexing n of the converted signals having the same data as the external input digital signal, and transmitting the same; A sine signal and a sine signal having the same frequency correspond to each pair of data of the multiplexed signal output from this multiplexing converter.
a digital signal generator for digitally generating a cos signal alternately; receiving and multiplying the output signal of the digital signal generator and the output signal of the multiplexing converter; a digital multiplier for outputting a signal having a signal having a frequency of the digital multiplier; a digital filter for selecting the frequency of this digital multiplier; A digital signal selection level measuring device comprising means for adding a signal corresponding to the real part of the output and a signal corresponding to the imaginary part of the output.