JPH0117877Y2 - - Google Patents

Info

Publication number
JPH0117877Y2
JPH0117877Y2 JP18604683U JP18604683U JPH0117877Y2 JP H0117877 Y2 JPH0117877 Y2 JP H0117877Y2 JP 18604683 U JP18604683 U JP 18604683U JP 18604683 U JP18604683 U JP 18604683U JP H0117877 Y2 JPH0117877 Y2 JP H0117877Y2
Authority
JP
Japan
Prior art keywords
circuit
output
resistor
operational amplifier
time constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP18604683U
Other languages
Japanese (ja)
Other versions
JPS6093345U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18604683U priority Critical patent/JPS6093345U/en
Publication of JPS6093345U publication Critical patent/JPS6093345U/en
Application granted granted Critical
Publication of JPH0117877Y2 publication Critical patent/JPH0117877Y2/ja
Granted legal-status Critical Current

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  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Description

【考案の詳細な説明】 (イ) 産業上の利用分野 この考案は二線式伝送器、特にダンピング回路
に特徴を有する二線式伝送器に関する。
[Detailed Description of the Invention] (a) Industrial Application Field This invention relates to a two-wire transmitter, and particularly to a two-wire transmitter featuring a damping circuit.

(ロ) 従来技術 従来よりよく使用される二線式伝送器の回路接
続図を第1図に示している。同図において、1は
その入力に圧力、温度あるいは流量等の物理量P
を受けると、その物理量を容量変化、インダクタ
ンス変化、抵抗変化等に変換し、さらにこの変化
に応じた電圧変化e1,e2を出力する変換回路、2
は抵抗R1,R2等から構成され、電圧変化e1
e2を加算する加算(演算)回路、3は演算増幅器
である。演算増幅器3の−(マイナス)入力端と、
cc電位間に接続される可変抵抗RDと、演算増幅
器3の出力端と、可変抵抗RDの可動端子に接続
されるコンデンサCによりダンピング回路4が構
成されている。演算増幅器3の出力端は、トラン
ジスタTrと出力抵抗Rpは直列接続されて出力回
路5を構成し、電源回路(定電圧源もしくは定電
流源)6とcc電位間に接続されている。
(b) Prior Art Figure 1 shows a circuit connection diagram of a two-wire transmitter that has been commonly used in the past. In the same figure, 1 is a physical quantity P such as pressure, temperature, or flow rate as its input.
a conversion circuit that converts the physical quantity into capacitance change, inductance change, resistance change, etc., and outputs voltage changes e 1 and e 2 corresponding to this change;
is composed of resistors R1, R2, etc., and voltage changes e 1 ,
An addition (operation) circuit that adds e2 , 3 is an operational amplifier. - (minus) input terminal of operational amplifier 3,
A damping circuit 4 is constituted by a variable resistor R D connected between the cc potentials, an output terminal of the operational amplifier 3, and a capacitor C connected to the movable terminal of the variable resistor R D. The output terminal of the operational amplifier 3 is connected in series with a transistor Tr and an output resistor R p to form an output circuit 5 and is connected between a power supply circuit (constant voltage source or constant current source) 6 and cc potential.

Bfは帰還抵抗であつて、この抵抗の両端に発
生した電圧efは、抵抗R3を介して演算増幅器3
の+(プラス)入力端に帰還されるようになつて
いる。なお、7は電源(たとえばDC23V)、8は
負荷である。この電源7及び負荷8は計器室側に
置かれ、二線式伝送線9により、変換回路側と接
続されている。
Bf is a feedback resistor, and the voltage ef generated across this resistor is passed through the resistor R3 to the operational amplifier 3.
It is designed to be fed back to the + (plus) input terminal of the In addition, 7 is a power supply (for example, DC23V), and 8 is a load. This power source 7 and load 8 are placed on the control room side, and are connected to the conversion circuit side by a two-wire transmission line 9.

上記回路において、抵抗RD及びコンデンサC
の時定数回路すなわちダンピング回路4は、入力
信号が場合によつて大きく変動する場合(たとえ
ばポンプ直後の流量信号)出力信号の変動を少な
くするために設けられている。このダンピング回
路4は、可変抵抗RDの可動端子をその電位が演
算増幅器3の−入力端と同電位となるように移動
したとき時定数が最大(R2RD)となり、逆
に可変抵抗RDの可動端子をその電位がcc電位と
なるように移動したとき時定数が最小(0)とな
る。
In the above circuit, resistor R D and capacitor C
The time constant circuit or damping circuit 4 is provided to reduce fluctuations in the output signal when the input signal sometimes fluctuates greatly (for example, the flow rate signal immediately after the pump). This damping circuit 4 has a maximum time constant (R2R D ) when the movable terminal of the variable resistor R D is moved so that its potential becomes the same potential as the negative input terminal of the operational amplifier 3 ; When the movable terminal of is moved so that its potential becomes cc potential, the time constant becomes minimum (0).

このようなダンピング回路4を含む従来の二線
式伝送器の欠点は、可変抵抗RDのの可動端子を
急激に移動させると、時定数の変化のみならずコ
ンデンサCの充電電圧のため出力変動が生じるこ
とと、コンデンサCの初期条件により、すなわち
演算増幅器3の出力端が0電位である初期条件下
において、電源投入すると電源回路6よりトラン
ジスタTrあるいは演算増幅器3を形成するICを
通じてコンデンサCに充電電流が流れ、その出力
電流が第3図に示すように一旦上昇することであ
る。
The disadvantage of a conventional two-wire transmitter including such a damping circuit 4 is that when the movable terminal of the variable resistor R D is suddenly moved, the output fluctuates not only due to a change in the time constant but also due to the charging voltage of the capacitor C. occurs, and due to the initial condition of the capacitor C, that is, under the initial condition that the output terminal of the operational amplifier 3 is at 0 potential, when the power is turned on, a voltage is applied to the capacitor C from the power supply circuit 6 through the transistor Tr or the IC forming the operational amplifier 3. A charging current flows and its output current rises once as shown in FIG.

(ハ) 目的 この考案の目的は、上記従来の二線式伝送器の
欠点を解消し、時定数を変化させても出力変動を
生じさせない、また電源投入時に出力電流上昇の
生じない二線式伝送器を提供するにある。
(C) Purpose The purpose of this invention is to eliminate the drawbacks of the conventional two-wire transmitter mentioned above, and to create a two-wire transmitter that does not cause output fluctuations even when the time constant is changed, and does not cause an output current increase when the power is turned on. There is a transmitter to provide.

(ニ) 構成 上記目的を達成するために、この考案の二線式
伝送器は、加算回路の出力側と演算増幅器の一方
の入力端間に時定数回路を構成する可変抵抗を接
続するとともに、この可変抵抗の可変端子と帰還
抵抗の他端(二線式伝送線接続側)に時定数回路
を構成するコンデンサを接続するようにしてい
る。
(d) Configuration In order to achieve the above object, the two-wire transmitter of this invention connects a variable resistor forming a time constant circuit between the output side of the adder circuit and one input terminal of the operational amplifier, and A capacitor constituting a time constant circuit is connected to the variable terminal of this variable resistor and the other end (two-wire transmission line connection side) of the feedback resistor.

(ホ) 実施例 以下、実施例により、この考案をさらに詳細に
説明する。
(e) Examples This invention will be explained in more detail below using examples.

第2図は、この考案の一実施例を示す二線式伝
送器の回路接続図である。
FIG. 2 is a circuit connection diagram of a two-wire transmitter showing an embodiment of this invention.

同図において、ダンピング回路10を設けたこ
とと、加算回路2を抵抗R1,R2,R3,R4
で構成したことを除いて、他の回路部は第1図に
示す回路と同様に構成されている。ダンピング回
路10は、可変抵抗RDとコンデンサCから構成
されている。
In the figure, the damping circuit 10 is provided, and the adding circuit 2 is connected to resistors R1, R2, R3, R4.
The other circuit sections are constructed in the same manner as the circuit shown in FIG. 1, except that the circuit shown in FIG. The damping circuit 10 is composed of a variable resistor R D and a capacitor C.

可変抵抗RDは、加算回路2を構成する抵抗R
1と抵抗R3の接続端と演算増幅器3の+入力端
間に接続されており、この可変抵抗RDの可動端
子と帰還抵抗Rfの二線式伝送線9の接続側端間
にコンデンサCが接続されている。
The variable resistor R D is the resistor R that constitutes the adder circuit 2.
A capacitor C is connected between the movable terminal of the variable resistor R D and the connecting end of the two-wire transmission line 9 of the feedback resistor R f . is connected.

以上のように接続構成される実施例回路におい
て、可変抵抗RDの抵抗値を変化させても、演算
増幅器3の入力インピーダンスは通常無限大と考
えて、定常状態では可変抵抗RDに電流が流れて
いないので、演算増幅器3の入力は変化しない。
したがつて出力変動は生じない。
In the example circuit configured as described above, even if the resistance value of the variable resistor R D is changed, the input impedance of the operational amplifier 3 is normally considered to be infinite, and in a steady state, the current flows through the variable resistor R D. Since no current is flowing, the input of operational amplifier 3 does not change.
Therefore, no output fluctuation occurs.

また、電源7すなわちDC24Vの投入時は、コ
ンデンサCの両端電圧は0(電源断時に抵抗R3
を通して放電)なので、演算増幅器3の出力e0
0からスタートし、出力電流は第4図に示すよう
になり、何らオーバシユートすることはない。
Also, when power supply 7, ie 24V DC, is turned on, the voltage across capacitor C is 0 (when power is turned off, resistor R3
Therefore, the output e 0 of the operational amplifier 3 starts from 0, and the output current becomes as shown in FIG. 4, without any overshoot.

なお、第3図、第4図において、tiは電源投入
時点を示している。
Note that in FIGS. 3 and 4, ti indicates the time when the power is turned on.

(ヘ) 効果 以上のようにこの考案の二線式伝送器によれ
ば、ダンピング回路の時定数回路構成用の可変抵
抗を加算回路と演算増幅器の入力の一端間に接続
し、かつ時定数回路構成用のコンデンサを上記可
変抵抗の可変端子と帰還抵抗の二線式伝送線接続
端側に接続するものであるから、上記抵抗値等を
変化して時定数を変えても、出力に変動を与える
ことはないし、また電源投入時のコンデンサの両
端電圧が常に0なので、電源投入時に出力電流が
一旦上昇する現象、すなわちオーバシユートが生
じることも防止できる。しかも、上記改善をはか
るために、可変抵抗とコンデンサの接続を変える
のみなので、そのためにコスト高となることもな
い。
(f) Effect As described above, according to the two-wire transmitter of this invention, the variable resistor for configuring the time constant circuit of the damping circuit is connected between the adder circuit and one end of the input of the operational amplifier, and the time constant circuit Since the configuration capacitor is connected to the variable terminal of the variable resistor and the two-wire transmission line connection end of the feedback resistor, even if the time constant is changed by changing the resistance value etc., there will be no fluctuation in the output. Moreover, since the voltage across the capacitor is always 0 when the power is turned on, it is possible to prevent the phenomenon in which the output current temporarily increases when the power is turned on, that is, overshoot. Moreover, in order to achieve the above-mentioned improvement, only the connection between the variable resistor and the capacitor is changed, so there is no increase in cost.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の二線式伝送器の回路接続図、第
2図はこの考案の一実施例を示す二線式伝送器の
回路接続図、第3図は第1図に示す二線式伝送器
の電源投入時の出力電流特性を示す図、第4図は
第2図に示す二線式伝送器の電源投入時の出力電
流特性を示す図である。 1:変換回路、2:加算回路、3:演算増幅
器、5:出力回路、6:電源回路、8:負荷、
9:二線式伝送線、10:ダンピング回路、
Rf:帰還抵抗、Rp:出力抵抗、Tr:出力トラン
ジスタ、RD:可変抵抗(時定数回路構成用)、
C:コンデンサ(時定数回路構成用)。
Fig. 1 is a circuit connection diagram of a conventional two-wire transmitter, Fig. 2 is a circuit connection diagram of a two-wire transmitter showing an embodiment of this invention, and Fig. 3 is a circuit connection diagram of a two-wire transmitter shown in Fig. 1. FIG. 4 is a diagram showing the output current characteristics of the two-wire transmitter shown in FIG. 2 when the power is turned on. 1: conversion circuit, 2: addition circuit, 3: operational amplifier, 5: output circuit, 6: power supply circuit, 8: load,
9: Two-wire transmission line, 10: Damping circuit,
R f : Feedback resistance, R p : Output resistance, Tr: Output transistor, R D : Variable resistance (for time constant circuit configuration),
C: Capacitor (for time constant circuit configuration).

Claims (1)

【実用新案登録請求の範囲】 圧力、温度あるいは流量等の物理量を受けて電
気信号e1,e2に変換する変換回路1と、この変換
回路1よりの電気信号e1,e2を受けて両信号を加
算する加算回路2と、この加算回路2で加算され
た信号を増幅する演算増幅器3と、この演算増幅
器3の出力を入力に受けるトランジスタTrと出
力抵抗Rpが直列接続される出力回路5と、これ
ら各回路に電源電圧を供給する電源回路6と、前
記各回路の基準電位端CCに、一端が接続される
帰還抵抗Rfと、前記電源回路6と前記帰還抵抗
Rfの他端に、二線式伝送線9を介して接続され
る負荷回路8とを備える二線式伝送器において、 前記加算回路2の出力側と前記演算増幅器3の
一方の入力端間に、時定数回路10を構成する可
変抵抗RDを接続するとともに、この可変抵抗RD
の可変端子と前記帰還抵抗Rfの他端間に時定数
回路10を構成するコンデンサCを接続してなる
ことを特徴とする二線式伝送器。
[Claims for Utility Model Registration] A conversion circuit 1 that receives physical quantities such as pressure, temperature, or flow rate and converts them into electrical signals e 1 and e 2 , and a circuit that receives electrical signals e 1 and e 2 from this conversion circuit 1 An output in which an adder circuit 2 that adds both signals, an operational amplifier 3 that amplifies the signal added by this adder circuit 2, and a transistor Tr that receives the output of this operational amplifier 3 and an output resistor R p are connected in series. a circuit 5, a power supply circuit 6 that supplies power supply voltage to each of these circuits, a feedback resistor R f whose one end is connected to the reference potential terminal CC of each of the circuits, the power supply circuit 6 and the feedback resistor.
In a two-wire transmitter including a load circuit 8 connected to the other end of R f via a two-wire transmission line 9, between the output side of the adder circuit 2 and one input terminal of the operational amplifier 3. A variable resistor R D constituting the time constant circuit 10 is connected to the variable resistor R D .
A two-wire transmitter characterized in that a capacitor C constituting a time constant circuit 10 is connected between the variable terminal of the feedback resistor R f and the other end of the feedback resistor R f .
JP18604683U 1983-11-30 1983-11-30 two wire transmitter Granted JPS6093345U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18604683U JPS6093345U (en) 1983-11-30 1983-11-30 two wire transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18604683U JPS6093345U (en) 1983-11-30 1983-11-30 two wire transmitter

Publications (2)

Publication Number Publication Date
JPS6093345U JPS6093345U (en) 1985-06-26
JPH0117877Y2 true JPH0117877Y2 (en) 1989-05-24

Family

ID=30401964

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18604683U Granted JPS6093345U (en) 1983-11-30 1983-11-30 two wire transmitter

Country Status (1)

Country Link
JP (1) JPS6093345U (en)

Also Published As

Publication number Publication date
JPS6093345U (en) 1985-06-26

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