JPH01196614A - Memory card - Google Patents
Memory cardInfo
- Publication number
- JPH01196614A JPH01196614A JP63022343A JP2234388A JPH01196614A JP H01196614 A JPH01196614 A JP H01196614A JP 63022343 A JP63022343 A JP 63022343A JP 2234388 A JP2234388 A JP 2234388A JP H01196614 A JPH01196614 A JP H01196614A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- internal battery
- memory card
- lcd display
- cmp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 7
- 238000001514 detection method Methods 0.000 claims description 4
- 239000000126 substance Substances 0.000 abstract 2
- 101000737979 Schizosaccharomyces pombe (strain 972 / ATCC 24843) Charged multivesicular body protein 7 Proteins 0.000 description 7
- 101000760646 Homo sapiens Phosphatidylserine lipase ABHD16A Proteins 0.000 description 4
- 102100024634 Phosphatidylserine lipase ABHD16A Human genes 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Landscapes
- Credit Cards Or The Like (AREA)
- Power Sources (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はメモリカードに関し、特にバックアップ電池の
電圧低下警告表示付きのメモリカードに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a memory card, and more particularly to a memory card with a backup battery voltage drop warning display.
第4図は従来のメモリカードの一例を示す回路図で、揮
発性半導体メモリ(以下MEM)4と、バックアップ電
池(以下BAT)5と、接続用コネクタ(以下C0N)
3とを備え、BAT5から抵抗およびダイオードを介し
てM E M 4にバックアップ電圧を供給するととも
に、BAT5の両極をC0N3のピン6a、6bに配線
しである。C0N3に挿着した外部袋W(図示していな
い)はピン31.32間の電圧を監視し、これが所定の
電圧より低くなったとき電圧低下を警報表示するように
なっていた。Figure 4 is a circuit diagram showing an example of a conventional memory card, which includes a volatile semiconductor memory (hereinafter referred to as MEM) 4, a backup battery (hereinafter referred to as BAT) 5, and a connecting connector (hereinafter referred to as C0N).
3, a backup voltage is supplied from BAT5 to MEM4 via a resistor and a diode, and both poles of BAT5 are wired to pins 6a and 6b of C0N3. An external bag W (not shown) inserted into C0N3 monitored the voltage between pins 31 and 32, and displayed a voltage drop alarm when it became lower than a predetermined voltage.
上述した従来のメモリカードでは、メモリカード単体で
内部電池の電圧状態を確認できないので、外部装置と接
続しない限り気づかぬうちに電圧が下っていて書込み内
容がこわれてしまったり、あるいは書き込んだ内容が保
存されなかったりしな。With the conventional memory cards mentioned above, it is not possible to check the voltage status of the internal battery on the memory card itself, so unless it is connected to an external device, the voltage may drop without you noticing and the written content may be damaged or lost. It might not have been saved.
また、電圧の確認のためには外部装置は接続するわずら
れしさがあるため、電圧状態に関係なく電池を定期的に
交換するなど無駄が多いという欠点がある。In addition, since it is cumbersome to connect an external device to check the voltage, there is a drawback that there is a lot of waste, such as periodically replacing the battery regardless of the voltage state.
本発明のメモリカードは、読出し、書込み可能な揮発性
半導体メモリと、この揮発性半導体メモリ内に書き込ま
れたデータを保持しておくための内部電池と、読出し、
書込み時に外部から供給される電源と前記内部電池との
切替制御等を行う制御回路と他機器との間の接続のため
のコネクタを含んでなるメモリカードにおいて、前記内
部電池の電圧があらかじめ定めた電圧より高いか低いが
を検出する検出回路と、LCD表示器と、前記検出回路
が前記内部電池の電圧が前記あらがしめ定めた電圧より
高いことを検出した時には前記LCD表示器を駆動状態
とし低いことを検出した時には前記LCD表示器を非駆
動状態とする制御を行う表示器制御回路とを備えている
。The memory card of the present invention includes a readable and writable volatile semiconductor memory, an internal battery for holding data written in the volatile semiconductor memory, and a readable and writable volatile semiconductor memory.
In a memory card that includes a connector for connection between a control circuit that performs switching control between an externally supplied power source and the internal battery during writing, and a connector for connection with other devices, the voltage of the internal battery is predetermined. a detection circuit for detecting whether the voltage is higher or lower than the predetermined voltage; an LCD display; and when the detection circuit detects that the voltage of the internal battery is higher than the predetermined voltage, the LCD display is set to a driving state. and a display control circuit that controls the LCD display to be in a non-driving state when a low level is detected.
次に本発明について第1図〜第3図を参照して説明する
。Next, the present invention will be explained with reference to FIGS. 1 to 3.
第1図、第2図はそれぞれ本発明のメモリカードの一実
施例を示す部分回路図、外観図である。FIGS. 1 and 2 are a partial circuit diagram and an external view, respectively, showing an embodiment of the memory card of the present invention.
第2図に示すようにメモリカード本体1の一部にLCD
表示器(以下LCD)2が組み込まれている。第1図に
おいて、比較回路(以下CMP)7は既知の電圧比較用
専用ICで構成されており内部に正確な基準電圧を内蔵
している。CMP7への入力はBAT5の電圧があらか
じめ定めた電圧になった時、CMP7に内蔵されている
基準電圧と同じ値となるように抵抗R,,R2により分
圧して与えている。発振器(以下osc>sはインバー
タやタイマ機能ICとコンデンサ。抵抗等で構成されて
いる。排他的論理和回路(以下EXOR)9はCMP7
の出力信号レベルによってインバータか単なるバッファ
かに機能が変わる。LCD2はoscsとEXOR9の
出力が各電極に加えられており、その位相によって駆動
状態あるいは非駆動状態となる。As shown in Fig. 2, there is an LCD in a part of the memory card body 1.
A display device (hereinafter referred to as LCD) 2 is incorporated. In FIG. 1, a comparator circuit (hereinafter referred to as CMP) 7 is constituted by a known dedicated IC for voltage comparison, and has an accurate reference voltage built therein. The input to CMP7 is divided by resistors R, , R2 so that when the voltage of BAT5 reaches a predetermined voltage, it becomes the same value as the reference voltage built into CMP7. The oscillator (hereinafter osc>s is an inverter, a timer function IC, and a capacitor. It is composed of resistors, etc. The exclusive OR circuit (hereinafter EXOR) 9 is the CMP7
The function changes depending on the output signal level of the inverter or a simple buffer. The outputs of oscs and EXOR9 are applied to each electrode of the LCD 2, and the LCD 2 is in a driven state or a non-driven state depending on the phase thereof.
第3図は第1図に示した実施例のタイムチャートである
。V7HはCMP7内部の基準電圧である。FIG. 3 is a time chart of the embodiment shown in FIG. V7H is a reference voltage inside CMP7.
ここで、CMP7の入力電圧が基準電圧VTI+より高
いとき、CMP7の出力はローレベルL′″cEXOR
9はインバータ機能となり、LCD2の両電極にかかる
電圧は互いに逆位相となるので、電極間に駆動電圧が発
生して駆動状態となる。一方、基準電圧VT)!より低
くなると、CMP7の出力はハイレベルHとなりEXO
R9は単なるバッファ機能となり、LCD2の両電極に
かかる電圧は同位相となるので、電極間には駆動電圧が
発生せず非駆動状態となる。またこの状態はBAT5の
電圧が全くなくなった場合と同じである。Here, when the input voltage of CMP7 is higher than the reference voltage VTI+, the output of CMP7 is low level L'''cEXOR
Reference numeral 9 has an inverter function, and since the voltages applied to both electrodes of the LCD 2 are in opposite phases to each other, a driving voltage is generated between the electrodes, resulting in a driving state. On the other hand, the reference voltage VT)! When it becomes lower, the output of CMP7 becomes high level H and EXO
R9 serves as a mere buffer function, and the voltages applied to both electrodes of the LCD 2 are in the same phase, so no driving voltage is generated between the electrodes, resulting in a non-driving state. Moreover, this state is the same as when the voltage of BAT5 disappears completely.
以上説明したように本発明は、メモリカード本体にLC
D表示器を備え、内部電池の電圧が基準電圧より高いか
低いかを検出し、その結果によってLCD表示器を駆動
状態あるいは非駆動状態にすることにより、メモリカー
ド単体で内部電池状態を常に確認できる効果がある。ま
た、内部電池の電力が全くなくなった場合もLCD表示
器を非駆動状態にするので、内部電池の電圧低下状態を
正しく表示できる効果がある。As explained above, the present invention provides an LC in the memory card body.
Equipped with a D display, it detects whether the voltage of the internal battery is higher or lower than the reference voltage, and depending on the result, the LCD display is activated or deactivated, allowing you to constantly check the internal battery status with a single memory card. There is an effect that can be done. Moreover, since the LCD display is brought into a non-driving state even when the internal battery runs out of power, it is possible to accurately display the voltage drop state of the internal battery.
第1図、第2図はそれぞれ本発明のメモリカードの一実
施例を示す部分回路図、外観図、第3図は第1図に示し
た実施例のタイムチャート、第4図は従来のメモリカー
ドの一例を示す回路図である。
1・・・メモリカード本体、2・・・LCD表示器(L
CD)、3・・・接続用コネクタ(CON)、4・・・
揮発性半導体メモリ(MEM)、5・・・バックアップ
電池(BAT)、6a、6b・・・ピン、7・・・比較
回路(CMP)、8・・・発振器(○SC)、9・・・
排他的論理和回路(EXOR)。1 and 2 are a partial circuit diagram and an external view showing an embodiment of the memory card of the present invention, FIG. 3 is a time chart of the embodiment shown in FIG. 1, and FIG. 4 is a conventional memory card. FIG. 3 is a circuit diagram showing an example of a card. 1...Memory card body, 2...LCD display (L
CD), 3... Connection connector (CON), 4...
Volatile semiconductor memory (MEM), 5... Backup battery (BAT), 6a, 6b... Pin, 7... Comparison circuit (CMP), 8... Oscillator (○SC), 9...
Exclusive OR circuit (EXOR).
Claims (1)
発性半導体メモリ内に書き込まれたデータを保持してお
くための内部電池と、読出し、書込み時に外部から供給
される電源と前記内部電池との切替制御等を行う制御回
路と他機器との間の接続のためのコネクタを含んでなる
メモリカードにおいて、前記内部電池の電圧があらかじ
め定めた電圧より高いか低いかを検出する検出回路と、
LCD表示器と、前記検出回路が前記内部電池の電圧が
前記あらかじめ定めた電圧より高いことを検出した時に
は前記LCD表示器を駆動状態とし低いことを検出した
時には前記LCD表示器を非駆動状態とする制御を行う
表示器制御回路とを備えることを特徴とするメモリカー
ド。A readable and writable volatile semiconductor memory, an internal battery for holding data written in the volatile semiconductor memory, and switching between an externally supplied power source and the internal battery during reading and writing. In a memory card comprising a connector for connection between a control circuit that performs control etc. and other equipment, a detection circuit that detects whether the voltage of the internal battery is higher or lower than a predetermined voltage;
an LCD display; and when the detection circuit detects that the voltage of the internal battery is higher than the predetermined voltage, the LCD display is driven, and when the voltage of the internal battery is lower than the predetermined voltage, the LCD display is driven, and when the voltage is lower than the predetermined voltage, the LCD display is driven. A memory card characterized by comprising a display control circuit that performs control.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63022343A JPH01196614A (en) | 1988-02-01 | 1988-02-01 | Memory card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63022343A JPH01196614A (en) | 1988-02-01 | 1988-02-01 | Memory card |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01196614A true JPH01196614A (en) | 1989-08-08 |
Family
ID=12080038
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63022343A Pending JPH01196614A (en) | 1988-02-01 | 1988-02-01 | Memory card |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01196614A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0430285A (en) * | 1990-05-25 | 1992-02-03 | Hitachi Ltd | Memory card |
-
1988
- 1988-02-01 JP JP63022343A patent/JPH01196614A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0430285A (en) * | 1990-05-25 | 1992-02-03 | Hitachi Ltd | Memory card |
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