JPH01214977A - Analog IC design support system - Google Patents

Abstract

PURPOSE:To make concrete circuit design easier against functional specifications by providing a descending or ascending interface between function dividing sections (function designing sections) which design functional specifications and circuit dividing sections (circuit designing sections) which design circuit structures. CONSTITUTION:An ascending/descending interface 16 which converts each functional element into circuit specifications or circuit specifications into each functional element by referring to a mapping memory 16a indicating the correlation between functional descriptions and circuit descriptions is provided between function dividing section 13-15 and circuit dividing section 17-19. Therefore, the vague functional element (description) of an analog IC can be fitted to the definite circuit specifications (description). Accordingly, function dividing and circuit dividing are consistently performed in accordance with abstract functional specifications in an analog IC designing system and concrete circuit design can be made easily.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an analog IC design support system, and particularly to an analog IC design support system using a knowledge processing system.

[Conventional technology]

Conventionally, as a general prediction system based on simulation using a layered artificial intelligence library, the American academic journal S
I MULAT I ON, Dec, 1986
, J., G.

Mo se r's paper' Intgliration
of artificialinttllillmc
g and simulation in a crm
prghgnzittg dtcizion-tILp
There is a port system 'K described.

Furthermore, systems related to digital ICKs have been known as circuit design support systems for ICs and the like.

FIG. 2 shows the configuration and design procedure of a general IC design support system. FIG. 2 shows that the conventional digital I
The C design support system will be explained below. 209 is a functional simulator, 210 is a circuit simulator, and 211 is an intelligent circuit library (existing circuit library). In the case of digital IC design, all of these simulators and libraries are provided.

In functional studies at the upstream functional level, the system is divided according to the target specifications of the system. That is, the entire system is divided into parts to be implemented as LSI and parts not to be implemented as LSI, and the number of LSIs to be constructed from the part to be implemented as LSI is determined (201).
. Next, for each LSI, the existing circuit library 211 is referred to for each functional unit such as a multiplier circuit, a decoding circuit, etc., and the block specifications are determined at the same time (202). At this time, function simulator 2
09 is used to design interconnection circuits inside and outside each block (203), and verify whether the block specification division is correct (204).

Once the system design is complete, at the lower circuit level,
Enter detailed circuit design (205). A past design circuit is called from the existing circuit library 211 based on the block specification. Divide the previously designed circuit into usable and unusable parts, and change the resistance value, transistor size, etc. of the usable part so that it satisfies the desired specifications.

If a designed circuit diagram is not available, create a new circuit. Next, circuit evaluation and overall evaluation are performed using the circuit simulator 210 (206, 207) to confirm whether the changed circuit operates correctly, and if confirmed, chip design (208) begins.

Furthermore, support systems for designing analog ICs using only the circuit simulator 210 and the intelligent circuit library 211 are known. However, analog IC
Unlike digital IC/design support systems, design support systems do not design circuits by combining a function simulator and a circuit simulator.

[Line problem to be solved by the invention]

Conventionally, the reason why a functional simulator has not been combined with a circuit simulator in an analog IC design support system is as follows.

In other words, in the case of digital ICs, the functional elements (functional expressions) are themselves clear (for example, a 1+1 counting function, etc.), and once a functional element is determined, the corresponding circuit is also often uniquely determined. You can call the required circuit from the circuit library. On the other hand, in the case of analog ICs, functional expressions inherently have ambiguity, so it is not possible to immediately determine a corresponding circuit based on functional expressions.

As described above, in the conventional technology, it is difficult to design and realize a specific circuit structure for given functional specifications in an analog IC design support system.

Therefore, it is an object of the present invention to solve the problems of the prior art described above, and to provide an analog IC design support system with a functional design section that receives upstream functional specifications and a circuit design section that designs downstream specific circuit structures. The object of this invention is to make it possible to combine these types with consistency, thereby easily realizing a specific circuit design for a given functional specification of this kind of analog IC.

[Means to solve the problem]

In order to achieve the above object, the analog IC design support system of the present invention basically consists of a functional division section (functional design section) that receives functional specifications and a circuit division section (circuit design section) that designs circuit structures. In between, a descending or ascending interface is provided to bridge the two.

More specifically, upon receiving a functional specification, the function dividing unit performs functional division by referring to a functional library while interacting with a functional simulator, and upon receiving a circuit specification, the circuit dividing unit interacts with a circuit simulator. The circuit is divided by referring to the circuit library. In the case of descending, the descending or ascending interface converts each functional element obtained by the functional division section into circuit specifications by referring to a mapping memory, and inputs the converted circuit specifications to the circuit division. If necessary, if the descending or ascending interface is an ascending interface, by referring to the mapping memory, the circuit specifications determined by the circuit division section are converted into functional elements and input into the functional division section. do.

[Effect]

The operation based on the above configuration will be explained.

Upon receiving the functional specification, the functional division unit searches the functional library for a functional element that matches the functional specification, inputs it to the functional simulator, performs simulation, and determines parameters. The descending interface is coupled to a mapping memory that has a description that associates functional elements with circuit specifications, and when it receives the output from the function division unit, it converts the functional description into a circuit description by referring to the mapping memory. and input it to the circuit dividing section. The circuit dividing unit searches the circuit library for circuit elements that meet the specifications, inputs them to a circuit simulator, performs simulation, and determines parameters. As a result of the circuit simulation, if the circuit evaluation passes, the circuit division results are output as they are. If it fails, it will go into ascending mode,
Perform the opposite operation to the descending case and start over again from the function division.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 and 3. FIG. 1 is a block diagram of the system of this embodiment, and FIG. 3 is a flowchart showing its procedure.

Functional division processor 13 that provides functional specifications to this system
reads the functional specifications (31) and performs functional division based on the functional specifications. This functional division is performed with reference to the memory (function library) 14, and the function library 1
4 is searched for a functional element that matches the functional specifications (32).

These functional elements are input to the functional simulator 15, and the functional simulator designs the junction circuit (3
3). Next, the rise/fall interface processor 16
enters the descending mode, inputs the functional elements (functional descriptions) of the functional division results obtained by the functional division processor 13, and stores them in the mapping memory 16a (a map for associating functional descriptions with circuit descriptions). By referring to , the conversion into circuit input specifications (circuit description) is performed (34). The circuit division processor 17 reads the circuit specification (35) and performs circuit division based on this circuit specification. Circuit division is performed with reference to the mesh (circuit library) 18, and circuit elements that meet the specifications are searched from the circuit library 18 (36). This circuit element is input to the circuit simulator 19, and a simulation is performed to determine parameters (37). Circuit evaluation at this time is performed using the circuit simulator 19. If the circuit evaluation passes, the circuit division result is directly output from the circuit division processor 17 to the circuit diagram output section. Note that if the circuit evaluation fails, the process returns to the original state, the ascending/descending interface processor 16 enters the ascending mode, and the circuit elements according to the circuit input specifications (
Convert circuit description) into functional elements (functional description) as a result of functional division and elevate them. Then, the functional division is changed and the data is again run on the functional simulator 15 to perform functional division. By repeating the rise/fall in this way, the consistency between functional division and circuit division is improved and optimization is performed.

FIG. 4 shows the state of functional division and circuit division for explaining a PLL circuit design system as a specific embodiment of the present invention. The operation of FIG. 4 will be explained with reference to FIG.

The function division processor 13 divides the PLL circuit 40 into an error detection section 41 and an error correction section 42 while referring to the function library 14 based on the function division rule.

Similarly, while referring to the function library 14 according to the function division rule, the error detection unit 41 further uses the PC (phase comparator) 4.
The error correction section 42 is further divided into a loop filter 45 and a VCO (voltage controlled oscillator) 46. Finally, from function library 14, 'this 4
Block PC 43, amplifier 44, loop filter 45
, and the characteristics of the VCO 46 (eg, sine wave characteristics, gain, F(a), 1/3) are called. Regarding circuit division, although only the case of the low-pass filter 47 is shown in the figure, other circuit sections are similarly divided. Here, the circuit processor 17 uses the low-pass filter 4 while referring to the circuit library 18 based on the circuit division rule.
7 is divided into a resistance portion 48 and a capacitor portion 49. Similarly, the components of the resistor section 48 and capacitor section 49 are called up while referring to the circuit library 18 according to the circuit division rule. The ascending/descending interface 16 refers to the mapping memory to associate the transfer function A of the loop filter 45 with the CR of the low-pass filter 47. Thereby, functional elements and circuit specifications (circuit elements) are associated with each other on a one-to-one basis.

FIG. 5 shows an example of the description contents of functional division, circuit division, and ascending/descending interface in the embodiment of FIG. 4. An example of functional division 51 is that the PLL circuit is divided into an error detection section and an error correction section, and the error detection section is a PC...
. . . and gain amplifiers, and the error correction section consists of a loop filter with a transfer function A and 1. /s VCO
It describes that it is divided into K. An example 52 of circuit division is
This shows that a low-pass filter with characteristic r is divided into a resistor part and a capacitor part. An example 53 of the rise/fall interface shows that a loop filter with a transfer function A in the functional description corresponds one-to-one to a low-pass filter with a characteristic r in the circuit description, and A is equal to r.

[Effects of the Invention] As described above in detail, according to the analog IC design system of the present invention, a mapping memory indicating a correspondence between a functional description and a circuit description is provided between the functional division section and the circuit division section. As a result, an ascending/descending interface is provided to convert each functional element into a circuit specification or vice versa, so that an ambiguous analog IC functional element (description) can be adapted to a clarified circuit specification (description). This makes it possible to design and realize concrete circuits by consistently dividing functions and circuits based on abstract functional specifications in analog IC design systems, which was previously difficult. It has excellent effects.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the analog IC design support system of the present invention, FIG. 2 is a block diagram showing the configuration and design procedure of a general IC design support system, and FIG. 3 is the block diagram of the present invention. FIG. 4 is a flowchart showing the design procedure in an embodiment of an analog IC design system, FIG. 4 is a diagram showing functional division and circuit division in an embodiment of the present invention when designing a PLL circuit as an example of an analog IC, and FIG. FIG. 3 is a diagram illustrating an example of a description of functional division, circuit division, and ascending/descending interfaces. 13...Functional division processor, 14...
... Function library, 15,209 ... Function simulator, 16 ... Ascending/descending interface processor, 16a ... Mapping memory,
17...Circuit division processor, 18...
-Circuit library, 19.210...Circuit simulator, 211...'...Intelligent circuit library. Figure 1 Figure 2 Figure 7 Figure 4 Section 5

Claims (1)

[Claims] 1. When a functional specification is input, the function division part performs function division by referring to the function library while interacting with the function simulator, and when a circuit specification is input, it is divided by referring to the circuit library while interacting with the circuit simulator. A circuit dividing section that divides the circuit by using a mapping memory, and a mapping memory between the functional dividing section and the circuit dividing section, converts each function obtained in the functional dividing section into circuit specifications and divides the circuit. an analog IC design support system comprising a descending or ascending interface that inputs the circuit specifications determined by the circuit dividing section into each function, or converts the circuit specifications determined by the circuit dividing section into each function and inputs the converted circuit specifications to the function dividing section.