JPH01217603A - Programmable controller - Google Patents

Abstract

PURPOSE:To improve the handling performance of a programmable controller by adding a writing area for an original working program to a user program memory together with a specific area where the separate/independent interval time check instruction and its related programs are written. CONSTITUTION:The writing of a working control program is started at the head address 00 of a user program. Then a start process TMC instruction and an abnormal process program are written at and after an address 80 or 85 after the working control program is written. Thus the work efficiency is improved regardless of the troublesome insertion of the TMC instruction different from an original action that is carried out during the production of a program. Furthermore the input mistakes are decreased for the working control program and the programs related to the TMC instruction together with the facilitated check of them since said programs have their writing areas separate from each other.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The inventions of - relate to a process walk-type stored program programmable controller having an interval timer check function.

(Summary of the Invention) This invention relates to a step-by-step programmable controller equipped with an interval timer check function that monitors the time required for step-by-step from an arbitrary step to another arbitrary step, in which a user program is written. By writing the interval timer check-related program separately and independently from the original operating program in a specific area within the controller, it is easier to create, write, and check the program.

(Prior art and its problems) A step-by-step stored program programmable controller (hereinafter simply referred to as PC) equipped with an interval timer check instruction is already known from Japanese Patent Laid-Open No. 56-2003. It is being

A program using the interval timer check instruction in these PCs is structured as shown in Table 1, and a user program including this program is written in the user program area of the memory as shown in FIG.

In the program shown in Table 1, operation codes and operands representing the control contents are written for each process from the beginning of the user program area in memory, and the program written in one line usually contains the control contents for one process. , and the process numbers correspond to the same address.

In the figure, an interval timer check instruction indicated by operation code T'MC is written to address X, and operation code T'MC
The Y written next to ``Y'' indicates the step number at which the monitoring of the required time ends, and the next T indicates the time allowed until the specified step is reached.

This command monitors the time required from X process to Y process, that is, the time required to complete the (Y-1) process, and if the time exceeds the specified time T,
The MC flag is set.

In actual operation, these programs provide the specified time T.
When the value exceeds F t, the 7MC flag provided inside the PC is set and the output of the FLAG terminal is turned on.
"1" is input to the interrupt INT terminal connected to the AC terminal. Then, the jump instruction (JNP) written at address 00 causes the abnormality processing program written from address Z onwards to be started by interrupt processing.

In order to detect the setting of the 7MC flag and execute the abnormality processing program, a dedicated FLAG terminal and IN
T-terminals must be provided as hardware, and the user also has to perform wiring work between these terminals, which is unsatisfactory in terms of cost and usability.

Also, it is possible to perform abnormality processing using the 7MC flag without relying on the hardware configuration (it is also possible to execute it only by software, but in that case, the '11' of the 7MC flag
A condesion jump instruction (CJP) is used to jump to the Z address using the input condition.

However, in this case, the CJP command must be written every other line or every two lines after address X, which makes programming work cumbersome.

Moreover, if some abnormality occurs during the process and the input conditions are not met and the process stops, the abnormal process may not be executed even after the specified time has elapsed. There was a problem with transferability.

As described above, in a conventional program including an interval timer check instruction, the interval timer check instruction is mixed in the original sequence operation program. However, process-progressive PCs are aimed at casual engineers who are not familiar with so-called computer technology, and it is difficult for these engineers to understand computer-specific technologies such as interrupts and parallel execution of programs. is the reality.

Therefore, conventional PCs do not match the thought process of program designers at this layer, and program design,
Writing, checking, and rewriting for changes were cumbersome and inefficient.

(Object of the Invention) The present invention has been proposed in view of the above points, and its purpose is to provide an easy-to-use process step type PC that facilitates the creation, writing, and checking of programs related to interval timer checking. It is to provide.

(Structure and Effects of the Invention) In order to achieve the above object, the present invention has a storage area corresponding to each process number, and each storage area stores process step instructions representing conditions for stepping to other steps. and a user program memory in which user programs such as an output command that determines the signal state of each output terminal and an interval timer check command that monitors the time required for stepping between specific steps are stored, and an external input signal is applied from the input terminal. an input circuit, an output circuit for sending an external output signal to an output terminal, an arithmetic processing means for calling the storage area in the order of the process number and executing a user program stored in the area, and each of the user program memories. A step-by-step programmable controller is equipped with a writing means for writing the above-mentioned kneaded 1 gram into the storage area, and an interval timer that is separate and independent from the original operation program writing area in the user program memory. It is characterized by providing a specific area for writing check instructions and related programs.

According to this invention, by writing the original operation program and the interval timer check-related program into separate write areas, the interval timer check instruction (hereinafter referred to as Even if there is a process corresponding to the 7MC command (referred to as FTMC command), the program can be created using only the original program without writing the 7MC command into the program.

Furthermore, once these programs have been created, the 7MC command and its abnormality handling program can be created in another area.

In this way, when creating a program that includes the 7MC instruction, the original control operation program can be created independently of the 7MC instruction, which improves program creation efficiency and simplifies program checking and rewriting operations.
Improves PC usability.

Further, there is no need for a person or an output terminal just for starting abnormality processing, which was conventionally necessary, and the manufacturing cost of the PC can be reduced.

(Explanation of Examples) FIG. 1 is an external front view of a PC according to the present invention.

In the figure, at the upper left of the surface of the panel 1 formed on the front of the PC body, there is an LED 21 for displaying the operating mode.
23, and on the right side thereof two 7-segment display tubes 31, 32 for displaying numerical data.
and LE indicating that the numerical data is the process number
D33, the numerical data of which is also the DI of the operand in the 7MC instruction described later, D2. L indicating D3 respectively
A data display section 3 is provided which includes an ED 34, an LED 35, an LED 36, and the like.

On the right side of the data display section 3, there are 16 program display section LEDs 4 provided in a horizontal row corresponding to each input terminal to indicate the setting contents of the input terminals during programming, and the program display section LED4. On the bottom side, there are 16 monitor display LEDs 5 provided in a horizontal row corresponding to each input terminal to show the input contents obtained from the input terminals during operation, and also on the bottom side of this monitor display section LED5. Twelve monitor display sections L are provided in one horizontal row corresponding to each output terminal to show the output contents sent to the output terminal during operation.
E D 6 is provided.

These program display section LED4, monitor display section LE
Both D5 and D6 are aligned vertically with the same terminal number and share the terminal number written above the program display section LED4.

Furthermore, at the bottom left of the front surface of the panel l, there is an operation code display LED 7 for displaying user commands, and at the bottom right, there are a (SET) key, (RESET) key, (INS) key for input operations, and a [WRITE] key. key, (CLR)
An operation key group 8 consisting of a key, a (NEXT0PR) key, and an (ENT) key is provided.

In addition, the rectangular part 11 at the lower left of the panel l contains the input operation manual necessary for the user, checkpoints for driving, etc.
This is a margin prepared for posting various reference tables and the like.

FIG. 2 is a block diagram showing the electrical internal configuration of a PC according to an embodiment of the present invention.

As shown in the figure, this PC includes a CPU 91, a system memory 92, a user program memory 93, an RA
M94, input circuit 95 connected to external input terminal IN;
An output circuit 96 connected to an external output terminal OUT, a key input circuit 97, and a display circuit 98 are provided.

Each display section 2 to 7 on the surface of the panel 1 is connected to the display circuit 98, and the operation key group 8 is also connected to the key input circuit 97.

The CPU 9t is mainly composed of a microprocessor, and by executing a system program stored in the system memory 92, various functions as a PC are realized.

Next, the user commands provided in this PC will be explained.

The user commands in this PC are configured as command statements for each process as shown in Table 2.

Table 2 ``Opcode'' shows various commands, which are abbreviated as ``OP'' as shown in the operation code display section 7 of panel 1.

[Input conditions or data] modifies the "operation code", and input terminal numbers designated as step conditions, various condition numerical data, and process numbers are entered.

In particular, in this PC, the number of input conditions, which was conventionally normally specified as 2, can be set up to 4, which increases the capacity to be written in one process and increases the ease of programming.

"Output content" is 1 corresponding to 12, which is the number of output terminals.
It consists of 2 bits and specifies the state of each output terminal as "l" or "0".

The commands indicated by the opcodes will be specifically explained below.

(al"AND"...Means an AND command, and after holding the "output content" until all the designated input terminals are in the designated state, the process moves to the next step.

(mountain) "OR"...Means an OR command, and after holding the "output content" until any one of the specified input terminals reaches the specified state, the process moves to the next step.

(C1 "TIM" - . . . means a timer command, and after holding the "output content" until the specified time has elapsed, the process moves to the next step.

(dl"CNT" - old: means a counter command; the input signal from the designated input terminal holds the "output content" until the designated number of times is counted, and then moves to the next step.

(e) "JMP" (old): This means a jump command, which immediately jumps to the specified process.

(f) CJP'': means a conditional jump command, which holds the ``output content'' until the specified input terminal reaches the specified state, and then jumps to the specified step.

(gl"RPT-...Repeat command, which repeats the operation between two specified steps a specified number of times.

(hl'TMC" , . . . means an interval timer check command, which is a feature of this invention. It monitors the time required for walking between two specified processes, and if the specified time is exceeded. In this case, the instruction written to the next address will be executed.

(i) "JMP, -A"...Means a jump A command, which immediately returns to the first address 00 and stops operation. This is a so-called HALT command.

U) “JMP, -B”・・・・・・Jump B command, which monitors a specific input terminal during the operation of another command, and jumps to the specified process if the input terminal becomes “1” do. This is a so-called interrupt instruction.

(k) "JMP, -C"...Means a jump C command, and returns to the original process again after the completion of the JASSIVE B command. This is a so-called return command.

(1) JMP, -D''... This means a jump D command, and if this command is written at the specific address 00, it will automatically switch to the operation mode when the power is turned on.

Note that the "specified condition" mentioned in the above command description means that the input condition is specified as either "1" for high active or "0" for low active.

There are three types of modes that can be set in this PC, as shown on the mode display section 2:

(Refers to program mode. It is a mode in which a program for control operations to be executed by a PC is written. In addition to writing programs, it also performs insertion, deletion, process steps, operand reading, memory Erasing, etc. can be performed.

Mountain) "5TEP"...Indicates step mode,
This is a mode in which program execution is executed in units of steps, and it is possible to forcibly advance a step regardless of step conditions and read operands in that step.

<c) RtJN'... Indicates the operating mode, in which the PC is operated by executing the written user program.

Next, regarding the user program input procedure, internal processing, and display of each display section in the program mode of this PC, the flow chart in Fig. 3, the key sequence diagram in Figs. 4 and 6, and the key sequence diagrams in Figs. 5 and 7. This will be explained with reference to the LED display explanatory diagram in the figure.

First, in FIG. 3, when the power is turned on to the PC main body (step 301), the system program in the system memory 92 is executed and initial processing such as various initial value settings is performed. (step 302), and determines whether "JMP, -D" has been written as the command statement. (step 303).

If ``''JMP, -D'' is written in all
Step 303 (Yes), the operation mode is immediately set (Step 304), an input/output monitor (to be described later) is displayed (Step 305), and execution of the user program is started (Step 306).

If "JMP, -D" is not written (No at step 303), the program mode is set (step 3Q7), the LED 21 indicating the program mode on the mode display section 2 lights up, and at the same time the LEDs 5 and 6 on the monitor display section
displays the current person and output status on the monitor by lighting, and at the same time, the 7-segment display tubes 31 and 32 both display "
010 is displayed (step 308).

If you want to change the mode here, press the (CLR) key, (
If you manually press the keys in the order of ENT), the mode display section 2
LE[)21 indicating the program mode starts blinking,
The mode can now be changed.

Here, if you press the (SET) key or the [RESET] key as shown in Figure 4, the LE indicating the selected mode will appear.
D moves sequentially and is displayed blinking.

It should be noted that during this blinking display, while moving through the ED, the state of the program mode is maintained until the setting is changed to another mode by the next key operation.

If you want to change to step mode here, make the LED 22 flash and then press the (ENT) key.
D22 changes from flashing to lit, and the step mode setting is established (step 309 affirmative, step 31 (l fixed, step 311)).

Next, an input/output monitor display in step mode is made (step 312), and each time a forced step is made manually, if an instruction statement is written at the corresponding address, that instruction is executed (step 313).

Furthermore, when changing to the driving mode, (C1, R
) key and (ENT) key in this order, the LED will light up.
22 starts blinking, press the (RESET) primary key and press L.
After setting the ED23 to a blinking state, press the (ENT) key, the LED23 will change from blinking to lit and the operation mode setting will be established (step 3091 fixed, step 3
10 negative, step 314 affirmative, step 304).

Next, the human output monitor display in the driving mode is displayed (
Step 305), if a user program has been written, the instruction statement is automatically read from address 00 and executed (step 306).

Next, key operations in program mode will be explained.

Program mode is activated unless the above key operations are performed (
(No in step 309), the program mode is set with the LED 21 of the mode display section 2 remaining lit.

If you wish to read the user program contents already written in the user program memory 93 (step 320 affirmative), press the [5ET] key or the (R
When the ESETI keys are pressed in sequence (step 321),
The process number for each process is displayed on the 7-segment display tube 31.
32, the written operation code is indicated by the lighting of L P and D in the operation code display section 7, and the input conditions for the process step in that process are indicated by the lighting of the LED in the program display section 4. 9
The manpower status obtained in step 5 can be displayed and read by lighting up the monitor display section LED5, and similarly, the output content in that process can be displayed and read by lighting up the monitor display section LED6.

Also, by pressing the (NEXT 0PR) key here, the condition numerical data of the timer and count in the process being displayed and the jump destination address are displayed on the 7-segment display tube 31 and 32 of the data display section 3 and the LEDs 33 to 36, respectively. can be read.

When writing various commands to be executed by the PC, write (WR
When the ITE) key and the (ENT) key are pressed in this order, the program enters a write standby state (step 331), and the program display section 4 and monitor display section LEDs 5 and 6 turn off (step 332), which prohibits the monitor state. This is to facilitate program creation.

Note that if the 7-segment display tubes 31 and 32 are flashing 00'' and the LED 33 is lit, this indicates that nothing is written at address 00.

At the same time, LP and D indicating AND on the operation code display section 7.
will flash to indicate that the opcode is writable.

At this point, try to change the opcode to something other than AND (S
ET) key or (RESET) key, the blinking LED moves in the same way as when setting the mode. For example, if you press the (ENT) key after starting OR at the position where you want to set the blinking of the LED, LED7 indicating OR will turn on and the OR command will be written, and at the same time the blinking of the LED will change to the terminal number O of monitor display section LED5. Then, a message indicating that input conditions can be written is displayed.

The blinking position of the monitor display LED5 is moved sequentially by pressing the (INS) key or the (WRITE) key.
You can match it to the terminal number 2 you are trying to set as shown in the figure. When the (SET) key is pressed here, the LED of terminal number 2 in the program display section 4 lights up as shown in Fig. 6, and the input terminal of terminal number 2 is designated as high active, that is, "l" is specified as the input condition. be done.

Furthermore, when the [SET] key is pressed, the LED changes to blinking, and the input terminal of terminal number 2 is low active, that is, "0".
It is shown that this can be specified as a human labor condition. In this way, each time the (SET) key is pressed repeatedly, the display of the input conditions is cyclically converted.

The number of manual conditions that can be set on this PC is up to 4, so while moving the monitor display LED5,
Press the SET) key to specify the input conditions, and finally press the
By pressing the NT) key, the input conditions for that process are determined.

The opcode entered here is "AND", '"OR"
, 'CJP' (Yes at step 333), the specified input condition number k is taken in at the same time as the (F!, NT) key is pressed (step 334).

If, for example, five input conditions are mistakenly specified as shown in FIG. 7, it is determined that the number of manual conditions k is five or more (step 335 affirmative).

On the other hand, if the input condition number k is O, that is, if no input condition is specified (step 336 affirmative), the 7-segment display tubes 31 and 32 light up "EO" to display an error message (step 337).

If an error display indicates that the number of input conditions is inappropriate, press the (CL R) key (step 338) to cancel the error display, and then press the (RESET) key to set the number of input conditions to 4 or less. The number of input conditions can be corrected by redoing the input condition, or by adding the input condition and pressing the CENT key again.

In addition, if the operation code is either "CNT'""JMP,-B" (step 333 negative, step 333
39), when the (ENT) key is pressed after the input conditions are specified, the specified number k of manpower conditions is taken in (step 340).

If this input condition number k is 2 or more (step 34
If the number of input conditions k is O, that is, no input condition is specified (step 341 negative, step 336 affirmative), the 7-segment display tubes 31 and 32 light up "EO" and display an error message. (step 337).

If an error display indicates that the number of input conditions is inappropriate, press the (CLR) key (step 338) to cancel the error display, and then press the (RESET) key to set the number of input conditions to 1. The manual condition number can be corrected by resetting and then pressing the (ENT) key again.

Next, if these opcodes and their input conditions or data are accurately input (step 336 negative), or if an opcode other than the above opcode and data related to it are input (step 333 negation, step 339 negation, step 342) , the terminal number O of the monitor display unit LED 6 starts blinking, and the process enters a standby state for specifying the output content in that process.

Here too, by pressing the (INS) key and the (WRITE) key, the blinking LED is moved to the terminal number for specifying the output, and by pressing the (SET) key or the (RESET) key, the output can be specified.

Note that the specification of output content is different from input conditions, and for all output terminals, it is set to “1” for on output or “1” for off output.
0", therefore, by moving the blinking LED cursor only for the terminal number to be set to "l" for on output and pressing the (SET) key, that L E
D is turned on and the output is designated as "1". (S
ET) The output of the terminal number of the LED whose key is not pressed, that is, the terminal number in the off state, is designated as an off output of "0". Regarding the LEDs that were specified to turn on by mistake (R
It can be corrected to turn off by pressing the ESET) key.

When the output specification is completed, press the (ENT) key to establish the settings for the specified output content, and at the same time, the 7 segments 31 and 32 of the data display section 3 will display "01".
The LED 33 lights up, and furthermore, the AN of the operation code display section 7
The LED indicating D flashes to indicate that the process has progressed to the next 01 process.

Further, when TIM, TMC, or CNT is set as the operation code, the display on the 7-segment display tube 32 becomes "0" blinking. The numerical value set in the operand section is displayed on the 7-segment display tube 32 after being increased or decreased by pressing the (SET) key or the (RESET) key. When the value to be set is displayed, by pressing the (INS) key, the number shown on the 7-segment display tube 32 changes from blinking to lit, and at the same time, the display on the 7-segment display tube 31 changes to blinking "0". Furthermore, (SET) key or (
7-segment display tube 31 by pressing the RESET) key
The set value is established by shaking the number increment or decrement to display the set value, and then pressing the ()ENT) key.

Next, by lighting the LED 33 and pressing the (RESET) key, the meaning of the numerical value entered manually is changed to the LED 34, which indicates Dl, Dl, and D3, which constitute the operand, respectively.
35, move to LED 36 in order and specify.

Table 3 shows the contents of operands D1 to D3 corresponding to the opcodes.

From Table 3 onwards, programs are written by repeating the manual key operations in the manner described above.

If you want to insert another command in the middle of a program that has already been written, press the (SETI key, ... - or (RES
After moving the displayed process magnet to the insertion position using the ET) key and pressing the (INS) key and the (ENT) key, it can be inserted by pressing the keys in the same way as for normal writing operations (step Processing after 350 affirmation).

Also, if you want to delete part of the written program,
Use the (SET) key or (RESET) key to move the displayed process storm to the position where you want to delete it, and then press the (WRITE) key.
) key and then the (RESET) key (step 360 affirmative), the LEDs 33, 34, 35, and 36 flash at the same time, indicating that deletion is possible (step 36).
1). Next, press the (ENT) key (Step 3).
62 (affirmative), all program contents of the corresponding process are deleted (step 363).

If there is a JMP-related instruction after the above-described insertion or deletion process, the jump destination is automatically changed, so there is no need to individually correct the subsequent process.

If you want to delete all written programs,
When the (CLR) key, the (INS) key, and the [WRITE] key are pressed in this order (step 364 affirmative), the monitor display LED 5.6 turns off (step 365), and "-1" appears on the 7-segment display tube 31.32. is displayed to indicate that the memory is to be cleared (step 366).
), then press the (ENT) key (step 36
7 (affirmative), all programs written in the user program memory 93 are erased (step 368).
,? Segment display tubes 31 and 32 are “00”, LED 3
3 is lit up.

Next, after the writing of the program is completed, the program display section 4 and the monitor display section 5 are displayed when actually operating the program.
．． The display of No. 6 will be explained.

When the mode is changed to driving mode by the above operation,
Execution of the written user program starts from step 00.

At this time, the program display section L P, D 4 displays the input conditions of the input circuit 95, which are the sidewalk conditions in that process, using the LEDs for each terminal number. Input or off is indicated by blinking.

In addition, the monitor display unit LED 5 indicates the input state obtained from the input terminal to the input circuit 95 at the present moment by turning on if the input is "1", that is, on, and by turning off the light if the input is "0", that is, if it is off, for each terminal number. Display each.

Similarly, the monitor display LED 6 allows the output status to be confirmed at a glance by indicating only the terminal numbers from which the "1" output, that is, ON is being sent from the output circuit 96 in that process, by lighting LP and D. can.

In this example, each display section and key operation section are arranged on one side of the front panel of the PC main body, but each display section and key operation section are separated from the PC main body as a programming console for better operability. You can also increase it.

Next, the 7MC instruction, which is a feature of the present invention, will be explained.

As shown in FIG. 8, user programs for 100 processes from process 00 to process 99 are prepared in the program area of this PC in a writable manner, with processes corresponding to memory area addresses. Of these, programs related to 7MC instructions are assigned to processes after the 80th process (addresses after the 80th).

The program for normal sequence operation control is 00 at the beginning.
It is written from the process to the 79th process, but the 7MC instruction and the related abnormality processing program are not written therein, and the instruction statement indicating the original control operation is written to the address of the storage area corresponding to each process. .

When the writing of the original control operation program is completed, as shown in FIG. , 85th process, 90th process, and 95th process are written in four specific storage areas corresponding to 80th address, 85th address, 90th address, and 95th address.

The 7MC instruction, which performs a special function to be described later when written to these four specific areas, has a formant shown in FIG. 1O, and the operation code and each operand are each formed by 8 bits. In the operation code section, a code indicating the 7MC instruction is written in 4 bits, and the time unit (0, 1s, Is
, 1m) is written. The operand section consists of DI, D2, D3, and D4.
is the process number where monitoring starts, D2 is the process number where monitoring is ended, D3 is the set time, and D4 is this 7MC.
Each process block where an instruction is written is written.

These operation codes and operands DI, D2, and D3 are written by the above-mentioned key operations, but D4 is written by the PC itself through initial processing when the PC starts operating.

In the storage area after the address where the 7MC instruction was written,
Abnormality processing programs related to each of the 7MC instructions are written.

When writing 7MC instructions to 4 locations, the capacity of the abnormality processing program is up to 4 steps per 7MC instruction.
If the number of 7MC instructions is 3 or less, the capacity of the abnormality processing program increases. In other words, the previous four specific addresses 80.8
When the 7MC instruction is written to address 5.90.95, the interval timer check function is activated, but the 7MC
When an instruction other than the above is written, the contents indicated by that instruction are executed. Therefore, the specific area from addresses 80 to 99 cannot be used only for checking the interval timer.

For example, when an abnormality in a control operation by a PC is detected by a 7MC command, the abnormality processing program that is loaded is a program that lights a lamp, sounds a buzzer, etc. at a contact point that should report the abnormality using the output from the output terminal. This means giving a notification for a certain period of time, or stopping the control operation itself.

Next, the operation of the PC when the 7MC instruction is written in the user program will be explained with reference to the flowchart shown in FIG.

First, when the power is turned on to the PC (step 101)
), the key input is taken in after initial processing is performed based on the system program in the system memory 92.

As a result, if a mode other than the operating mode is specified (No in step 7 102), the other specified mode processing is performed.

If the operation mode is designated (Yes at step 102), the user program written in the user program memory 93 is read out, and it is determined whether the 7MC command is written at address 80 (step 104).

If the 7MC instruction is written at address 80 (Yes at step 104), the set time and its unit written in the D31 section of the operand are stored in the TMC working area (hereinafter referred to as 'I') provided in the RAM 94, etc. M.C.W.
) 1 (step 105). followed by 7M
The C flag 1 is set to "l" (step 106).

If TMC flag I is then set, and 80
If the 7MC instruction has not been written to the address (No at step 104), it is further determined whether the 7MC instruction has been written to the 85th address (step 107).

If the 7MC instruction is written at address 85 (Yes at step 107), the set time and its unit written in the D32 portion of the operand are similarly stored in TMCW2 (step 108).

Subsequently, the 7MC flag 2 is set to "11" (step 109).

If then 7MC flag 2 is set and 85
If the ``T'MC instruction is not written at the address (No at step 107), it is further determined whether the 7MC instruction is written at address 90 (step 110).

If the 7MC instruction is written at address 90 (Yes at step 110), the set time and its unit written in the D33 part of the operand are stored in TMCW3 (
Step 111. ), followed by 7MC flag 3 to 11”
(Step 1 1 2).

then 7MC flag 3 is set, and 90
If the 7MC instruction is not written at the address (No in step 110), it is further determined whether the 7MC instruction is written at the 95th address (step 113).

If the 7MC instruction is written in the 95th step (
Step 113: Yes), the set time and its unit written in the 034 part of the operand are stored in TMCW4 (Step 114), and then the 7MC flag 4 is set to “l”.
” (step 115).

then 7MC flag 4 is set, and 95
If the 7MC instruction has not been written to the address (No in step 113), the step counter SC is set to "0" (step 116).

The processing up to this point is the initial processing at the start of operation, and constitutes a means for detecting the presence or absence of the 7MC command.

Next, the control operations for each process written in the user program are sequentially read from the storage area at the address specified by the step counter and executed.

At first, since the step counter 5C=O, the opcode of the instruction statement written at address 00 is determined (step 117), and each output data based on the opcode and the contents of the operand is sent to the output circuit 96, and at the same time Step conditions are checked (step 118).

Next, the TMC flag l is checked (step 1).
20) If the TMC flag 1 is set to "1" (step 120St), read the instruction written at address 80 and read the start process and end process designations indicated by the D11 and D12 parts of the operand. and the current step counter SCO value, and if Dll≦SC<D21, that is, if the control operation process currently in progress corresponds to the process monitored by the 7MC instruction at address 80, then (
Step 121 (Yes), the internally provided clock generation circuit performs the following time measurement process (Step S
L).

In other words, if the unit of time set in 031 is minute (1 m) (Yes at step 122), at the rise of the 1 minute period clock signal obtained from the clock generation circuit (
Step 123\r is determined), and 1 is subtracted from the value stored in TMCWI (Step 127).

Similarly, if the set time unit is seconds (13) (step 122 negative, step 124 affirmative), at the rise of the 1 second period clock signal obtained from the clock generation circuit (step 125 affirmative'), it is stored in TMCWI. 1 is subtracted from the current value (step 127).

Similarly, if the set time unit is 0.1 seconds (0, IS) (step 122 negative, step 124 negative), at the rise of the clock signal with a period of 0 and 1 seconds obtained from the clock generation circuit (step 126 Affirmative), T
1 is subtracted from the value stored in MCW1 company (step 127).

Next, it is determined whether the value of TMCWl is smaller than 0'' (step 128), and if it is smaller (step 128).
1f setting), write the setting time written in the D31 section of the operand again to TMCWI (step 129).
). Subsequently, after 81 is added to the step counter SC (step 130), the process returns to step 117, and execution of the abnormality handling program starting from address 81 of the user program is started (processing after step 117).

Note that after step 120, if the 7MC flag 1 is not "1" (step 120 negative), if the value of the step counter SC is not I)11≦SC<D21 (step 121 negative), or if the clock from the clock generation circuit is If it is not the timing of the rising edge of the signal (step 123
negative, step 125 negative, step 126 negative) and the value of TMCWl is 0 or more (step 128
Negative), the process proceeds to the next step 131.

The processing in steps 120 to 130 above represents the 7MC instruction at address 80 and its related program processing.

Below, regarding the 7MC instruction written to address 85,
As shown in steps 131 to 137, it is determined whether the TMC flag 2 and the SCO value of the operating step counter correspond to the corresponding process and the same processing as above is performed. Omitted.

Similarly, the 7MC instructions written to addresses 90 and 95 are also processed in steps 138 to 144 and steps 145 to 151, respectively. Note that steps 133, 140, and 147 in the above processing are time measurement processing shown in step S1.

Subsequently, after passing through the processing section for each of the 7 MC instructions, it is determined whether or not the step condition is satisfied by checking the input terminal power obtained from the input circuit 95 or by other conditions being satisfied (step 152). ).

If the step condition is not satisfied (step 152 negative),
The process returns to step 120 and repeats the subsequent processing operations.

If the step condition is satisfied (Yes at step 152), 1 is added to the value of the step counter SC, or the step counter SC is set to the jump destination address specified in that step (step 153).

Next, if the updated step counter SC is greater than or equal to the operand D21, that is, the process has already reached 8.
If the range monitored by the 7MC instruction at address 0 has passed (step 154 affirmative), the set time of operand 031 is written again to the corresponding TMCWI (step 1
55).

Similarly, if the range monitored by the 7MC instruction at address 85 is exceeded (step 156 affirmative), the corresponding TM
The set time written in operand D32 is written again to CW2 (step 157).

Furthermore, if the range monitored by the 7MC instruction at address 90 is exceeded (step 158 affirmative), the corresponding TMC
Write the set time written in operand 033 again to W3 (Zotefuburi 59).

Further, if the range monitored by the 7MC instruction at address 95 is exceeded (step 160 affirmative), the corresponding T
The set time written in operand D34 is written again into MCW4 (step 161).

Next, the command statement at the address indicated by the updated step counter SC is read, and the processes from step 117 onwards are repeatedly executed.

As is well known in this type of PC, the above processing is executed in an extremely short scanning time, so step S1
Also in the time measurement process, 0.0 from the clock generation circuit is used.
It can also adequately cope with a clock signal of 13 seconds.

In this way, by starting writing the operation control program from address 00 at the beginning of the user program area, and writing the 7MC instruction and error handling program from address 80 or 85 after the writing is completed, the original There is no need to worry about inserting 7MC instructions that are foreign to the operation (work efficiency can be improved).

Furthermore, since the writing areas for the operation control program and the 7MC instruction-related program are separated, there are fewer input errors in these programs (and at the same time, it is easier to check them).

In this embodiment, the program related to the 7MC instruction is written from address 80 onward in the user program area, but the same effect can be obtained even if the program related to the 7MC instruction is assigned to the beginning of the user program area.

In addition, the user program area in the embodiment includes 7MC.
There are four addresses for writing instructions, but if you do not use all ψ addresses when creating a program, start using address 95 at the end, and the free area can also be used as a program area for operation control. The efficiency of use of the user program area is not impaired.

[Brief explanation of the drawing]

FIG. 1 is an external front view of the PC according to the embodiment, FIG. 2 is a block diagram showing its electrical internal configuration, FIG. 3 is a flowchart showing the operation, and FIGS. 4 and 6 are the input inputs. A key sequence diagram showing wet cropping, FIGS. 5 and 7 are LED display explanatory diagrams, FIG. 8 is a memory map of the user program, FIG. 9 is a memory map related to 7MC instructions in the user program, and FIG. 1 is a format diagram showing the structure of a TMC instruction sentence, and FIG. 11 is a memory map of a user program showing a conventional example. 1...Panel 2...Mode display section 21-23...LED 3...Data display section 3132...7 segment display tube 33 ~36・
...LED 4...Program display section LED5...
Monitor display section LED 6...Monitor display section LED 7...Operation code display section LED8...
Operation key group 91...-CPU 92...System memory 93...User program memory 94...
...RAM 95...Input circuit 96...Output circuit 97...Key input circuit 98...Display circuit

Claims (1)

[Claims] 1. It has a memory area corresponding to each process number, and each memory area has a process step instruction that represents the step condition for another process and an output that determines the signal state of each output terminal. A user program memory in which user programs such as commands and interval timer check commands for monitoring the time required for stepping between specific processes are stored; an input circuit to which external input signals are applied from input terminals; and external output signals to output terminals. an output circuit for sending out; an arithmetic processing means for calling the storage area in the order of the process number and executing the user program stored in the area; and a processing means for writing the user program into each storage area of the user program memory. A step-by-step programmable controller equipped with a writing means, which specifies to write an interval timer check instruction and its related programs separate and independent from the original operation program writing area into the user program memory. A programmable controller characterized by having a designated area.