JPH01220577A - Synchronizing signal separation circuit - Google Patents

Abstract

PURPOSE:To perform the separation of a synchronizing signal normally even in an input signal having vertical sag by providing a change-over switch circuit for the current value of the discharging current of a capacitor for synchronizing separator. CONSTITUTION:When an input pulse is set at a high level, a switching transistor(TR)14 is turned ON, and the current on a TR20 is divided into the current on a TR13 and a diode(Di)Q6 and the current on the TR14 and a DiQ7. The discharging current of the capacitor 4 goes to a constant value by the base current of the TR13, and the identification level of the synchronizing signal can be decided. The synchronizing signal separated by the capacitor 3 goes to a voltage to be impressed on both ends of the collector resistor of a TR16, and is outputted from a terminal 10. When a current switching pulse on an input terminal 15 is set at a low level, the TR14 is turned OFF, and all of the current on the TR20 flows on the DiQ6, and the collector current of the TR13 is increased, then, the identification level of the synchronizing signal can be heightened. Thus, in the input signal having the sag in the neighborhood of a vertical synchronizing signal, it is possible to separate and extract the synchronizing signal normally by raising the identification level.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a synchronization signal separation circuit that separates and extracts horizontal and vertical synchronization signals from a composite video signal.

BACKGROUND OF THE INVENTION FIG. 3 shows the configuration of a conventional synchronizing signal separation circuit. In FIG. 3, from input terminal 1 to resistor 2. Capacitor 3. Same 4
When a composite video signal is input to the synchronization signal separation circuit 6 through
3 is charged, and a minute change in current due to the charging current at this time is amplified and transmitted to the horizontal synchronizing signal separation circuit 7 and the vertical synchronization signal separation circuit 8. On the other hand, when the level of the composite video signal becomes higher than or equal to the DC level of the synchronizing signal separation circuit 6, the charge stored in the capacitor (capacitance value C2) 4 is discharged by the constant current source 5. The operation of this circuit will be described with reference to the waveform diagram of the composite video signal input shown in FIG. 4(a). The electric charge charged to the capacitor 4 during charging is Q=CzV (
1) The voltage across the capacitor 4 at this time is expressed as V=Q/C2 (2). This V corresponds to the identification level of the synchronization signal. The amount of charge charged is equal to the amount of charge discharged, and the discharge current of the capacitor 4 is the current 10 of the constant current source 5, so Q=Iot+...
3) holds true. From equations (2) and (3), the discrimination level of the synchronization signal is expressed as V = Iot + / C2"""■.Here, the interval between t+jt horizontal synchronization signals, and C2 is the capacitance value of capacitor 4. Therefore, the discrimination level of the synchronization signal depends on the value of 1., that is, the current value of the constant current source 5 that provides the discharge current of the capacitor 4. When the human input signal level is low, it is identified as a synchronization signal and output as the synchronization signal shown in the waveform diagram of FIG. 4(b).

Problems to be Solved by the Invention FIG. 5 shows the relationship between the discrimination levels of the input signal and the synchronization signal during the vertical retrace period in the conventional single-period signal separation circuit described above. Since the input signal level is constant, horizontal and vertical synchronization signals are normally separated and extracted. However, in the case of an input signal with a sag near the vertical sync signal as shown in Figure 6, the horizontal sync signal after the vertical sync signal may be located above the discrimination level, and in that case, the horizontal sync signal It becomes impossible to separate and extract the It is an object of the present invention to provide an embodiment of a synchronization signal separation circuit that can perform normal synchronization signal separation even when an input signal has such a vertical sag.

Means for Solving the Problems In order to achieve the above object, the present invention is configured such that the current value of a constant current source that provides a discharge current of a capacitor is switched by a switch circuit, so that the discrimination level of a synchronization signal can be varied. It is something.

According to the present invention, the identification level of the synchronization signal can be changed at any time by changing the current value of the constant current source that provides the discharging current of the capacitor using the switch circuit. Therefore, if the input composite video signal becomes higher than the discrimination level of the synchronization signal for some reason, normal synchronization signal separation can be performed by setting the discrimination level higher by current switching.

Embodiment FIG. 1 shows a schematic block diagram of an embodiment of the present invention. This configuration differs from the conventional example in that a switch 9 and a constant current source 10 are provided in parallel with the constant current source 5.

FIG. 2 is an electrical connection diagram of an embodiment of the synchronous signal separation circuit of the present invention. In Figure 2, 1 is an input terminal, 2 is a resistor, and 3
is a capacitor for synchronization separation, 4 is a capacitor for high-frequency noise removal, 13 is a current source transistor that provides a discharge current of the capacitor, 14 is a switch transistor, 15 is a Q
1 is an output transistor, 17 is a transistor that provides a charging current for the capacitor, 19 is an output terminal for separate horizontal and vertical synchronization signals, and 20 is a current source. It is a transistor.

In the above embodiment, it is assumed that the input pulse to the current switching input terminal 5 is now at a high level. At this time,
Switching transistor 14 is in the on state, and the current in transistor 20 is transferred to transistor 13. Diode Q
6 and the current flowing through transistor 14. The current flowing through diode Q7 is divided into two. Due to the base current of the transistor 13, the collector current of the transistor 13, that is, the discharge current of the capacitor 4 becomes a certain constant value, and the identification level of the synchronization signal is determined. The synchronization signal separated and extracted by the capacitor 3 becomes a voltage applied to both ends of the collector resistor of the transistor 16, and is applied to the output terminal 19.
It is output from

Here, when the current switching pulse of the input terminal 15 is set to a low level state, the transistor 14 is turned off, all the current of the transistor 20 flows to the diode Q6, and the collector current of the transistor 13 increases. Therefore, the identification level of the synchronization signal becomes high. In this way, by switching the current switching pulse between high level and low level, the identification level of the synchronization signal can be changed. Therefore, in the case of an input signal with a sag near the vertical sync signal mentioned above, by changing the current switching pulse □ from high level to low level near the vertical sync signal,
By increasing the identification level, the synchronization signal can be successfully separated and extracted.

Effects of the Invention The present invention is provided with a switch circuit for switching the discharge current of the synchronous separation capacitor, and is configured such that the discrimination level of the synchronous signal can be made variable by switching this switch. Therefore, the present invention has the advantage that even in the case of an input composite video signal having a sag in the vicinity of the vertical synchronization signal described above, normal synchronization signal separation can be performed by setting the discrimination level high. Another advantage is that the identification level of the synchronization signal can be changed at any time, not only during vertical sag.

[Brief explanation of the drawing]

Fig. 1 is a schematic block diagram of a synchronizing signal separation circuit according to the first embodiment of the present invention, Fig. 2 is an electrical wiring diagram of the main parts of the same embodiment, Fig. 3 is a schematic block diagram of a conventional device, and Fig. 4 (a) , (
b) is a waveform diagram showing a composite video signal input and a synchronization separation signal, and FIGS. 5 and 6 are waveform diagrams of a standard signal and a sag mixed signal during the vertical retrace period. 1...Input terminal, 2...Resistor, 3, 4
...Capacitor, 5,1o... Constant current source, 6... Synchronous signal separation circuit, 7...
Horizontal synchronization signal separation circuit, 8...Vertical synchronization signal separation circuit, 9...Switch. Name of agent: Patent attorney Toshio Nakao and one other person Figure 1 Figure 2 -! - Figure 3 Figure 4 Figure 5

Claims (1)

[Claims] What is claimed is: 1. A synchronization signal separation circuit for separating and extracting horizontal and vertical synchronization signals from a composite video signal, the circuit comprising a switch circuit for switching the current value of a discharge current of a synchronization separation capacitor.