JPH01225171A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To eliminate the short-circuit of a gate to a source by depositing metal obliquely with the peripheral edge of an opening of an insulating film as a mask to form a gate electrode, and ion implanting with the gate electrode as a mask, thereby forming an N<+> type conductive layer. CONSTITUTION:An N-type conductive layer 2 and an oxide film 3 are formed on an N-type silicon substrate 1, the film 3 is selectively removed to form an opening 7, the deposited target is inclined at a predetermined angle in a direction to be offset with respect to the vertical axis of the substrate 1 and metal is deposited. Then, two isolated electrode layers 4a, 4b are formed by a masking operation of the peripheral edge of the opening 7. Thereafter, an electrode layer 4c is formed from electrode layers 4a, 4b as a gate electrode, and with the electrode layer 4c as a mask phosphorus ions are implanted to form an N<+> type conductive layer 5. Subsequently, ohmic electrodes 6a, 6b are formed at both sides of the layer 4c as drain and source electrodes. Thus, the short-circuit of the gate to the source is eliminated.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and in particular, to a method for manufacturing a semiconductor device.
The present invention relates to a method of manufacturing a field effect transistor having a sothogate structure.

[Conventional technology]

Conventionally, various structures have been attempted to increase the withstand voltage of field effect transistors, and field effect transistors having an offset-I gate structure are generally used. Simply put, this structure is to increase the withstand voltage by shortening the distance between the source electrode and the gate electrode and separating the gate electrode and drain electrode.

FIGS. 2(a) and 2(b) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining an example of a conventional method for manufacturing a field effect transistor having an offset gate structure. First, as shown in FIG. 2(a), an N-type conductive layer 2 is formed on an N-type silicon substrate 1 by ion implantation. Next, an oxide film is formed on the N-type conductive layer 2 by the CVD method,
The oxide film is selectively removed by photolithography, and ions are implanted using the oxide film as a mask to form a highly concentrated N+ type conductive layer 5. Next, as shown in Figure 2(b),
A metal layer is formed by a metal vapor deposition method, and the metal layer is removed by a photolithography method so that an electrode 4d remains at a position a certain distance toward the source from the center of the N+ type chamber current layer 5, thereby forming a gate electrode. form.

[Problem to be solved by the invention]

In the conventional semiconductor device manufacturing method described above, the metal layer formed by metal vapor deposition is selectively removed by photolithography to form an offset gate, so mask pattern accuracy and exposure in the photolithography process are There is a problem in that errors in alignment accuracy between the mask and semiconductor substrate in the device, etching accuracy, etc. often overlap, resulting in a short circuit between the gate and the source.

An object of the present invention is to provide a method for manufacturing a semiconductor device that can manufacture an offset gate that does not cause a short circuit between the source and the gate.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention includes a step of forming a conductive layer of one conductivity type on a semiconductor substrate of one conductivity type, a step of forming an insulating film on the conductive layer of one conductivity type, and a step of forming a conductive layer on the conductive layer of the one conductivity type. forming an opening on the insulating film of the one conductivity type semiconductor substrate and depositing metal at a predetermined angle with respect to the vertical axis of the one conductivity type semiconductor substrate and forming an opening on the insulating film of the one conductivity type semiconductor substrate; a metal layer extending from the bottom of the insulating film onto the insulating film; a step of selectively removing the two metal layers to form a gate electrode; a step of implanting one conductivity type impurity using the goo 1 to electrode as a mask to form a highly concentrated one conductivity type conductive layer, and the one conductivity type conductive layer located on both sides of the gate electrode. and forming an ohmic electrode thereon.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(f) are cross-sectional views of a semiconductor chip shown in order of steps for explaining an embodiment of the present invention. First, as shown in FIG. 1 (a), as in the conventional example, N
N-type conductive layer 2 with a thickness of 400 nm on a type silicon substrate l
oxide film 3 is formed. At this time, since the thickness of the oxide film 3 is related to the offset amount, after forming the oxide film 3, the film thickness is measured as necessary. Next, as shown in FIG. 1(b), the oxide film 3 is selectively removed by photolithography to form an opening 7. Next, as shown in FIG. 1(c), the evaporation target of the metal evaporation apparatus is tilted at a predetermined angle in a direction in which it is to be offset with respect to the vertical axis of the N-type silicon substrate 1.

Here, when metal vapor deposition is performed at an angle of 45°, for example, electrode layers 4a and 4b separated into two are formed by the masking action of the periphery of the opening 7. Next, as shown in FIG. 1(d), the electrode layer 4a is removed from the side wall of the opening 7 by dry etching using carbon dioxide (CF4) gas.
．． By removing other metal layers leaving an electrode layer up to 5 μm thick,
An electrode layer 4c is formed to serve as a gate electrode. Next, the first
As shown in Figure (e), the remaining electrode layer 4b and oxide film 3 are removed by wet etching. Next, the electrode layer 4
Using c as a mask, ions are implanted. For example, phosphorus ions are implanted at an acceleration energy of 100 keV and a dose of 1013 cm -2 to form an N+ type conductive layer 5. Next, as shown in FIG. 1(f), ohmic electrodes 6a and 6b are formed on both sides of the electrode W4c by metal vapor deposition.
are formed to serve as a drain electrode and a source electrode.

〔Effect of the invention〕

As explained above, it is possible to form a gate electrode by diagonally depositing metal using the periphery of an opening in an insulating film as a mask, without requiring a mask, and to form a gate electrode using this gate electrode as a mask. Since the so-called self-line method is performed in which ions are implanted to form an N++ conductive layer, the gate electrode and the N++ conductive layer can be formed at accurate positions.

This method has the advantage that it is possible to obtain a semiconductor device with an offset gate structure that does not cause a short circuit between the gate I- and the source.

[Brief explanation of the drawing]

1(a) to 1(f) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining one embodiment of the present invention, and FIG. 2(a)
) to (b) are cross-sectional views of semiconductor chips shown in order of steps for explaining a conventional method for manufacturing a field effect transistor having an off-cell gate structure.・・N-type conductive layer, 3・
...Oxide film, 4a, 4b, 4c, 4d--Electrode layer, 5
...N+ type conductive layer, 6a, 6b... Ohmic electrode, 7... Opening.

Claims (1)

[Claims] a step of forming a conductive layer of one conductivity type on a semiconductor substrate of one conductivity type; a step of forming an insulating film on the conductive layer of one conductivity type; a step of selectively forming an opening in the insulating film; A metal layer is deposited on the insulating film of the one conductivity type semiconductor substrate by depositing metal at a predetermined angle with respect to the vertical axis of the one conductivity type semiconductor substrate, and a metal layer extends from the bottom of the opening onto the insulating film. a step of forming two metal layers separated into two metal layers; a step of selectively removing the two metal layers to form a gate electrode; a step of removing the insulating film; and a step of masking the gate electrode. a step of implanting impurities of one conductivity type to form a highly concentrated one conductivity type conductive layer; and a step of forming ohmic electrodes on the one conductivity type conductive layer located on both sides of the gate electrode. A method for manufacturing a semiconductor device, characterized in that: