JPH01243609A - High frequency linear amplifier - Google Patents

Abstract

PURPOSE:To make the linear amplifier of large power to highly efficient with leaving distortion low by constituting a title amplifier so that the input/output characteristic of a large power transistor to be approximated to that of an ideal transistor. CONSTITUTION:The multi carrier power sources 1 and 2 of at least two waves of frequencies f1 and f2 are impressed on the large power transistor 5 used in the final stage of the linear amplifier through an internal resistance 3 and an input matching circuit 4. The transistor 5 is biased nearby a pinch off point, and the load is connected with a load circuit 7 in which an equivalent model is displayed by parallel oscillation and a load resistance 8. Here, gradient is given to the density of an (n) dope layer in a gate lower part on the half insulating substrate of the transistor, and the maximum value of an even function component of a residual component obtained by subtracting a linear component from an action area is set below 10% in the action area where the bias point is set around the pinch off point. Thus, power efficiency can be improved with leaving distortion low.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a multicarrier linear amplifier using high-frequency, high-power transistors, and particularly improves power efficiency while maintaining low distortion, thereby saving power. This invention relates to a linear amplifier suitable for

[Conventional technology]

Conventionally, in power amplifiers using high-power high-frequency transistors, class B amplifiers in which a bias voltage was applied to the pinch-off point of the transistors improved efficiency, but were thought to have large intermodulation distortion and were not suitable for linear amplifiers. . Furthermore, there is a high-efficiency power amplification mode (for example, class F operation mode) in which the impedance of the load circuit is matched over a wide band up to harmonics.

It was considered to be a switching operation power amplification system, and was not thought to be suitable for high-efficiency linear amplifiers. (S,
61 IEICE National Conference ``Basic characteristics of quasi-microwave band F-class power amplification base j).

[Problem to be solved by the invention]

The above conventional technology does not quantitatively consider the odd-order intermodulation distortion component contained in the drain (or collector) current supplied to the load circuit of the high-power transistor, and this is reduced in the class B amplifier. No effort was made to do so. Another problem with so-called class F amplifiers is that harmonic distortion components during switching operations are thought to be harmful to linear amplification. The components that cause distortion in a linear amplifier for high-frequency signals (especially multicarriers) are the odd-order intermodulation wave components that fall within the amplification bandwidth shown in Figure 4, and the even-order intermodulation wave components are harmonics. It is a distortion and is not directly involved in the distortion of a linear amplifier.

An object of the present invention is to improve power efficiency in a linear amplifier using high-power transistors by setting the bias voltage near the pinch-off point and performing wide-band impedance matching of the load circuit up to harmonic components. .

[Means to solve the problem]

The above object is achieved by setting the transfer characteristics (eg, gate voltage and drain current) of the high power transistor based on the following principle.

FIG. 2 is a diagram in which the input/output characteristics of an ideal transistor biased to the pinch-off point Va are theoretically decomposed into the sum of two components. That is, the transfer characteristic of an ideal transistor can be decomposed into the sum of a linear component and a residual even function. In other words, when two signals with different frequencies are superimposed on the input of a transistor (e.g., gate voltage), the output signal (e.g., drain current) does not include the odd-order intermodulation distorted waves shown in FIG. This is based on the fact that it can be determined that only even-order intermodulation distorted waves are included. Since the current supplied to the output circuit does not contain odd-order intermodulation distorted wave components, no harmful distorted wave components are generated no matter how linear passive elements are used in the load circuit.

[Effect]

Therefore, in the present invention, the input/output characteristics of a high-power transistor are structured to be as close to those of an ideal transistor as possible, and if necessary, the impedance of the transistor load circuit is matched over a wide band up to the harmonic region, and the high-power linear amplifier is High efficiency can be achieved without distortion.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. The high power transistor 5 used in the final stage of the linear amplifier has at least two waves of frequency f1 and frequency f2 (or frequency f
, , f4 . . . ) are applied via an internal resistor 3 and an output circuit 4. The transistor 5 is biased near the pinch-off point, and a load circuit 7 whose equivalent model is represented by parallel resonance and a load resistor 8 are connected to the load. FIG. 1 shows the principle equivalent circuit of the so-called B slow operation mode, and the description of the DC voltage circuit is omitted. This B slow operation mode ideally operates at an efficiency of 78.5%. Moreover, as shown in FIGS. 3 and 4, if this high-power transistor is ideal, highly efficient linear amplification can be performed without odd-order harmonic distortion.

FIGS. 2(a) and 2(b) show circuit diagrams of other embodiments of the present invention, in which the transistor 5 has a frequency fitf2...
・At least the second high frequency 2f□, 2f2...
has a gain comparable to that of the fundamental wave. Resistance value 201
The load resistor 8 is connected via the output circuit 6 and the output circuit 7. Although FIG. 2 shows only the high frequency circuit and omits the description of the DC voltage circuit that supplies the bias voltage near the pinch-off point, it is actually necessary and an example will be described later.

Figure 2(a) is.

This is the principle equivalent circuit of the so-called class F operation mode.

The output circuit 1 has a characteristic impedance ZOL and a frequency f,
Using a transmission line that is 1/4 of = (f□+f,)/2,
In the output circuit 7, the inductance L and the capacitance C resonate in parallel at the frequency f0. Fundamental wave f included in current i.

The components are supplied to the load resistor 8, but odd harmonics 3f,
, 5f0.7f,... The impedance of the components is open when viewed from the input side of the output circuit, so they do not flow into the load resistor 8, and the even-order 2 fo, 4 fo,...
Since the impedance is short-circuited when viewed from the input side of the output circuit 6, the component flows into the high power transistor 5 but does not flow into the load resistor 8. This class F operation mode ideally operates with 100% power efficiency. Furthermore, Figures 3 and 4
As shown in the figure, if this high-power transistor is ideal, highly efficient linear amplification can be performed without odd-order harmonic distortion.

FIG. 2(b) is an example using a practical broadband matching circuit for harmonic signals. The output circuit 6 is open to the fundamental wave component 0, but short-circuited to the second harmonic 2f, and the output circuit 7 does not pass the second harmonic 2f, but the fundamental wave f0.
The configuration provides output power to the load resistor 8 through which it passes. Third
Although the impedance matching conditions of class F operation mode are not satisfied for harmonics of If 5 is ideal, there is no distortion.

FIG. 5 shows a specific embodiment of FIG. 2(b), in which an output circuit 6 and an output circuit 7 are constructed using microstrip line elements.
This is an example of configuring . The output circuit 2 is composed of 1 circuit, 92 circuits, 119 circuits, and 12 circuits.

The circuit 10 is intended to supply drain voltage and is connected to the input circuit 4.
It also serves as a bias voltage Vs supply to the gate. The circuit 11 is a band-elimination filter B that does not pass the frequency 3f.
It is RF. FIG. 6 shows the circuit of FIG. 5 using GaAs-FE.
This is an example of an operation experiment in the 800MHz band using T.
An additional efficiency of 57% is achieved when the next phase modulation distortion IMD is equivalent to 20 dB. Furthermore, the linearity of the FET can be improved to improve the IMD without reducing the additional efficiency of 60%.

FIG. 7 shows an example of the structure of a GaAs-MESFET, n
- Optimize the gradient by ramping the concentration of doped GaAs 16 at a constant value.

No matter how much directness is improved, only one document (IEE, 1987, MTT-NIS Digest (IE
EE, MTT-8Digest), p569-57
As shown in 2), some nonlinearity remains in actual FETs. FIG. 8 shows the nonlinearity remaining in the residual function. A model example of this nonlinearity is shown in FIG.

This slope is similar to the literature (1987
MTT-Nis Digest (IEEE, MT
As shown in T-8 Dige-st), p, 103), it is often approximated by a parabolic curve. Figure 9(b)
The odd function component of the residual function obtained by subtracting the linear component in FIG. 9(c) is approximated by a symmetrical cubic curve. FIG. 9(d) shows the mutual conductance gm of the FET at this time.

Nonlinearity i as.

5itlio defined by is 'has when vg=o, and Δids is the maximum value of the residual function.

Figure 10 shows the model in Figure 9, with a bias voltage placed at point C and class A amplification, resulting in f 1 =800 MHz r
Relative output level of third-order intermodulation distorted wave I MD (current components of 2f, -f, = 820MHz and 2f, -f2 = = 790MHz) when two waves of 810MHz are input, and input signal It shows the relationship between the input relative level in the operating region where the instantaneous value of is present.When b=1%, IMD=about 40.5 dB at the output signal clip point.

FIG. 11 shows the process MD3 when the bias point is set at the class B operating point of v8, that is, the pinch-off point. IMD before the output signal clip point.

has a maximum value of 39°5 dB, and the increasing slope of IMD3 is larger than that of the class A shown in FIG. 8, and the increasing slope is gentle.

FIG. 12 shows third-order intermodulation distortion IMD using this nonlinearity as a parameter. In order for IMD3 to be 20 dB or less below the fundamental wave, b≦5% must be satisfied.

FIG. 13 shows the even function component included in the residual function of FIG. 9 approximated by a symmetric quadratic equation, and its maximum value and i cls.

The third-order intermodulation distortion IMD is calculated by expressing the ratio as the nonlinearity as described above. IMD is 20 from the fundamental wave
To be less than dB, b≦10% must be satisfied.

The above quantitative analysis results well explain the experience when comparing class A operation and class B operation of high frequency linear amplification.

The first reason to explain the experimental experience that IMD increases when class A operation is changed to class B operation is that the odd function component of nonlinearity is A
This is a factor that is more disadvantageous to the occurrence of IMD3 in class B operation than in class B operation.

The second reason is that, as is clear from FIG. 13, the nonlinear even function component, which is not a factor in IMD3 in class A operation, becomes a factor in IMD in class B operation. Therefore, A
In order to reduce the IMD in class B operation, conventionally only the reduction of odd function components has been considered, but in class B operation it is also necessary to reduce even function components.

Therefore, in the embodiment of the present invention, the impurity concentration of the GaAs field effect transistor shown in FIG. It is characterized by the use of transistors that reduce even function components, which were not considered to be caused by modulation distortion. Usually, in a practically used high frequency linear amplifier, the IMD with respect to the fundamental wave component is set to 20 dB or less in the linear operation region, so the embodiment of the present invention reduces the even function component by 10%.
This is a linear amplifier characterized by the following reduction.

Next, we will discuss the degree of nonlinearity near the pinch-off point. Figure 14 shows the calculated value of IMD based on the actual measured values of the 51-MOSFET (i'l gate voltage and drain current. v = 1 [V i=4.74X10-' [A
], but the calculation is performed assuming that v < IV and i=0. Figure 15 shows the bias point v=1.7 [V
], which is significantly improved compared to FIG. 14. The odd function component of the residual function shown in the figure is the cause of odd-order intermodulation distortion, and this is clear from the fact that the odd function component in FIG. 15 is sufficiently smaller than that in FIG. 14.

This fact explains well the experimental experience. Therefore, in the present invention, the pinch-off point is selected (or the clip point is defined) at a point where the odd function component of the residual function (the axis of symmetry is the bias point or the clip point) is reduced.

It is clear that other embodiments of the invention may use transistors other than GaAs-FETs.

Silicon bipolar transistor, GaAs HEM
Using T (high electron mobility transistor), InP transistor, etc. with reduced nonlinear even function components,
A high frequency linear amplifier biased near the pinch-off point is another embodiment of the invention.

Although ion implantation is commonly used as a means of controlling the impurity concentration gradient, it is clear that the present invention is not dependent on this means.

〔Effect of the invention〕

When the linear power amplifier according to the present invention is used in a satellite-mounted transponder that relays multi-carriers or a mobile communication base station power amplifier that transmits multi-carriers, an expensive and heavy synthesizer is not required and the power efficiency is significantly improved. Therefore, the weight of the solar cell can be significantly reduced.

Further, in order to reduce the amount of heat generated, the heat dissipation system can be simplified and lightened, and the temperature at the junction of the transistor can be reduced, resulting in longer life and higher reliability.

When the linear power amplifier of the present invention is used for power amplification of a VSB modulated wave of a television video signal, power supply efficiency can be significantly improved, and the weight of the transmission system can be reduced in order to improve heat generation.

[Brief explanation of the drawing]

Figures 1 and 2 are both circuit diagrams of an embodiment of high efficiency amplification according to the present invention, Figure 3 is a voltage-current characteristic diagram of an ideal transistor, Figure 4 is a spectrum diagram of intermodulation distortion, and Figure 5 is FIG. 2 is a circuit diagram of an embodiment of a high efficiency amplifier with harmonic broadband matching. Figure 6 is a diagram of the actual operating characteristics of the amplifier in Figure 5, and Figure 7 is a diagram of the actual operating characteristics of the amplifier in Figure 5.
A cross-sectional view of As-FET. Figure 8 is a diagram showing the voltage-current characteristics of an actual transistor and its nonlinearity, Figure 9 is a diagram showing a nonlinear model of an FET, and Figure 1θ is a diagram showing the nonlinearity of the actual transistor.
FIG. 11 is a diagram showing the intermodulation distortion of a class 8 biased transistor (nonlinearity 1%). FIG. 11 is a diagram showing the intermodulation distortion of a real transistor biased class 8 (nonlinearity 1%). Figure 12 shows a transistor (8
Figure 13 shows a transistor whose linearity is approximated by a cubic equation (class 8 bias).
Figure 14 is a diagram showing the third-order intermodulation distortion of an actual FET biased to the pinch-off point, and Figure 15 is a diagram showing the third-order intermodulation distortion of an actual FET biased to the pinch-off point. FIG. 3 is a diagram showing that order intermodulation distortion has been improved. Agent Patent Attorney Junnosuke NakamuraPin (d B-噌) Fig. 6 Fig. 7 via15 Fig. 9 Fig. 10 Input tool t! sr) Figure 13 Input rail (jBM) Figure 14

Claims (1)

[Claims] 1. In a high frequency amplifier using a gallium arsenide field effect transistor as an amplification element, the concentration of the n-doped layer at the bottom of the gate is made to have a gradient on a semi-insulating substrate, and the bias point is placed near the pinch-off point. 1. A linear amplifier characterized in that, in a region, the maximum value of an even function component of a residual component obtained by subtracting a linear component from an operating region is 10% or less. 2. In claim 1, a gallium arsenide high electron mobility transistor is used as the amplification element, and the maximum value of the even function component of the residual component obtained by subtracting the linear component from the operating region is 10% or less. A linear amplifier characterized by: 3. The linear amplifier according to claim 2, characterized in that a silicon bipolar transistor is used as the amplifying element. 4. The linear amplifier according to claim 2, characterized in that an indium phosphide transistor is used as an amplifying element. 5. The linear amplifier according to claim 2, characterized in that a silicon metal oxide transistor is used as an amplifying element.