JPS5541747A - Field effect transistor - Google Patents

Field effect transistor

Info

Publication number
JPS5541747A
JPS5541747A JP11497478A JP11497478A JPS5541747A JP S5541747 A JPS5541747 A JP S5541747A JP 11497478 A JP11497478 A JP 11497478A JP 11497478 A JP11497478 A JP 11497478A JP S5541747 A JPS5541747 A JP S5541747A
Authority
JP
Japan
Prior art keywords
type
layer
gate
region
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11497478A
Other languages
Japanese (ja)
Other versions
JPS5850435B2 (en
Inventor
Goro Mitarai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP11497478A priority Critical patent/JPS5850435B2/en
Publication of JPS5541747A publication Critical patent/JPS5541747A/en
Publication of JPS5850435B2 publication Critical patent/JPS5850435B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE: To improve the linearity of mutual conductance to drain current in JFET's by providing a second gate-constituting layer which has a declining gradient of impurities concentration.
CONSTITUTION: On a p-type substrate 1 a p-type layer 11 is formed by the epitaxial growth so that the concentration of impurities contained is lowered according as the distance from the surface of substrate 1 increases, the thus formed lamination 12 of the substrate 1 and the layer 11 being used as a second gate. An n--type layer 2a is epitaxially grown on the layer 11, with either end where a p-type region 3 is diffusion-formed apart from each other like a sort of island. In the middle between the isolated regions 3 within the layer 2a is provided a p-type first gate region 6. Then, to one side of the gate region 6 is diffusion-formed an n+-type source region 4 and to the other side a similar type drain region 5. This device serves to prevent mutual conductance from becoming smaller as the absolute value of gate voltage is increased, and improve the linearity of the mutual conductance to drain current.
COPYRIGHT: (C)1980,JPO&Japio
JP11497478A 1978-09-18 1978-09-18 field effect transistor Expired JPS5850435B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11497478A JPS5850435B2 (en) 1978-09-18 1978-09-18 field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11497478A JPS5850435B2 (en) 1978-09-18 1978-09-18 field effect transistor

Publications (2)

Publication Number Publication Date
JPS5541747A true JPS5541747A (en) 1980-03-24
JPS5850435B2 JPS5850435B2 (en) 1983-11-10

Family

ID=14651226

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11497478A Expired JPS5850435B2 (en) 1978-09-18 1978-09-18 field effect transistor

Country Status (1)

Country Link
JP (1) JPS5850435B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01243609A (en) * 1988-03-25 1989-09-28 Uchu Tsushin Kiso Gijutsu Kenkyusho:Kk High frequency linear amplifier

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01243609A (en) * 1988-03-25 1989-09-28 Uchu Tsushin Kiso Gijutsu Kenkyusho:Kk High frequency linear amplifier

Also Published As

Publication number Publication date
JPS5850435B2 (en) 1983-11-10

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