JPH01257370A - Schottky barrier semiconductor device - Google Patents

Abstract

PURPOSE:To obtain high level breakdown strength and reverse surge strength of a Schottky barrier diode by relieving electric field concentration in a semiconductor region under the surroundings of the Schottky barrier induced at the time of reverse voltage application by first and second semi-insulating semiconductor regions. CONSTITUTION:Second semi-insulating semiconductor regions 4 are provided in a region surrounded by a first semi-insulating semiconductor region 3 and are formed into a plurality of islands separated from each other. As the second semi-insulating semiconductor regions 4 are exposed on the top surface of a semiconductor substrate 1 like the first semi-insulating semiconductor region 3, they are in contact with the lower surface of a barrier electrode 2. Therefore, in the cross section, a plurality of the island-shape second semi-insulating semiconductor regions 4 and a plurality of n-type regions 1b are arranged alternately in the region surrounded by the first semi-insulating semiconductor region 4. As a result, even if a reverse surge current is concentrated to the surroundings of a Schottky barrier 10, the reverse current is widely dispersed. With this constitution, a Schottky barrier diode with a high reverse surge strength can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a Schottky barrier semiconductor device.

11 Problems to be Solved by the Prior Art and the Invention Schottky barrier diodes have good high-speed response (high-speed switching characteristics) and low loss, and are therefore widely used as rectifier diodes in high-frequency circuits. However, Schottky barrier diodes have a problem in that the peripheral withstand voltage (withstand voltage around the Schottky barrier) is significantly lower than the bulk withstand voltage (withstand voltage at the center of the Schottky barrier), making it difficult to increase the withstand voltage. .

In order to solve the above problem, for example, Japanese Patent Laid-Open No. 55-1022
Japanese Patent No. 78 discloses a Schottky barrier diode having a structure in which an insulator region made of silicon oxide or a semi-insulating semiconductor is formed in a semiconductor region adjacent to the outer circumferential side of a barrier electrode.

According to the above structure, the electric field concentration around the barrier electrode is alleviated, and the peripheral breakdown voltage is improved, so that a high breakdown voltage can be achieved.

However, satisfactory results were not obtained in terms of reverse surge resistance. In other words, when a reverse surge voltage exceeding the breakdown voltage is applied, a corresponding reverse surge current flows, but in a Schottky barrier diode, the reverse surge current tends to concentrate and flow around the Schottky barrier. Destruction due to reverse surge current was likely to occur in the semiconductor region near the peripheral portion. In the Schottky barrier diode having the above-mentioned structure with an insulator region, this reverse surge current tends to concentrate and flow at the boundary between the insulator region and the semiconductor region, and therefore, the semiconductor region at this boundary is likely to be destroyed. It was not possible to obtain high reverse surge resistance.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a Schottky barrier semiconductor device that can achieve high levels of both voltage resistance and reverse surge resistance.

A Schottky barrier semiconductor device of the present invention is formed such that a first annular semi-insulating semiconductor region is formed adjacent to a semiconductor region so that its surface is exposed and is embedded in the semiconductor region, A second semi-insulating semiconductor region is formed adjacent to the semiconductor region in a part of the region surrounded by the first semi-insulating semiconductor region, with its surface exposed and embedded in the semiconductor region. , a surface of the semiconductor region exposed in a region surrounded by the first semi-insulating semiconductor region forms a Schottky barrier adjacent to a barrier electrode, and in a cross-sectional state, the surface of the semiconductor region exposed in the region surrounded by the first semi-insulating semiconductor region forms a Schottky barrier, and in a cross-sectional state, the Schottky barrier and the second semi-insulating semiconductor region Semiconductor regions are arranged alternately.

Function: The first and second semi-insulating semiconductor regions alleviate electric field concentration in the semiconductor region below the periphery of the Schottky barrier when a reverse voltage is applied. Further, the second semi-insulating semiconductor region increases the peripheral length of the Schottky barrier and alleviates the concentration of reverse surge current.

L Example Hereinafter, examples of the Schottky barrier semiconductor device according to the present invention will be described with reference to FIGS. 1 to 6 for a Schottky barrier diode.
This will be explained according to the diagram.

As shown in FIG. 1, the Schottky barrier diode of this embodiment has a semiconductor substrate 1 and a helia 'vl&1442 coated on the surface of the semiconductor substrate 1.

The manufacturing method will be explained below with reference to FIGS. 1 to 6.

First, a semi-integrated substrate 1 is prepared. As shown in FIG. 3, the semiconductor substrate 1 is made of GaAs (gallium arsenide).
◆A having a shaped region 1a and an n-shaded region 1b made of GaAs formed by epitaxial growth thereon.
The n-medium region 1a has a thickness of about 300 μm and an impurity concentration (1
~3) The n shadow region 1b, which is
−”.

Next, the surfaces of the first and second semi-insulating semiconductor regions 3.4 are exposed in the n-shaded region 1b, and the surfaces of the first and second semi-insulating semiconductor regions 3.4 are exposed.
Formed so that it is embedded in.

As used herein, the term "semi-insulating semiconductor" refers to a semi-insulating layer of semiconductor material, which layer includes first and second semi-insulating semiconductor regions, commonly referred to as semi-insulating semiconductor regions. 4 is formed by ion-implanting He (helium) into the n-shaded region 1b. That is, as shown in FIG. 4, an AQ (aluminum) layer 5 as a mask is vacuum-deposited on the n-shaded region lb, and an opening 6 is formed in the AQ layer 5 by etching. Next, using a well-known ion implantation device, the ionized He is accelerated and guided to the upper surface of the semiconductor substrate 1.
As shown in the figure, the He ions are injected into the n-shaded region 1b where the opening 6 is provided.++ The n-shaded region 1b where the He ions are implanted is a semi-insulating semiconductor region as the GaAs crystal is disturbed. As shown in the figure, a first semi-insulating semiconductor region 3 is formed on the outside, and a plurality of second semi-insulating semiconductor regions 4 are formed on the inside thereof. The first and second semi-insulating semiconductor regions have a resistivity of 10' to 10".
It is a semiconductor region close to an insulator with a resistance of about Ω·1.

Subsequently, the AQ layer 5 is removed and, as shown in FIG. 5, a Ti (titanium) layer 2a and an AQ (aluminum) M2b are sequentially formed on the upper surface of the n-shaded region 1b by vacuum evaporation to obtain a barrier electrode 2. In addition, Au (gold) −
The ohmic electrode 7 is formed by sequential vacuum deposition of Go (germanium) alloy and Au.

Next, a silicon oxide film 8 (FIG. 1) with an insulating layer is formed by plasma CVD so as to cover the upper surface of the first semi-insulating semiconductor region 3.

Subsequently, a Ti layer and an Au layer are sequentially formed on the upper surfaces of the silicon oxide film 8 and the barrier *f4i2 by vacuum evaporation to obtain a connection electrode 9 for the lead electrode. Due to this.

A Schottky barrier diode chip for power use is completed.

In addition, silicon oxidation 1! of the connection electrode 9! The portion extending above i[8 acts as a field plate and contributes to improving the breakdown voltage of the Schottky barrier diode.

Next, the first and second parts, which are the parts according to the present invention of this embodiment,
The semi-insulating semiconductor regions 3 and 4 will be explained. As shown in FIG. 2, the first semi-insulating semiconductor region 3 and the second semi-insulating semiconductor region 4 are spaced apart from each other. The first semi-insulating semiconductor region 3 is provided in an annular shape along the outer periphery of the barrier electrode 2 so as to surround the second semi-insulating semiconductor region 4 .

The first semi-insulating semiconductor region 3 corresponds to the insulating region described in the conventional example, and is arranged so that its inner peripheral side is adjacent to the lower part of the barrier electrode 2. The semiconductor region 3 is formed relatively wide, and its outer peripheral end is exposed on the side surface of the semiconductor substrate 1. The second semi-insulating semiconductor region 4 is arranged in a region surrounded by the first semi-insulating semiconductor region 3, and is separated into a plurality of islands.

Like the first semi-insulating semiconductor region 3, the second semi-insulating semiconductor region 4 is exposed on the upper surface of the semi-quad substrate 1, and therefore is adjacent to the lower part of the barrier electrode 2.

Therefore, in the region surrounded by the first semi-insulating semiconductor region 3, when viewed in cross section as shown in FIG. 1, a plurality of island-shaped second semi-insulating semiconductor regions 4 and a plurality of nY3 regions 1b are arranged alternately. A Schottky barrier 10 is formed between the n-shaded region 1b and the barrier electrode 2. A Schottky barrier is not formed between the first and second semi-insulating semiconductor regions 3 and 4 and the barrier electrode 2,
Therefore, a Schottky barrier is generated in the area surrounded by the first semi-insulating semiconductor region 3 on the surface of the semiconductor substrate 1, except for the second semi-insulating semiconductor region 4, and its shape is As shown in Figure 2, it has a lattice shape when viewed from above. 'Since the entire area around the Schottky barrier 10 is adjacent to the first semi-insulating semiconductor region 3 or the second semi-insulating semiconductor region 4, the effect of increasing the breakdown voltage by the first semi-insulating semiconductor region 3 is Maintained. The second semi-insulating semiconductor region 4 may be made of a material different from that of the n-shaded region 1b, such as a silicon oxide film, or the second semi-insulating semiconductor region 4 may be made of a material different from that of the n-shaded region 1b, such as a silicon oxide film.
If it is formed so as not to be buried in the second semi-insulating semiconductor region 4, the effect of increasing the breakdown voltage by the first semi-insulating semiconductor region 3 will be lost, that is, the breakdown voltage in the peripheral portion of the second semi-insulating semiconductor region 4 will decrease. do.

Further, by forming the second semi-insulating semiconductor region 4, the peripheral length of the Schottky barrier 10 is significantly increased, and the peripheral portion of the Schottky barrier 10 is
They are relatively evenly distributed in the element formation region. Therefore, even if the reverse surge current flows in a concentrated manner around the Schottky barrier 10, the reverse surge current is dispersed to a greater extent than in the past. As a result, a Schottky barrier diode with high reverse surge resistance can be provided.

Hawk - 11 type 112 (1) In the example, the second semi-insulating semiconductor region 4 was formed in an island shape, but as shown in FIG. In this case, the Schottky barrier formed on the upper surface of the semiconductor substrate 1 is formed in an island shape. The effect can be observed even if the second semi-insulating semiconductor region 4 is formed in a comb-like shape, a striped shape, a spiral shape, or the like. However, the highest effect is obtained when the second semi-insulating semiconductor region 4 is formed into an island shape or a mesh shape.

(2) As shown in FIG. 7, a thin layer 12 acting as a field plate is provided on the upper surface of the semiconductor substrate 1 along the barrier electrode 2, and a first semi-insulating half-eight body region 3 is formed on the thin layer M12. The thin layer 12, which may have an adjacent structure, is made of semi-insulating titanium oxide fi! obtained by incompletely oxidizing the Ti thin layer 2a constituting the barrier electrode 2, for example. Let it be r. In this case, the thin layer 112 forms a Schottky barrier between it and the n-shaded region 1b, so the Schottky barrier 13 based on the thin layer 12 can be considered as part of the barrier electrode.
is continuous with the Schottky barrier 10 based on the barrier electrode 2, and when a reverse voltage is applied, a depletion layer extending from these two Schottky barriers is continuously generated.

As described above, when the thin V# layer 12 capable of forming a Schottky barrier is provided around the barrier electrode 2 in the n-shaded region 1b as an auxiliary barrier electrode, an even higher breakdown voltage can be achieved.

(3) The first and second semi-insulating semiconductor regions 3.4 may be formed by a method other than ion implantation6. For example, the n-shaded region 1b may be selectively etched to form a recess; First and second semi-insulating semiconductor regions 3 and 4 are formed by CVD so as to fill the area. The first and second semi-insulating semiconductor regions 3.4 are doped with 1, for example, Cr(
Chromium) is introduced into GaAs.

(4) The semiconductor substrate 1 may be made of a semiconductor material made of a compound other than GaAs, or the same effect can be obtained even if it is made of a semiconductor material made of a single element such as silicon.

As described above, according to the present invention, it is possible to provide a Schottky barrier semiconductor device that can provide a high withstand voltage and a large reverse surge withstand capacity.

4. 11! Brief explanation of plane 1 Figure 1 shows a Schottky barrier diode chip that is an embodiment of the present invention. Fig. 1 is a plan view of the semiconductor substrate, Figs. 3 to 5 show the steps for manufacturing the Schottky barrier diode of Fig. 1, Fig. 3 is a cross-sectional view of the semiconductor substrate, and Fig. 11 is a helium diode. FIG. 5 is a cross-sectional view showing a state in which ion implantation has been performed, and FIG. 5 is a cross-sectional view showing a state in which a barrier electrode is formed.

FIGS. 6 and 7 are a plan view and a sectional view showing another embodiment of the present invention.

10. Semiconductor substrate, la, n-type semiconductor region.

20. Barrier electrode, 30. first semi-insulating semiconductor region, 40. second semi-insulating semiconductor region, 100. Schottky Barrier No. 1 Mouth Figure 2 Figure 3 Figure 4 Figure 5 Cause

Claims (1)

[Claims] A ring-shaped first semi-insulating semiconductor region is formed adjacent to the semiconductor region so that its surface is exposed and is embedded in the semiconductor region, and one of the regions surrounded by the first semi-insulating semiconductor region is formed. A second semi-insulating semiconductor region is formed adjacent to the semiconductor region in a region such that its surface is exposed and is embedded in the semiconductor region, and a second semi-insulating semiconductor region is formed in a region surrounded by the first semi-insulating semiconductor region. The exposed surface of the semiconductor region is adjacent to a barrier electrode to form a skid barrier, and in a cross-sectional state, the skid barrier and the second semi-insulating semiconductor region are alternately arranged. Semiconductor device with barrier barrier.