JPH01271978A - Pack data detecting method - Google Patents

Abstract

PURPOSE:To detect data rapidly and correctly by checking a part to change monotonously together with a parity check concerning pack data and judging that the other data are also correct when they are normal. CONSTITUTION:When preserving the data of a computer by a DAT, they are packed in a prescribed format. That is to say, first and second sub-code parts are partitioned into 64-bit packs. One pack is divided into eight 8-bit words. Binary numbers to increase monotonously are usually provided for three bits on the side of the LSB of the first word, the SSNO area of the second word, the FNO area of the third work, four bits on the side of the LSB of the fourth word and the AFNO areas of the fifth and sixth words. When detecting the contents of the pack data, the parity check is made and next, the change of the above-mentioned part to change monotonously is checked. At this time, when both of them mentioned above are normal, the contents are judged to be correct except the part to change monotonously.

Description

[Detailed description of the invention] The present invention will be explained in the following order.

A. Field of industrial application B. Overview of the invention C. Prior art (Figs. 4 to 6) D. Problem to be solved by the invention E. Means for solving the problem (Fig. 1) F. Effect G. Implementation Example 01 Premise 02 Detection during normal playback (Fig. 1) G3 Detection during search playback (Figs. 2 and 3)
This invention relates to a method for detecting packed data such as subcodes in DAT.

B. Summary of the Invention The present invention relates to a method for detecting packed data, which performs a parity check, checks changes in monotonically changing parts of the packed data, and when these are normal, determines that the remaining data is also correct. This makes it possible to detect data quickly and accurately.

C. Prior Art A device has been proposed that uses, for example, a digital audio tape recorder (DAT) to store (pack up) data written on a computer hard disk or the like (see Japanese Patent Application No. 305881/1983). .

That is, in FIG.
), and the magnetic tape (12) is attached to this drum (11).
) and is transported by wrapping it around an area of about 90 degrees. On this drum (11), 82 recording and reproducing heads A are provided at angular intervals of 180 degrees, and two inclined tracks are recorded and reproduced by one rotation of this drum (11). It has become so.

On the other hand, external digital data is input to 10 circuits (13), and from these 10 circuits (13), it is supplied to a digital signal processing circuit (14) where it is converted into the above-mentioned DAT format. This formatted signal is sent to the recording amplifier (15) and the recording/playback switch (16).
) is supplied to A and B through the recording side contacts of ) and recorded on the tape (12). Also, when the signal recorded on the tape (12) is played back by heads A and B, this playback signal is recorded. / is supplied to the processing circuit (14) through the playback side contact of the playback selector switch (16) and the playback amplifier (17),
The inversely converted and extracted digital data is passed through 10 circuits (1
3) is output to the outside.

Furthermore, a control signal from the outside is supplied to the system control circuit (18), and this control circuit (
The signals from the control circuit (18) control the rotation of the head drum (11), the transfer of the tape (12), the switching of the switch (16), etc. During recording, the signals from the control circuit (18) 14) to form a predetermined subcode signal. Further, during reproduction, the signal extracted by the processing circuit (14) is supplied to the control circuit (19), where tracking and other controls are performed, and part of this signal is taken out to the outside.

With the above configuration, DATfl) is formed.

In this device, D is connected to the outside of the 10 circuits (13).
A - An AD conversion circuit is provided and a control circuit (18)
By providing a predetermined control device externally, it is possible to record and reproduce audio (analog) signals, for example.

On the other hand, in the above-mentioned device, an arbitrary interface bus (3) is connected to the outside of the DAT (1) via the controller (2). Here, as the interface bus (3), for example, the SC3I standard (r NIKK
EIELECTRON IC5J Published by Nihon Keizai Shimbun:
(Reference: October 6, 1986 issue, pages 102-107) can be used. Furthermore, a host computer (5), a hard disk device (6), etc. are connected to this bus (3) via an adapter (4).

In the above controller (2), the bus (3)
A protocol control circuit (21) is provided between the controller (21) and a microcomputer (22) and a memory control (DMA) circuit (23) that control the operation of the controller (2) via the control circuit (21). Data and control signals are exchanged with the bus (3). Further, state detection and operation control are performed between the microcomputer (22) and the DMA circuit (23), and the buffer memory (24) is performed through the DMA circuit (23).
) and the bus (3).

Therefore, in this device, data written to the hard disk device (6) is transferred to the controller (2) via the bus (3) in response to a transfer request from the controller (2) during recording.
2) and sent to the memory via the DMA circuit (23).
(24) is written. Furthermore, the data written in this memory (24) is read out via 10 circuits (25).
A T (input in 11. And this D A T
(In 11, the data input to the 10 circuit (13) is regarded as the same as the data from the AD conversion circuit during audio recording, and the digital signal processing circuit (14) converts the data into a predetermined DA
The data is converted into the T format and recorded on the tape (12) by heads A and B.

Also, during playback, head A starts from tape (12).

The signal reproduced at B is sent to the digital signal processing circuit (14)
The data is inversely transformed and data corresponding to the audio signal is extracted. Furthermore, this data is input to the controller (2) via the 10 circuit (13). In this controller (2), the memory (
24) is read out via the DMA circuit (23) and written to the hard disk device (6) via the bus (3).

Furthermore, in this device, the format of the DAT recorded on the tape (12) is as follows.

In FIG. 5, one frame is composed of two tracks Ta and Tb recorded by heads A and B, and each of these tracks is formed from the bottom of the drawing, and the recorded signal has the entire length. 5. From the bottom side against 90 degrees.
051 degrees ma, - gin part - 0,918 degrees subcode PLL preamble part - 3,673 degrees first subcode part - 0,459 degrees postamble part → 1,3
78 degrees gap between blocks → 2.296 degrees tracking (ATF) signal section → 1.378 degrees gear joint between blocks → 0.918 degrees data preamble section for PLL → 5B, 776 degrees data section → 1.378 degree pro, gear section between the blocks → 2.296 degree AFT signal section → l, 378 degree gap between blocks -0,9
18 degree subcode preamble gVJ- for PLL
The second subcode portion is 3,673 degrees, the postamble portion is 0,459 degrees, and the margin portion is 5,051 degrees. Please note that the scale of the figure is not accurate. In the above-mentioned apparatus, the data inputted from the 10 circuits (13) is added with a predetermined error detection/correction code, etc. in the processing circuit (14), and the data is added to the data inputted from the 10 circuits (13) on tracks Ta, Tb in a predetermined interleaving relationship.
The images are taken separately and inserted into the data section.

Furthermore, in the above-described apparatus, 2048 bits of data can be recorded in each of the first subcode section and the second subcode section. In the audio signal recording format, the 2048 bits are divided into packs of 64 bits each, and information such as the time code and recording date and time of the signal recorded in each pack is recorded.

Therefore, it is possible to allocate a data recorder in this pack and use this pack to perform various controls.

That is, FIG. 6 shows the configuration of a pack for this purpose. In the figure, 64 bits are divided into 8 words of 8 bits each. 4 on the MSB side of the first (first) word in this pack
This area is called the bit power TEM area, and this area is common to the audio signal recording format, and two of these 4 bits are
The contents of the pack are displayed in decimal notation. Note that 4 bits equals 1
Nine of the six codes have already been determined for recording audio signals, and any one of the remaining 7i11 is determined for the data recorder.

Further, the fifth bit from the MSB side of the first word is set to 0''.

Furthermore, the 3 bits on the LSB side of the first word and the next second word are used as the save set number (5SNO) area.
These 11 bits in total provide a binary value indicating, for example, the number of pack-ups from the leading edge of the tape.

The third word is a file number (FNO) area, and a binary value indicating the serial number of the file within the data (save set) bank-amplified at one time is provided.

Furthermore, the 4 bits on the MSB side of the fourth word are the amount of data in one frame, for example, the number of blocks recorded in one frame (B
NO) area, and a binary value indicating the number of blocks is provided.

In addition, the 4 bits on the LSB side of the 4th word and the 5th and 6th words are used as the absolute frame number (AFNO) area.
These 20 bits provide a binary value indicating the serial number of a valid frame at the leading end of the tape.

The seventh word is used as a status display area.

In this word, the first two bits on the MSB side are set as "oo" for the time being as extension bits.

The third bit is used as a flag area to indicate that the frame is the end of the tape (end of media).
The fourth bit indicates that the frame is bad.

The 5th bit is used as a flag area to indicate that the frame data is invalid, and the 6th bit indicates that the frame is at the beginning and end of recording. This is a flag area that indicates that the frame is in the ampoule period, the 7th bit is a flag area that indicates that the frame is a file mark, and the 8th bit is a flag that indicates that the recorded content of the frame is data. area.

Further, the 8th word is provided with a parity check code for the above-mentioned 1st to 7th words.

In this way, the DAT can be used as a data recorder.

D. Problems to be Solved by the Invention In the above-described apparatus, in order to reproduce data during reproduction, it is first necessary to detect subcode data. In this case, since errors in subcode detection data have a large effect on the operation of the entire device, data detection must be performed extremely accurately.

Therefore, a parity check code is provided in the 8th word of the sub-third, but since this code is simple parity, there is a relatively high possibility that it cannot be checked for errors.
Further, if the previous data remains unerased due to head clog or the like during recording, it cannot be checked.

In contrast, in conventional audio signal reproduction, a plurality of consecutive frames are reproduced, and accurate data detection is performed by multiple matching of subcode data between them.

However, in such detection based on multiple coincidences, it takes a relatively long time to confirm the data.For example, in the case of the data recorder mentioned above, the minimum unit of recording is extremely short, for example, 4 frames, so it is difficult to confirm the data. There is a risk that the relationship with the main data may become inconsistent at this point.

Furthermore, for example, there was a possibility that data could not be detected during a search.

The present application is intended to solve these problems.

E Means for Solving Problems The present invention, when detecting the contents of data packed in a predetermined format, executes a parity check in the packed data (step [3]), and performs a parity check on the packed data (step [3]). When is normal, the contents of the above pack data are
Jli! Check the changes in the changing parts (step
16] to (19)) L: When the changes in these monotonically changing parts are normal, it is determined that the contents other than the monotonically changing parts in the pack data are correct (step (24)
) (25) This is a method of detecting packed data as described in (25)).

F. Effect According to this, the parity check and content change check can be performed during one frame, and pack data is detected by these checks, so detection can be performed extremely quickly and accurately. I can do it.

G Embodiment G1 Premise In the subcode format described above, the ITEM area and the fifth bit of the first word are predetermined. Also, the 3 bits on the LSB side of the first word, the 5SNO area of the second word, the FNo area of the third word, the 4 bits on the LSB side of the fourth word, and the AFN of the fifth and sixth words.
The O areas are each provided with a normally monotonically increasing binary value.

This application has been made with attention to these points. Examples of the present application will be described below using flowcharts.

02 Detection during normal playback FIG. 1 shows a flowchart during normal playback.

In this figure, each operation is executed by interrupt processing to a main routine (not shown). Then, in A of the figure, a multiple coincidence flag is set in block (1) in the playback routine. B in the figure is a subcode (pack) reading routine, and when pack data is input in step [2] in this routine, a parity check is executed in step [3], and if this is invalid, step [ 2]
When the data is normal, the normal packed data check (PDCN) routine is called using the Ste knob [4].

That is, C in the figure shows the 1) DCN routine, and when this routine is called, it is first determined in step [11] whether or not the multiple coincidence flag is set. When this routine is called for the first time, the multiple match flag is set, so in step [12] n more pieces of backup data are read, and n+1 pieces of back data are read in step [13]. Detection of data by multiple matching is performed for each set of pack data, and it is determined whether correct data has been detected. If no data is detected, the process returns to step [12], and if correct data is detected, the multiple match flag is reset in step [14], and the correct data detected in step [15] is used for data checking. The data is written into the memory area β and then returned to step [4].

Also, if the multiple match flag is not set in step (11), the data written in the memory area T for data acquisition in steps [16] to [18] and the data written in the area β mentioned above are data is compared. First, in step [16], the value of AFNO in the data (γAF
, βAF) are compared, and when 7AF-βAF is O or I, it is considered normal. However, if the same data is repeatedly recorded due to error detection during recording, for example, the AFNOO value may be reduced by the corresponding number of frames X until the above-mentioned error detection is performed. Therefore, even if the judgment in step [16] is incorrect, if βAF-rAF""X is determined in step [19], it is regarded as normal and the process proceeds to step [17].

Furthermore, in step [17], the value of FNO (γ
FN, βFN) are compared and it is determined to be normal when T FN - βFN is O or 1. In step [18], the 5SNOO value (γSS + βss) in the data is compared and γ
It is considered normal when ss-βss is 0 or 1. If either step (17) or (18) is incorrect,
If step [19] is invalid or the value of X is not sent, the process proceeds to step [20].

At step [20], the multiple coincidence flag is set, and at step [21], the PDCN routine is called. As a result, steps [11] to [15] are executed, and then the process returns to step [21]. Furthermore, TAF2βAF is determined in step [22], and when the result is YES, the process returns to step [4]. If the answer is NO, the value of X=β^F-γ^F is written in a predetermined memory area in step [23], and the process returns to step [4].

Furthermore, when normality is determined in steps [16] to [19], the 3rd on the LSB side of the 7th word is determined in step [24].
Bits are judged. According to the above formant, when any of the three bits on the LSB side is "1", all four bits on the MSB side should be "0". Therefore, if all of them are not "0" in step [24], the 4 bits on the MSB side are judged in step [25], and if all of them are "0", the correct data detected in step [26] is written to area β. If "l" is found in step [25], the process proceeds to step [20].

Also, if all are “0” in step [24], step [
27], data excluding the 4 bits on the MSB side of the seventh word is written to area β. And the 3rd word of the 7th word.
The hysteresis determination described below is performed for the fourth bit.

That is, in step [28], the 4th bit of the 7th word (
"1" + "0" of the lead-out flag) is determined, and when it is "1", the counter area for the lead-out flag (CKCNT: L
) is added by 1. And in step [30] CKC
The value of NT:L is determined, and when the value is 3 or more, a lead-out flag is set in step [31].

Also, when the lead-out flag is "0°" in step [28], 1 is subtracted from CKCNT:L in step [32].Then, the value of CKCNT:L is determined in step [33], and this value is less than or equal to O. When step [34
] resets the lead-out flag. In addition (JC
NT: When the value of L is greater than or equal to 3tJ1, the flag remains unchanged.

Furthermore, in step [35], it is determined that the third bit (end of media flag) of the seventh word is "1" IIQll, and in the same manner, in steps [36] to [41], the counter area for the end of media flag ((JCNT
:E) are added or subtracted, and the end of media flag is set, recent, or unchanged depending on the value of CKCN'r:E.

As a result, the lead-out flag and the end-of-media flag are subjected to hysteresis determination, and after this determination, the process returns to step [4].

Detection of pack data during normal playback is performed by the steps below. In this case, according to the above method, the parity check and content change check can be performed during one frame, and puncture data is detected by these checks, making detection extremely quick and accurate. It can be carried out.

Detection during G3 search playback FIG. 2 shows a flowchart during search playback.

Note that the playback routine and pack reading routine are the same as described above and will therefore be omitted; however, in this case, the pack data check (POC3) routine during search is called at step [4] in the pack reading routine.

The figure shows the PDCS routine. When this routine is called, first the data is sorted in step [51], and the first counter area (
CKCNT': l) is set to 0.

Furthermore, in step [53], fast forward in the search direction (F'
? ' ) or rewind (REW) is determined.

First, when fast forwarding, the values of FNO and 5SNO written in areas T and β are compared in step [54], and when γSF2βSF is determined to be normal, step [55]
CKCNT: 1 plus 4 cents. If rsp<βSF in step [54], rss and rss are compared in step [56], and if they match, it is determined to be normal and the process proceeds to step [55]. Further, if there is a mismatch in step [56], the data written in the memory area α for return value and the data written in area γ are compared in step [57], and if TSF≧αSF, the data is normal. Then, in step [58], CKCNT:1 is set to 1. Also, in step [57], γSF<αSF
If so, αss and γSS are compared in step [59], and if they match, it is determined to be normal and the process proceeds to step [58].

Following these steps (55) and (58),
In steps (60) and (61), the AFNO values written in areas γ and β are compared, and when rAF≧βAF and the difference in the upper two digits is 0 or 1, it is determined to be normal and step [
62], CKCNT: 4 is added to the value of 1. Also, when γ^F and β^F in step [60], step (
63).

In [64], the data written in areas α and T are compared, and when TAF≧αAF and the difference in the upper two digits is 0 or l, it is determined to be normal, and in step [65], the value of CKCNT: 1 is set to 1. is added. And these steps (62),
Following (65), in step [66], the data in area T except for the seventh word is written into areas α and β. Also step (59).

If (61), (63) and [64] are incorrect, the data of area γ is written to area β in step [67] and the process returns to step [4].

When rewinding, the same steps as above are performed for γ
It is executed assuming that ≦β and T≦α are normal.

Further, following step [66], the fourth bit (lead-out flag) of the seventh word is detected by hysteresis determination.

That is, in step [68], the lead-out flag is set to “1”.
”, “0” is judged, and when it is “1”, step [69
], it is determined whether the value of CKCNT:l is 2 or 8, and if it is 2 or 8, 2 is added to the second counter area (C'KCNT: 2) in step [70]. Further, if it is not 2 or 8 in step [69], 1 is added to CKcNT:2 in step [71]. Then, in step [72], the value of CKCNT:2 is determined, and if the numerical value is 4 or more, a lead-out flag is set and CKCNT:2 is set to 4 in step [73].

If the lead-out flag is "0" in step [68], it is determined in step [74] whether the value of CKCNT:1 is 2 or 8, and if it is 2 or 8, CKCNT: is determined in step [75]. The value of 2 is subtracted by 2. Also, if step [74] is not 2 or 8, step [74]
76], 1 is subtracted from the value of CKCNT:2. Then, in step [77], the value of CKCNT: 2 is determined,
When this value is less than or equal to O, the lead-out flag is reset in step [78] and CKCNT:2 is set to O.
is cent. Note that when the value of CKCNT:2 is less than 4 and greater than or equal to 1, the flag and the value of CK CN 1':2 are left unchanged.

Therefore, in this detection, memory areas α, β.

The contents of T are written as shown in FIG. In addition, X in the diagram
A mark indicates unconfirmed data, and an ○ mark indicates invalid data. and area α
The data excluding the seventh word, which is the latest and correct, is always saved.

Furthermore, a hysteresis judgment is performed on the lead-out flag, and since the suspension is carried out according to judgment criteria such as 5SNO and AFNO, an extremely rational and stable judgment is made.

In this way, even during search playback, pack data is detected based on the search for changes in content, so detection can be performed extremely quickly and accurately.

In the above example, detection of subcode data in the DAT format was described, but this can be applied to detection of other data as long as it is formatted pack data. Furthermore, pack data can be similarly applied even when it is provided across multiple packs.

Effects of the Invention According to this invention, the parity check and content change check can be performed during 1 frame, and these checks are used to detect parity data, making detection extremely quick and accurate. Now you can do it.

[Brief explanation of the drawing]

Figure 1 shows an example of the present invention, 1 yen! , FIG. 2, and FIG. 3 are diagrams for explaining the same, and FIGS. 4 to 6 are diagrams for explaining the prior art. (1) is DAT, (2) is controller, (3) is bus, (4) is adapter, (5) is host computer, (
6) is a hard disk device, (11) is a rotating head drum, (12) is a tape, (14) is a digital signal processing circuit, (16) is a switch, (18) is a system control circuit, (22) is a microcomputer, (23)
is a DMA, (24) is a memory, and A and B are recording/reproducing heads.

Claims (1)

[Claims] In detecting the contents of data packed in a predetermined format, a parity check is performed on the packed data, and when the parity check is normal, the contents of the packed data are detected. This packed data detection method checks changes in monotonically changing parts, and determines that contents other than the monotonically changing parts in the packed data are correct when the changes in these monotonically changing parts are normal.