JPH0127674B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a phase-locked loop speed control system using a DC motor including a low-pass filter, a differentiation circuit, and a circuit for frequency modulating the reference oscillator signal to improve stability and control accuracy. This relates to a speed control method using a DC motor with an additional function.

Analog type speed control systems using a speed generator as a detector have been widely used in speed control systems using DC motors. In recent years, digital detectors such as rotary encoders and linear encoders have become readily available, and digital speed control systems using them have come into use.
In particular, due to its high control accuracy and simple control circuit configuration, a phase-locked loop type digital speed control system detects a phase difference signal and directly switches the voltage applied to the motor using this digital signal to control the speed. Used a lot.

FIG. 1 shows a block diagram of this control system. A phase comparator 2 detects the phase difference between a reference speed pulse 6 generated by a reference oscillator 1 and a pulse train 7 corresponding to the speed from an encoder 5 attached to the motor, and switching is performed using a pulse signal 8 whose duty changes depending on the phase difference. A DC motor 4 is driven via a circuit 3 to control its speed.

This kind of control system uses the reference oscillator 1 and phase comparator 2.
is commercially available as an integrated circuit, and the switching circuit 3 can be easily configured using transistors, so it is often used in control systems of consumer equipment.

A feature of this control system is that the speed accuracy is determined by the stability of the reference oscillator 1, so that extremely high control accuracy can be obtained. Although it has advantages such as low heat generation in the circuit and motor, the gain of the control loop is high and cannot be changed easily.
It has the disadvantage of being prone to oscillation and poor stability. Especially when used in the carriage control system of a printer that requires high-speed response, the design is such that the load is small compared to the output of the motor, so this drawback becomes noticeable and the stability and damping properties are extremely poor. It becomes a control system.

Dot impact printers and inkjet printers with high dot densities that aim for high print quality require high accuracy and precision in the speed control system for carriage movement.
Although stability is required, the dot spacing is not constant due to vibration phenomena caused by poor stability and damping properties, resulting in a decrease in printing quality.

In order to eliminate this drawback, a method of lowering the gain of the control loop can be considered, but this would complicate the circuit and reduce control accuracy.

Therefore, we invented a method to improve the stability of this control system by adding a simple circuit without reducing the loop gain.

FIG. 2 is a block diagram of this system. The phase difference signal 8 detected by the phase comparator 2 is converted into an analog speed signal 11 via a low-pass filter 9, and further converted into a pseudo acceleration signal 12 by a differentiating circuit 10. This signal frequency-modulates the output signal of the reference oscillator 1. When the signal 12 is positive, that is, on the acceleration side, frequency modulation is performed to reduce the frequency of the reference oscillator 1 in proportion to the magnitude of the signal. on the other hand,
When the signal 12 is negative, that is, on the deceleration side, frequency modulation is performed to increase the frequency of the reference oscillator 1 in proportion to its magnitude.

In the present invention, a frequency difference (that is, speed difference) signal between the reference pulse 6 and the motor speed pulse 7 is obtained by the low-pass filter 9, and the differentiating circuit 1
0, an acceleration signal 12 is obtained. Here, since the phase comparator 2 detects only a frequency difference (phase difference) in a narrow range near the frequency of the reference pulse 6,
The acceleration signal 12 is output only within a narrow range. That is, when the frequencies of the reference pulse 6 and the motor speed pulse 7 are too large, such as immediately after the motor starts rotating, the phase comparator 2
cannot detect the phase difference and outputs a certain saturated phase difference signal. Therefore, the signal 11 from the low-pass filter 9 also becomes a constant value signal,
When differentiated by the differentiating circuit 10, it becomes 0, and as a result, no frequency modulation is performed. On the other hand, when the motor speed pulse 7 becomes close to the frequency of the reference pulse 6, the phase comparator 2 can accurately detect the phase difference between the two pulses. Alternatively, if it is becoming smaller, the differentiating circuit 12 outputs a signal and the reference pulse 6 is frequency modulated.

Furthermore, in the above embodiment, when the signal 12 is positive, the frequency of the reference pulse 6 is lowered, and when it is negative, the frequency of the reference pulse 6 is increased. However, depending on the method of comparison by the phase comparator 2, Frequency modulation may be performed such that when the signal 12 is positive, the frequency increases, and when the signal 12 is negative, the frequency decreases. This control system achieves the same effect as adding an acceleration feedback loop to a speed control system composed of analog circuits, and has the quick response and high precision of a digital phase-locked loop speed control system. It has the effect of improving stability and damping performance without reducing the

FIG. 3 shows the low-pass filter 9 and the differential circuit 10 of the block diagram of FIG. The low-pass filter 9 is a secondary active filter using a generally known operational amplifier 20, and its bandwidth is determined by resistors 16 and 17 and capacitors 18 and 19. Bandwidth is 1/10 of the reference speed oscillator frequency
Set it to be below and larger than the natural frequency of the control system. Also, the differentiating circuit 10 includes a capacitor 21 and a resistor 2.
By changing this time constant, the damping ratio of the control system can be changed. The time constant of the differential circuit is set near the natural frequency of the control system. The reference oscillator 1 is an integrated circuit for rectangular wave oscillation having a frequency modulation terminal.

FIG. 4a shows the response 24 of the phase-locked loop control system shown in FIG. 1, and FIG. 4b shows the response 25 of the control system of the present invention shown in FIG. As described in detail above, according to the present invention, it is possible to improve the stability and damping performance of a digital phase-locked loop speed control system without reducing its responsiveness and high accuracy. Can be done. Due to the characteristics of the phase comparator, the frequency modulation of the present invention is activated only after the motor approaches the target speed and the phase difference between the reference pulse and the motor speed pulse falls within a predetermined range.

Therefore, for example, immediately after the motor is rotated, the feedback system of the present application does not start.
Therefore, even if the phase of the reference pulse is advancing, no feedback is applied to lower the frequency of the reference pulse, and the motor is quickly accelerated to around the target speed.

Therefore, according to the present application, it is possible to achieve both rapid acceleration of the motor immediately after startup (up to near the target speed) and stability of the control system in the range where the target speed is further approached after that, resulting in an excellent motor speed. A control system can be realized.

[Brief explanation of drawings]

Figure 1 is a block diagram of a conventional phase-locked loop control system.
4 is a belt pulley, and 15 is a printing paper. FIG. 2 is a block diagram of the speed control system of the present invention. Figure 3 shows the low-pass filter 9 in the block diagram.
and shows the circuit of the differentiating circuit 10. Figure 4 shows response example 24 of the conventional phase-locked loop control system and response example 25 of the speed control system of the present invention. 23 in the figure indicates the set speed, and the set speed signal 23 changes from stop at time 0. Show what is given.

Claims (1)

[Claims] 1. It has a phase comparator that compares the phase difference between the reference pulse output from the reference oscillator and the motor speed pulse output from the DC motor speed detector, and the motor speed pulse output from the phase comparator is A DC motor speed control method that controls the speed of the DC motor using a signal includes: a low-pass filter that converts the signal output from the phase comparator into a speed signal; and a differentiation circuit that differentiates the speed signal from the low-pass filter. a reference pulse outputted from the reference oscillator by the output signal from the differentiating circuit; and when the output signal from the differentiating circuit indicates a state of acceleration, lowering the frequency of the reference pulse; A direct current motor speed control method, characterized in that when an output signal from the circuit indicates a state of deceleration, frequency modulation is performed to increase the frequency of the reference pulse.