JPH0128464Y2 - - Google Patents

Description

[Detailed description of the invention] The present invention is designed to prevent the base potential of the transistor constituting the emitter follower circuit from becoming lower than a predetermined value from the emitter potential when a capacitor or the like is provided as the load of the emitter follower circuit in order to detect the peak value of a signal. This invention relates to a signal detection circuit.

Conventionally, this type of signal detection circuit has the configuration shown in Figure 1, amplifies the signal and supplies it to the emitter follower circuit, amplifies the current, applies it to the resistor that is the load, and connects the signal in parallel with the resistor. Together with the connected capacitor, the peak value of the signal is obtained, and this peak value is compared with a reference voltage to detect the signal.

That is, the signal source 1 is configured such that both ends thereof are connected to both bases of transistors 2 and 3 constituting a differential amplifier circuit to apply a signal. The emitters of these transistors 2 and 3 are commonly connected,
The transistor 2 is grounded via a current source 4, the collector of the transistor 2 is connected to the power supply Vcc, and the collector of the transistor 3 is connected to the power supply Vcc via a resistor 5.

The output signal of this differential amplifier circuit is obtained from the collector of the transistor 3, and this collector is connected to the base of the transistor 6 constituting the emitter follower circuit so that the amplified signal is supplied to the emitter follower circuit. The emitter follower transistor 6 has its collector connected to the power supply Vcc, and its emitter is grounded via a load resistor 7. A capacitor 8 is connected across this resistor 7.
are connected in parallel and are configured to work together with the resistor 7 to maintain the peak value of the signal. That is, the resistor 7 and capacitor 8 are provided with sufficiently large time constants.

The signal comparison circuit has one input terminal (transistor 9) of a differential amplifier circuit consisting of transistors 9 and 10.
The voltage of the capacitor 8 is supplied to the base of the transistor 10, and the reference voltage is supplied to the other input terminal (the base of the transistor 10). That is, in the differential amplifier circuit, the emitters of transistors 9 and 10 are connected in common and connected to the power supply Vcc via a resistor 11, and the collector of transistor 9 is grounded via a resistor 12, and the output signal is output from this collector. The transistor 10 has a configuration in which the collector of the transistor 10 is grounded. Furthermore, the base of the transistor 10 is connected to a power source.
Resistors 13, 14 placed between Vcc and ground
The reference voltage is supplied from the connection point of a series circuit consisting of the following.

According to the above configuration, when a signal is applied to the transistors 2 and 3 of the differential amplifier circuit, its amplified output is output from the collector of the transistor 3 through the emitter follower transistor 6. A resistor 7 connected between the emitter of the transistor 6 and ground
The emitter potential is held at the peak value of the signal by a parallel circuit consisting of the capacitor 8 and the capacitor 8. Therefore, a voltage corresponding to the magnitude of the signal can be obtained at the emitter of the transistor 6. This voltage is applied to a voltage comparison circuit (transistors 9 and 10) to detect the presence or absence of a signal.

However, a disadvantage of the above circuit is that the base potential of the transistor 6 may be lower than its emitter potential, as shown in FIG. FIG. 2 is a waveform diagram for explaining the above, in which time is plotted on the horizontal axis and voltage [V] is plotted on the vertical axis. In this figure, the collector voltage of transistor 3 (waveform A) and the emitter voltage of transistor 6 (waveform B) are placed at predetermined positions.

For this reason, if the collector potential of transistor 3 is lower than the emitter potential of transistor 6, there is a risk that the emitter follower transistor will be destroyed, and the differential amplifier circuit composed of transistors 2 and 3 may be damaged. There was a disadvantage that it was necessary to keep the gain small, and it was not possible to achieve a very high detection ability.

This invention was made in view of the above points,
A protection transistor is connected in parallel to the emitter follower circuit of the signal detection circuit, and when the input signal level of the emitter follower circuit becomes larger than the output signal level by a predetermined value or more, the protection transistor is switched to protect the emitter follower circuit. An object of the present invention is to provide a signal detection circuit with increased signal detection capability.

Hereinafter, one embodiment of the present invention will be described based on the drawings from FIG. 3 onwards.

FIG. 3 shows a circuit diagram of a signal detection circuit according to an embodiment of the present invention. In this diagram,
The same elements as in FIG. 1 will be described with the same reference numerals. That is, in the configuration shown in FIG. 3, the base of the emitter follower transistor is connected to the emitter of the protection transistor, the emitter of the emitter follower transistor is connected to the base of the protection transistor, and both collectors are made common to the power supply. The feature is that it is connected to Vcc. The other connection relationships are the same as those in FIG. 1.

The operation of the present invention constructed as described above will be explained with reference to FIG. FIG. 4 is a waveform diagram for explaining the action of FIG. 3, with time plotted on the horizontal axis and voltage [V] plotted on the vertical axis. Code C in the figure
is the collector potential of transistor 3, and D represents the emitter potential of transistor 6.

When a signal is applied from the signal source 1 to both input terminals of the differential amplifier circuit consisting of transistors 2 and 3, an amplified signal is obtained at the collector of the transistor 3, and is supplied to the base of the emitter follower transistor 6. Ru. Then, the emitter of the transistor 6 is held at a potential lower than the peak value of the signal by the base-emitter forward voltage V _F of the transistor 6.

By the way, as shown in FIG.
If the collector potential of is higher than the emitter potential of transistor 6 or is not lower by the voltage V _F ,
Transistor 15 is in an off state, and a signal amplified by the differential amplifier (transistors 2 and 3) appears at the collector of transistor 3.
Also, when the collector potential of transistor 3 is lower than the emitter potential of transistor 6 by voltage V _F ,
Transistor 15 is turned on, and the collector potential of transistor 6 is held at that potential. That is, the collector potential of the collector 3 of the transistor 3, in other words, the base potential of the transistor 6 is not lower than the emitter potential of the transistor 6 by more than the voltage _VF .

As described above, according to the present invention, a protection transistor is connected in parallel to the emitter follower circuit of the signal detection circuit, and the protection transistor is switched in accordance with the input/output signal of the emitter circuit. In addition to providing protection, the gain of the front-stage differential amplifier circuit can be increased, resulting in an effect that the signal detection ability can be increased.

[Brief explanation of drawings]

Figure 1 is a circuit diagram showing a conventional example, and Figure 2 is a circuit diagram showing a conventional example.
FIG. 3 is a circuit diagram showing a signal detection circuit according to an embodiment of the present invention, and FIG. 4 is a waveform diagram to explain the operation of FIG. 3. . 2 and 3, 6, 9 and 10, 15... transistor, 4... current source, 5, 7, 11 to 14...
Resistor, 8... Capacitor.

Claims (1)

[Scope of utility model registration request] A differential amplifier circuit for amplifying the signal, an emitter follower circuit connected to the output end of the differential amplifier circuit for amplifying current, and a circuit connected in parallel to the output resistor of the emitter follower circuit for maintaining the maximum value of the signal. In a signal detection circuit consisting of a capacitor and a comparison circuit for comparing the output voltage of the capacitor with a reference voltage, the base of the transistor constituting the emitter follower circuit is connected to the emitter of the protection transistor, and the emitter of the emitter follower transistor is connected to the emitter of the emitter follower transistor. is connected to the base of a protection transistor, and the collectors of both transistors are commonly connected to prevent the base potential of the emitter follower transistor from being lower than its forward potential.