JPH01286494A - Ceramic substrate - Google Patents
Ceramic substrateInfo
- Publication number
- JPH01286494A JPH01286494A JP11478488A JP11478488A JPH01286494A JP H01286494 A JPH01286494 A JP H01286494A JP 11478488 A JP11478488 A JP 11478488A JP 11478488 A JP11478488 A JP 11478488A JP H01286494 A JPH01286494 A JP H01286494A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- holes
- ceramic substrate
- diameter
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は基板表面に蒸着、スパッタリングにより導体配
線金属膜を形成し、シリコンベアーチップを搭載するタ
イプの高速演算素子等に利用されるセラミック多N基板
の改良に係るものである。Detailed Description of the Invention (Industrial Field of Application) The present invention forms a conductive wiring metal film on the surface of a substrate by vapor deposition or sputtering, and is applied to a ceramic multilayer film used in high-speed processing elements of the type equipped with silicon bare chips. This relates to improvement of the N substrate.
(従来の技術)(発明が解決すべき課題)近時半導体装
置の小型化を実現する要求は一層厳しく、このためセラ
ミック多層基板についても種々の改良がなされているが
、機器を小型化するにあたって基板におけるスルーホー
ル径を極力小さいものが要求され、例えばφ0.08+
u〜φ0.25m■程度に小さ(したものの実現が要望
されているが、これに見合うメタライズ組成物はいまだ
確定的ではない。(Prior Art) (Problem to be Solved by the Invention) In recent years, the demand for miniaturization of semiconductor devices has become more severe, and various improvements have been made to ceramic multilayer substrates. The through hole diameter in the board is required to be as small as possible, for example φ0.08+
Although it is desired to realize a metallizing composition as small as u~φ0.25 m, a metallizing composition suitable for this has not yet been determined.
例えばセラミック基板としてアルミナを用いた場合W、
Moメタライズが用いられているが、スルーホール径が
φO,OTom〜φ0.0111程度に小さくなると、
抵抗値が高くなり過ぎ実用的に問題がある。For example, when alumina is used as a ceramic substrate,
Mo metallization is used, but when the through hole diameter becomes small to about φO,OTom~φ0.0111,
The resistance value becomes too high, which poses a practical problem.
又、低温焼成セラミック基板においてはCu又はCuO
系のメタライズ組成物が使用し得るとされているが、C
u主成分のものにあっては大気中における脱脂工程段階
でCuが酸化され体積膨張を起し、CuO主成分のもの
にあっては還元又は中性雰囲気での加熱でCuOがCu
になり導体化するときに、体積収縮を生じ、このような
メタライズの体積の膨張、収縮はセラミック基板や、配
線にクラックを生じるおそれがあり、更にスルーホール
内でのメタライズ組成物とセラミック基板との焼成収縮
率の不一致は、スルーホール内壁とCuとの間の空隙の
発生や、導体部のクランク発生により、4通不良を発生
するおそれがあった。In addition, in low-temperature fired ceramic substrates, Cu or CuO
It is said that metallizing compositions based on C.
In the case of U-based products, Cu is oxidized during the degreasing process in the atmosphere, resulting in volumetric expansion, and in the case of CuO-based products, CuO becomes oxidized by reduction or heating in a neutral atmosphere.
When the metallization becomes a conductor, volumetric contraction occurs, and such expansion and contraction of the volume of the metallization may cause cracks in the ceramic substrate and wiring, and furthermore, the metallization composition in the through hole and the ceramic substrate may be damaged. The mismatch in the firing shrinkage rates of the two may result in four defects due to the creation of a gap between the inner wall of the through hole and the Cu, or the occurrence of a crank in the conductor part.
この点を改良したのが特願昭62−129441号に示
すようにPd/Cub/Cu、 Pt/Cub/Coメ
タライズ組成物でCuもしくはCuOの酸化還元による
体積の膨張収縮変化を減少させることにより一応の成果
を得たが、メタライズ組成物中にPd又はptが混合さ
れているために、電気抵抗値が高くスルーホール径が小
さくなると到底使用することができないと判った。As shown in Japanese Patent Application No. 62-129441, this point has been improved by reducing the volume expansion and contraction changes due to oxidation and reduction of Cu or CuO using Pd/Cub/Cu and Pt/Cub/Co metallized compositions. Although some results were obtained, it was found that since Pd or pt was mixed in the metallizing composition, the electric resistance value was high and the through hole diameter was small, making it impossible to use it.
(課題を解決するための手段)
本発明は鋭意この問題の解決について検討の結果従来好
ましくないと思われていたCu単体もしくはAu4i体
であっても、特定のスルーホール孔径すなわち0.25
mm以下好ましくは0.20mm以下においては膨張、
収縮の影響が少なくしかも電気的導通に好ましいことを
見出した。(Means for Solving the Problems) As a result of intensive studies to solve this problem, the present invention has been developed to provide a through-hole with a specific through-hole diameter of 0.25 mm even when using Cu alone or Au4i, which had been thought to be undesirable in the past.
Expansion below mm, preferably below 0.20 mm;
It has been found that the influence of shrinkage is small and that it is favorable for electrical conduction.
(作 用)
本発明の詳細を図面を参照して各工程ごとに順次説明す
る。(以下第1図参照)
特開昭59−92943号公報に示すように重量比でZ
nO4χ、 MgO13χ、A120323χ、 5i
Oz 5B!、 8203及びPzOs各1%の組成と
なるように、ZnO,MgCO3゜Aβ(011)3.
SiO□、tl+BOa及びll3r’04を秤量し
、ライカイ機にて混合し、アルミナ坩堝を用いて、14
50℃で溶融せしめた後、水中に投入し、急冷してガラ
ス化し、アルミナ製ボールミルにて平均粒径2μ〜3μ
に粉砕してフリットとする。このフリットに有機質バイ
ンダーと溶剤とを混合してスラリー化し、ドクターブレ
ード法によって厚さ0.6酊のグリーンシート(焼成後
基板11となる)を製造する。(Function) The details of the present invention will be explained one by one for each step with reference to the drawings. (See Figure 1 below) As shown in Japanese Patent Application Laid-Open No. 59-92943, Z
nO4χ, MgO13χ, A120323χ, 5i
Oz 5B! , 8203 and PzOs at 1% each.
Weigh SiO
After melting at 50℃, it is poured into water, rapidly cooled and vitrified, and then processed in an alumina ball mill to reduce the average particle size to 2μ to 3μ.
Grind to make frits. This frit is mixed with an organic binder and a solvent to form a slurry, and a green sheet with a thickness of 0.6 mm (which will become the substrate 11 after firing) is produced by a doctor blade method.
次に所定の位置にパンチングで孔をあけてスルーホール
12を形成する。ついでこのスルーホール12内にメタ
ライズ13を埋め込む。メタライズの調合成分はCu粉
末100重量部、樹脂8重量部、溶剤適量からなるもの
とする。Next, a through hole 12 is formed by punching a hole at a predetermined position. Then, metallization 13 is embedded in this through hole 12. Preparation ingredients for metallization shall consist of 100 parts by weight of Cu powder, 8 parts by weight of resin, and an appropriate amount of solvent.
ついでグリーンシートの外形を所定の形状にカッティン
グした後、グリーンシート及びCuペースト中に含まれ
る樹脂を飛散させる。Next, after cutting the outer shape of the green sheet into a predetermined shape, the resin contained in the green sheet and the Cu paste is scattered.
かくしたものを大気中で600°C〜750℃で仮焼し
て残存カーボンを焼失させ除去する。The resulting product is calcined in the atmosphere at 600° C. to 750° C. to burn off and remove residual carbon.
次にN113分解ガス雰囲気中で350℃〜750℃で
スルーホール12中のCuOを還元してCuとする。Next, CuO in the through hole 12 is reduced to Cu at 350° C. to 750° C. in an atmosphere of N113 decomposed gas.
ついでN113分解ガス雰囲気中又は中性雰囲気中で焼
成し、セラミックとCuを焼結する。Next, firing is performed in an N113 decomposition gas atmosphere or a neutral atmosphere to sinter the ceramic and Cu.
かくしたものを表面研磨し、仮焼工程でCuの酸化によ
る体積膨張で基板表面で噴き出したCuを研溶し削り落
とすと同時に後の工程の蒸着やスパッタリングのために
平滑な表面を作る。The surface of the thus-obtained material is polished, and the Cu ejected on the substrate surface due to volumetric expansion due to Cu oxidation during the calcination process is polished away and scraped off, at the same time creating a smooth surface for subsequent vapor deposition and sputtering steps.
ついで回路導体14を蒸着又はスパッター及びエツチン
グにより形成(薄膜パターン)し、次にスルーホール内
にCu、Au (本発明)及びPd/Cu0(比較例
)を充填したテストサンプルで、スルーホール内径とセ
ラミックの破断の有無の関連を示せば第1表のとおりで
あり、更にセラミック基板の厚さ1.1msを用い、こ
のスルーホール内径と前記した各メタライズの抵抗値を
測定した結果を示せば第2表のとおりである。Next, a circuit conductor 14 was formed by vapor deposition or sputtering and etching (thin film pattern), and then the through hole was filled with Cu, Au (invention), and Pd/Cu0 (comparative example) in a test sample. Table 1 shows the relationship between the presence or absence of fracture in the ceramic, and Table 1 shows the results of measuring the inner diameter of this through hole and the resistance value of each metallization described above using a ceramic substrate with a thickness of 1.1 ms. Table 2 shows the results.
これによればスルーホール内径がφ0.25龍以下好ま
しくはφ0.20mm以下の場合はセラミックに破断を
生ぜず気密性もよく、スルーホールの抵抗も小さく満足
すべきものであった。According to this, when the inner diameter of the through hole was φ0.25 mm or less, preferably φ0.20 mm or less, the ceramic did not break, the airtightness was good, and the resistance of the through hole was small and satisfactory.
第1表
Cu粒径とスルーホール周囲のセラミック破断(a)
X :破断 ×印以外は気密性も合格1 xto−
’ std/cc以下
第2表
スルーホール抵抗値(mΩ)
(ンわCu粉は粒径15μ以上を使用すると、ち密な焼
結体になりにくくスルーホールの抵抗(勤吠きくなる。Table 1 Cu grain size and ceramic fracture around through hole (a)
X: Fracture Airtightness is also passed except for the × mark 1 xto-
'Std/cc or less Table 2 Through-hole resistance (mΩ) (When using Cu powder with a particle size of 15μ or more, it is difficult to form a dense sintered body and the resistance of the through-hole becomes hard.
面ペーストは市販のものを使用してもよい。Commercially available paste may be used.
代表的なものとしてデュポン社製57180をテストし
て同様の結果を得た。As a representative example, DuPont's 57180 was tested and similar results were obtained.
なお上記においてはセラミック基板の上下両面に回路導
体を設けた場合を示したが第2図に示す如く、基板の内
部の回路導体としてCuまたはAuの厚膜メタライズ層
13を形成するようにした場合、あるいは第3図に示す
ように基板自体を多層に形成した場合を含むものである
。(なお第2図第3図において第1図と同一部分には同
じ符号を付しであるので説明を省略する)
(発明の効果)
本発明のよればセラミック54反のスルーホール孔径が
φ0.25m1以下であっても導体抵抗が小さくしかも
CuやAu単体をメタライズに用いているにもかかわら
ずセラミック破断を生じることなく基板の気密性を確保
することができる。Although the above example shows a case in which circuit conductors are provided on both the upper and lower surfaces of a ceramic substrate, as shown in FIG. 2, a thick film metallized layer 13 of Cu or Au is formed as a circuit conductor inside the substrate. , or the case where the substrate itself is formed into multiple layers as shown in FIG. (In FIGS. 2, 3, and 3, the same parts as in FIG. 1 are given the same reference numerals, so explanations are omitted.) (Effects of the Invention) According to the present invention, the diameter of the through-hole of the ceramic 54 is φ0. Even if it is less than 25 m1, the conductor resistance is small and the airtightness of the substrate can be ensured without causing ceramic breakage even though Cu or Au alone is used for metallization.
第1図〜第3図は本発明の各実施例の断面図である。
11・・・基板、12・・・スルーホール、13・・・
厚膜メタライズ、14・・・回路導体1 to 3 are cross-sectional views of each embodiment of the present invention. 11... Board, 12... Through hole, 13...
Thick film metallization, 14...Circuit conductor
Claims (1)
スルーホール孔に充填された金属により電気的に導通さ
れたセラミック基板において、スルーホール孔が孔径0
.25mm以下であって、この中にCu粉末又はAu粉
末のいずれか一種以上を充填したことを特徴とするセラ
ミック基板。In a ceramic substrate in which conductor wiring of a ceramic substrate having two or more conductor wirings is electrically connected by metal filled in the through-hole hole, the through-hole hole has a hole diameter of 0.
.. A ceramic substrate having a thickness of 25 mm or less and filled with one or more of Cu powder and Au powder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63114784A JPH0728129B2 (en) | 1988-05-13 | 1988-05-13 | Method for manufacturing low temperature fired ceramic substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63114784A JPH0728129B2 (en) | 1988-05-13 | 1988-05-13 | Method for manufacturing low temperature fired ceramic substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01286494A true JPH01286494A (en) | 1989-11-17 |
| JPH0728129B2 JPH0728129B2 (en) | 1995-03-29 |
Family
ID=14646597
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63114784A Expired - Fee Related JPH0728129B2 (en) | 1988-05-13 | 1988-05-13 | Method for manufacturing low temperature fired ceramic substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0728129B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5362551A (en) * | 1991-05-22 | 1994-11-08 | Ngk Spark Plug Co., Ltd. | Ceramic substrate |
| JP2007305953A (en) * | 2005-09-01 | 2007-11-22 | Ngk Spark Plug Co Ltd | Wiring board, capacitor |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59178752A (en) * | 1983-03-30 | 1984-10-11 | Hitachi Ltd | Multilayer interconnection substrate |
| JPS60167489A (en) * | 1984-02-10 | 1985-08-30 | 富士通株式会社 | Method of producing ceramic circuit board |
-
1988
- 1988-05-13 JP JP63114784A patent/JPH0728129B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59178752A (en) * | 1983-03-30 | 1984-10-11 | Hitachi Ltd | Multilayer interconnection substrate |
| JPS60167489A (en) * | 1984-02-10 | 1985-08-30 | 富士通株式会社 | Method of producing ceramic circuit board |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5362551A (en) * | 1991-05-22 | 1994-11-08 | Ngk Spark Plug Co., Ltd. | Ceramic substrate |
| JP2007305953A (en) * | 2005-09-01 | 2007-11-22 | Ngk Spark Plug Co Ltd | Wiring board, capacitor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0728129B2 (en) | 1995-03-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |