JPH0250638B2 - - Google Patents
Info
- Publication number
- JPH0250638B2 JPH0250638B2 JP60188005A JP18800585A JPH0250638B2 JP H0250638 B2 JPH0250638 B2 JP H0250638B2 JP 60188005 A JP60188005 A JP 60188005A JP 18800585 A JP18800585 A JP 18800585A JP H0250638 B2 JPH0250638 B2 JP H0250638B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- multilayer wiring
- weight
- alumina
- dielectric constant
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Glass Compositions (AREA)
Description
〔技術分野〕
この発明は、高集積化したLSIを多数搭載する
ための多層配線基板、特に、コーデイエライト系
結晶化ガラス粉末と、石英ガラス粉末および／ま
たはアルミナ粉末との混合物により絶縁層を形成
し、これと銀、銀−パラジウム、金など低抵抗金
属からなる導体配線層とを積層してなる多層配線
基板に関する。
〔背景技術〕
LSIを搭載する基板として、従来、つぎのよう
なものがあつた。アルミナを主材としてグリーン
シートを形成し、このグリーンシート上にタング
ステンなど高融点金属の導体配線を厚膜技術によ
り印刷形成する。この印刷されたグリーンシート
を貼り合わせて積層した多層のグリーンシートを
約1500℃前後の高温非酸化雰囲気で焼結する。こ
のようにして得られたものである。しかし、上述
のようなアルミナ系の多層配線基板では、アルミ
ナの高い比誘電率と、微細化配線タングステン導
体の高い抵抗によつて多層内配線を伝播する信号
伝達時間が長くなり、高速化の要望には応え難か
つた。
この問題が解決するためには、固有抵抗の低い
Au、Ag、Ag−Pd、Cuなどで微細化配線を形成
すればよいのであるが、これらの金属の融点が、
アルミナの焼結温度より低く、焼結以前に配線パ
ターンが融解して表面張力で収縮し断線するとい
う問題があつた。
この問題を解決するため、誘電率が低く、焼結
温度の比較的低いガラス、あるいは、ガラスセラ
ミツクスを絶縁材料として用いて形成された多層
配線基板が、特公昭57−6257号公報、特開昭54−
111517号公報および特開昭59−178752号公報等に
示されている。しかしながら、このような多層配
線基板においても、絶縁材料中にNa、Ｋ、Liな
どのアルカリ金属系元素を含んでいることから、
マイグレーシヨンが起きやすく、絶縁性の点で難
点があると言う問題がある。
〔発明の目的〕
この発明は、このような現状に鑑みて、配線抵
抗が小さく、マイグレーシヨンを起こす心配のな
い、しかも、誘電率の低い多層配線基板を提供す
ることを目的としている。
〔発明の開示〕
この発明は、このような目的を達成するため
に、重量百分率でSiO245〜63％、Al2O318〜31
％、（好ましくは18〜28％）、MgO14〜28％、（好
ましくは18〜28％）、B2O32〜10％からなるガラ
ス粉末を主成分として60〜95重量％、石英ガラス
粉末およびアルミナ粉末のうち少なくとも１方を
副成分として40〜５重量％含むセラミツク絶縁材
料層と、低抵抗導体配線層とが交互に積層されて
なる多層配線基板を要旨とする。
以下に、この発明を詳しく説明する。
主成分として用いられるガラス粉末（以下、
「コーデイエライト系ガラス粉末」と称する）は、
SiO2、Al2O3、MgOおよびB2O3を前述のごとく
に配合してなるものであるから、誘電率がアルミ
ナに比べ低く、焼結温度も低抵抗金属導体、すな
わち、Au、Agなどの融点よりも低くて、しか
も、マイグレーシヨンを起こす心配のあるNa、
Liなどを含んでいないものである。
この主成分に対して副成分として石英ガラス
（SiO2）粉末を加えるようにすると、誘電率がさ
らに低い絶縁材料層を得ることができる。また、
副成分としてアルミナ粉末を加えるようにする
と、熱伝導率が良くなる。このため、必要に応じ
て、誘電率、熱伝導率を制御できるようになつて
いる。
以下に、この発明を、その実施例に基づいて詳
しく説明する。
まず、通常のガラス製造法および粉砕法によつ
て、重量百分率でSiO245〜63％、Al2O318〜31
％、MgO14〜28％（好ましくは16〜28％）、
B2O32〜10％を満足するＧ−１〜Ｇ−６の６種類
のコーデイエライト系ガラス粉末を用意した。こ
のＧ−１〜Ｇ−６の６種類のコーデイエライト系
ガラス粉末の組成比を第１表に示す。
つぎに、所定の粒径の石英ガラス粉末あるいは
アルミナ粉末を用意し、前述の６つの主成分に第
２表に示すような組成比で加え、アクリル系樹
脂、テトラエチレングリコール、アリルスルホン
酸および水を加えてボールミルで混練し、減圧下
で脱泡処理してスリツプを形成した。このスリツ
プを用いて、ドクタブレード法によりフイルムシ
ート上に0.2mm厚の連続した乾燥シートを形成し
た。この乾燥シートをフイルムシートからはが
し、10cm角になるように打ち抜きしてグリーンシ
ートを作製した。このグリーンシートに常法に従
いスルーホールを形成し、このスルーホール中に
低抵抗金属ペーストを詰め込んで、さらに、グリ
ーンシート上に低抵抗金属ペーストで配線パター
ンをスクリーン印刷した。このようにして準備し
た複数のシートを順次重ね合わせ、圧力50Kg／
cm2、温度110℃の条件下で積層圧着した。この積
層体を第１図にみるように、まず、毎時150℃の
速度で500℃まで昇温し、２時間45分そのままで
保持してグリーンシート中の有機物質を除去し
た。その後、毎時200℃で所定の焼結温度t1まで
昇温し、この焼結温度t1で２時間保持して、グリ
ーンシートを焼結した。こののち、毎時100℃で
400℃まで降温し、以後放冷して多層配線基板を
得た。このようにして得た実施例１〜８の多層配
線基板の吸水率、熱膨張率、誘電率および熱伝導
率をそれぞれ測定し、比較例のそれと併せて第２
表に示す。
[Technical Field] The present invention relates to a multilayer wiring board for mounting a large number of highly integrated LSIs, and in particular, to a multilayer wiring board for mounting a large number of highly integrated LSIs. This invention relates to a multilayer wiring board formed by laminating a conductive wiring layer made of a low resistance metal such as silver, silver-palladium, or gold. [Background Art] Conventionally, the following types of substrates have been used to mount LSIs. A green sheet is formed using alumina as the main material, and conductor wiring made of a high-melting point metal such as tungsten is printed on the green sheet using thick film technology. The printed green sheets are laminated together and then sintered in a high-temperature, non-oxidizing atmosphere at around 1500°C. This is how it was obtained. However, in the above-mentioned alumina-based multilayer wiring board, the high dielectric constant of alumina and the high resistance of the miniaturized tungsten conductor cause the signal transmission time to propagate through the wiring within the multilayer to be long, and the demand for higher speeds has increased. It was difficult to answer. In order to solve this problem, it is necessary to
It is possible to form miniaturized wiring using Au, Ag, Ag-Pd, Cu, etc., but the melting point of these metals is
Since the sintering temperature is lower than that of alumina, there was a problem that the wiring pattern would melt before sintering, shrink due to surface tension, and break. In order to solve this problem, a multilayer wiring board formed using glass or glass ceramics, which has a low dielectric constant and a relatively low sintering temperature, as an insulating material has been proposed in Japanese Patent Publication No. 57-6257, 54−
This is disclosed in JP-A No. 111517 and Japanese Patent Application Laid-open No. 178752/1983. However, even in such a multilayer wiring board, since the insulating material contains alkali metal elements such as Na, K, and Li,
There are problems in that migration is likely to occur and there are problems with insulation. [Object of the Invention] In view of the current situation, it is an object of the present invention to provide a multilayer wiring board that has low wiring resistance, is free from migration, and has a low dielectric constant. [Disclosure of the Invention] In order to achieve such an object, the present invention provides SiO 2 45-63% and Al 2 O 3 18-31% by weight percentage.
%, (preferably 18-28%), MgO 14-28%, (preferably 18-28%), B2O3 2-10%, 60-95 % by weight, quartz glass powder The gist of the present invention is a multilayer wiring board in which ceramic insulating material layers containing 40 to 5% by weight of at least one of alumina powder and alumina powder as a subcomponent and low resistance conductor wiring layers are alternately laminated. This invention will be explained in detail below. Glass powder used as the main component (hereinafter referred to as
(referred to as "cordierite glass powder") is
Since it is made by blending SiO 2 , Al 2 O 3 , MgO and B 2 O 3 as mentioned above, its dielectric constant is lower than that of alumina, and the sintering temperature is also lower than that of low-resistance metal conductors, such as Au, Ag. Na, which has a melting point lower than that of Na, and which may cause migration,
It does not contain Li or the like. By adding silica glass (SiO 2 ) powder as a subcomponent to this main component, an insulating material layer with an even lower dielectric constant can be obtained. Also,
Adding alumina powder as a subcomponent improves thermal conductivity. Therefore, the dielectric constant and thermal conductivity can be controlled as necessary. The present invention will be described in detail below based on examples thereof. First, SiO 2 45-63%, Al 2 O 3 18-31% by weight percentage by normal glass manufacturing method and crushing method.
%, MgO14-28% (preferably 16-28%),
Six types of cordierite glass powders G-1 to G-6 satisfying B 2 O 3 2 to 10% were prepared. Table 1 shows the composition ratios of the six types of cordierite glass powders G-1 to G-6. Next, prepare quartz glass powder or alumina powder with a predetermined particle size, add it to the six main components mentioned above in the composition ratio shown in Table 2, and prepare acrylic resin, tetraethylene glycol, allyl sulfonic acid, and water. was added, kneaded in a ball mill, and defoamed under reduced pressure to form a slip. Using this slip, a continuous dry sheet with a thickness of 0.2 mm was formed on the film sheet by the doctor blade method. This dried sheet was peeled off from the film sheet and punched into 10 cm square pieces to produce green sheets. A through hole was formed in this green sheet according to a conventional method, a low resistance metal paste was filled into the through hole, and a wiring pattern was screen printed using the low resistance metal paste on the green sheet. Multiple sheets prepared in this way were stacked one on top of the other, and a pressure of 50 kg/
cm 2 and a temperature of 110°C. As shown in Fig. 1, the temperature of this laminate was first raised to 500°C at a rate of 150°C per hour, and the temperature was maintained for 2 hours and 45 minutes to remove organic substances in the green sheets. Thereafter, the temperature was raised to a predetermined sintering temperature t 1 at 200° C. per hour, and the green sheet was sintered by holding at this sintering temperature t 1 for 2 hours. After this, at 100℃/hour
The temperature was lowered to 400°C and then left to cool to obtain a multilayer wiring board. The water absorption coefficient, thermal expansion coefficient, dielectric constant, and thermal conductivity of the multilayer wiring boards of Examples 1 to 8 thus obtained were measured, and the second
Shown in the table.
【表】【table】
この発明の多層配線基板は、以上のように、絶
縁層が、重量百分率でSiO245〜63％、Al2O318〜
31％、MgO14〜28％、B2O32〜10％からなるコ
ーデイエライト系ガラス粉末を主成分として60〜
95重量％、石英ガラスおよび／またはアルミナ粉
末を副成分として40〜５重量％含む絶縁材料で構
成され、低抵抗導体で配線層が形成されているの
で、誘電率が低く、熱伝導率に優れ、かつ、マイ
グレーシヨンが起こりにくい。そのため、LSI搭
載基板として用いた場合に、高速演算処理を可能
とすることができる。
As described above, in the multilayer wiring board of the present invention, the insulating layer contains 45 to 63% SiO 2 and 18 to 18% Al 2 O 3 by weight percentage.
60~60~ with cordierite glass powder as main component consisting of 31%, MgO14 ~ 28%, and B2O3 2~10%.
It is composed of an insulating material containing 95% by weight and 40 to 5% by weight of quartz glass and/or alumina powder as subcomponents, and the wiring layer is made of a low resistance conductor, so it has a low dielectric constant and excellent thermal conductivity. , and migration is less likely to occur. Therefore, when used as an LSI mounting board, high-speed arithmetic processing can be achieved.
第１図は、この発明にかかる多層配線基板の焼
成プロフイールを表すグラフである。
FIG. 1 is a graph showing the firing profile of the multilayer wiring board according to the present invention.
Claims (1)
％、MgO14〜28％、B2O32〜10％からなるガラ
ス粉末を主成分として60〜95重量％、石英ガラス
粉末およびアルミナ粉末のうち少なくとも１方を
副成分として40〜５重量％含むセラミツク絶縁材
料層と、低抵抗導体配線層とが交互に積層されて
なる多層配線基板。1 SiO 2 45-63%, Al 2 O 3 18-31 in weight percentage
%, MgO 14-28%, B 2 O 3 2-10% as a main component, 60-95% by weight, and at least one of quartz glass powder and alumina powder as a sub-component 40-5% by weight. A multilayer wiring board consisting of alternating layers of ceramic insulating material and low-resistance conductor wiring layers.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18800585A JPS6247198A (en) | 1985-08-27 | 1985-08-27 | Multilayer interconnection substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18800585A JPS6247198A (en) | 1985-08-27 | 1985-08-27 | Multilayer interconnection substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6247198A JPS6247198A (en) | 1987-02-28 |
| JPH0250638B2 true JPH0250638B2 (en) | 1990-11-02 |
Family
ID=16215974
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18800585A Granted JPS6247198A (en) | 1985-08-27 | 1985-08-27 | Multilayer interconnection substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6247198A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2800176B2 (en) * | 1987-08-18 | 1998-09-21 | 旭硝子株式会社 | Glass ceramic composition |
| JPH0287558A (en) * | 1988-09-24 | 1990-03-28 | Murata Mfg Co Ltd | Ic chip |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58156552A (en) * | 1982-03-11 | 1983-09-17 | Nec Corp | Inorganic composition for insulating ceramic paste |
| JPS599992A (en) * | 1982-07-08 | 1984-01-19 | 株式会社日立製作所 | Method of producing multilayer circuit board |
| JPS59130005A (en) * | 1983-01-18 | 1984-07-26 | 旭硝子株式会社 | Composition for thick film circuit insulating layer |
| JPS59178752A (en) * | 1983-03-30 | 1984-10-11 | Hitachi Ltd | Multilayer interconnection substrate |
| JPS61275161A (en) * | 1985-05-29 | 1986-12-05 | 株式会社ノリタケカンパニーリミテド | Low temperature burnt multilayer ceramic substrate |
-
1985
- 1985-08-27 JP JP18800585A patent/JPS6247198A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6247198A (en) | 1987-02-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0361359B2 (en) | ||
| JPH0343786B2 (en) | ||
| JP3331083B2 (en) | Low temperature firing ceramic circuit board | |
| JPH0569319B2 (en) | ||
| JPS59178752A (en) | Multilayer interconnection substrate | |
| JP4549028B2 (en) | Glass ceramic composition, glass ceramic sintered body, method for producing glass ceramic sintered body, and wiring board | |
| JPH0250638B2 (en) | ||
| JP4549029B2 (en) | Glass ceramic composition, glass ceramic sintered body, method for producing glass ceramic sintered body, and wiring board | |
| JPH0617250B2 (en) | Glass ceramic sintered body | |
| JP2002198622A (en) | Metallized composition, wiring board using the same, and method of manufacturing the same | |
| JPH1116418A (en) | Copper metallized composition and glass-ceramic wiring board using the same | |
| JPH11186727A (en) | Wiring board and method of manufacturing the same | |
| JP2004235347A (en) | Insulating ceramics and multilayer ceramic substrate using the same | |
| JP3643264B2 (en) | Conductive paste and wiring board using the same | |
| JP3363297B2 (en) | Low temperature firing porcelain composition | |
| JP2605306B2 (en) | Multilayer circuit board | |
| JP2003277170A (en) | Composition for wiring conductor | |
| JP3103686B2 (en) | Multilayer circuit board | |
| JPH06279097A (en) | Production of sintered glass ceramic and sintered glass ceramic | |
| JP2652229B2 (en) | Multilayer circuit ceramic substrate | |
| JP3193592B2 (en) | Ceramic multilayer substrate and method of manufacturing the same | |
| JPH06243716A (en) | Copper paste | |
| JPH01287992A (en) | Low temperature sintered multilayer ceramic board | |
| JPH01138793A (en) | Ceramic multilayer circuit substrate | |
| JPH10341067A (en) | Inorganic multilayered substrate and conductor paste for via holes |