JPH0129107B2 - - Google Patents
Info
- Publication number
- JPH0129107B2 JPH0129107B2 JP56215674A JP21567481A JPH0129107B2 JP H0129107 B2 JPH0129107 B2 JP H0129107B2 JP 56215674 A JP56215674 A JP 56215674A JP 21567481 A JP21567481 A JP 21567481A JP H0129107 B2 JPH0129107 B2 JP H0129107B2
- Authority
- JP
- Japan
- Prior art keywords
- information
- exchange
- data
- circuit
- line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/18—Protocol analysers
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
Description
【発明の詳細な説明】
本発明はプロトコル検証装置に係り、特に、相
互通信するデータ送受信装置間の回線を多点に渡
り検証するプロトコル検証方式に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a protocol verification device, and more particularly to a protocol verification method for verifying lines between mutually communicating data transmitting and receiving devices at multiple points.
従来のプロトコル検証方式としては、例えば端
末と交換機間の回線上を流れるデータを用いてプ
ロトコルの検証を実行していた。この方式は、端
末・交換機間のプロトコル、例えば、HDLC手順
の検証には有効であるが、端末・端末間のプロト
コル、例えばCCiTT勧告Ｘ・25レベル３、パケ
ツトレベルの検証には不充分であつた。即ち、第
１図において端末Ａから送信した信号に対する応
答をプロトコル検証装置Ｃで受信出来ぬ場合、障
害が交換機Ｎにあるのか相手端末Ｂにあるのかの
判定がＣでは出来ぬ欠点があつた。 In a conventional protocol verification method, for example, protocol verification was performed using data flowing on a line between a terminal and an exchange. Although this method is effective for verifying protocols between terminals and exchanges, such as HDLC procedures, it is insufficient for verifying protocols between terminals, such as CCiTT Recommendation X/25 Level 3 and packet level. . That is, in FIG. 1, when protocol verification device C cannot receive a response to a signal transmitted from terminal A, C cannot determine whether the fault is in exchange N or partner terminal B.
本発明の目的は、データ送受信装置間の回線上
の複数の検出点を設けることにより、プロトコル
検証精度の向上を図つたものである。 An object of the present invention is to improve protocol verification accuracy by providing a plurality of detection points on a line between data transmitting and receiving devices.
上記目的は、本発明によれば、データ送受信装
置間に位置し、回線上のパケツト情報をモニタし
つつプロトコルの検証を行なうデータ通信システ
ムにおいて、相互に通信するデータ送受信装置間
の端末Ａと交換機間のデータ送信回線及びデータ
受信回線と、交換機と端末Ｂ間のデータ送信回線
及びデータ受信回線上のパケツト情報S1，R2及
びS2，R1を同時に取り込む情報抽出回路と、該
情報抽出回路を経由して蓄積エリアに格納された
該交換機を介在する前のパケツト情報S1，R1と
該情報抽出回路の該交換機を介在する後のパケツ
ト情報S2，R2とを同時に取り出しパケツト情報
〔S1とS2及びR1とR2〕の一致を検出する情報一致
回路と、該情報一致回路にてパケツト情報が一致
した時プロトコル検証回路へ本情報を出力させる
ことによつて達成される。 The above object, according to the present invention, is a data communication system that is located between data transmitters and receivers and that verifies protocols while monitoring packet information on a line. an information extraction circuit that simultaneously captures packet information S 1 , R 2 and S 2 , R 1 on the data transmission line and data reception line between the exchange and the terminal B, and the data transmission line and data reception line between the exchange and the terminal B; The packet information S 1 , R 1 before passing through the exchange and stored in the storage area via the circuit and the packet information S 2 , R 2 after passing through the exchange of the information extraction circuit are extracted simultaneously. Achieved by an information matching circuit that detects matching of information [S 1 and S 2 and R 1 and R 2 ], and by outputting this information to the protocol verification circuit when the packet information matches in the information matching circuit. be done.
以下、本発明を図面によつて詳細に説明する。
本発明の一実施例を第２図に示す。端末Ａから交
換機Ｎへまた、交換機Ｎから端末Ｂへの回線上を
流れる情報はそれぞれ信号線S1，S2としてプロト
コル検証装置Ｃへ引き込まれ、端末Ｂから端末Ａ
へ向けての回線上の情報は信号線R1，R2として
Ｃへ引き込まれる。 Hereinafter, the present invention will be explained in detail with reference to the drawings.
An embodiment of the present invention is shown in FIG. Information flowing on the line from terminal A to exchange N and from exchange N to terminal B is drawn into protocol verification device C as signal lines S 1 and S 2 , respectively, and from terminal B to terminal A.
The information on the line towards C is drawn into C as signal lines R 1 and R 2 .
信号線S1は情報抽出回路Ｄにより信号路上の情
報のみ取り出される。取り出された情報は信号線
ａを通つて蓄積エリアＭに格納される。この時Ｄ
は信号線ｂを介してタイマＴを起動する。一方信
号線S2の情報もＤにより抽出され信号線ｃを介し
て情報照合回路CMに送られる。これを受けた
CMは信号線ｄを介してＭへアクセスしＭ内の最
も古い情報を入手するとともに、これとＣを介し
て受信した情報を比較する。一致の場合、プロト
コル検証回路PCへ信号線ｇを介して本情報を転
送するとともに、Ｍ内の情報の有無を判定し、情
報無の場合信号線ｅを用いてＴをリセツトする。
情報有の時Ｔのリセツトはしない。また、Ｍは、
情報読取り時に読取られた情報をクリアする。
CMによる照合結果が不一致の場合、その旨PC
へｇを介して通知する。一方、Ｔが一定時間を超
えると、即ちタイムアウトすると、信号線ｆを介
してその旨PCに通知される。 The information extraction circuit D extracts only the information on the signal line S1 from the signal line S1 . The extracted information is stored in storage area M through signal line a. At this time D
starts timer T via signal line b. On the other hand, the information on the signal line S2 is also extracted by D and sent to the information matching circuit CM via the signal line c. I received this
CM accesses M via signal line d, obtains the oldest information in M, and compares this with the information received via C. If they match, this information is transferred to the protocol verification circuit PC via the signal line g, and the presence or absence of information in M is determined, and if there is no information, T is reset using the signal line e.
T is not reset when information is available. Also, M is
Clear the information read when reading information.
If there is a discrepancy in the verification results by CM, please notify the PC
Notify via g. On the other hand, when T exceeds a certain period of time, that is, when it times out, the PC is notified of this via the signal line f.
信号線R1，R2に関しても同様の手順でプロト
コルの検証が実行される。 Protocol verification is performed in the same manner for signal lines R 1 and R 2 as well.
本実施例によれば、従来方式に比してより詳細
なプロトコル検証が実現出来る。 According to this embodiment, more detailed protocol verification can be achieved compared to the conventional method.
第３図は本発明の他の実施例を示すもので、第
２図と異なるのは、プロトコル検証装置Ｃで各々
の端末交換機間プロトコルを検証後、いずれかの
Ｃで異常を検出時にプロトコル検証回路PCを用
いて総合的なチエツクを実行することである。こ
の実施例では、PCが起動されるのが異常時のみ
で良く、プロトコル検証処理の高速化が可能とな
る。 FIG. 3 shows another embodiment of the present invention. What is different from FIG. 2 is that after the protocol verification device C verifies the protocol between each terminal exchange, the protocol verification is performed when an abnormality is detected in any C. The purpose is to perform a comprehensive check using a circuit PC. In this embodiment, the PC only needs to be activated when an abnormality occurs, making it possible to speed up the protocol verification process.
以上説明した如く本発明によれば、相互に通信
するデータ送受信装置間の情報を多点に渡りチエ
ツクできるのでプロトコル検証の精度向上効果が
大きい。 As described above, according to the present invention, information between mutually communicating data transmitting/receiving devices can be checked at multiple points, which greatly improves the accuracy of protocol verification.
第１図は従来方式例であり、Ａ，Ｂは端末、Ｎ
は交換機、Ｃはプロトコル検証装置である。第２
図は、本発明の実施例であり、Ｄは情報抽出回
路、Ｍは蓄積エリア、Ｔはタイマ、CMは情報照
合回路、PCはプロトコル検証回路、Ｃはプロト
コル検証装置、ａ，ｂ，ｃ，ｄ，ｅ，ｆ，ｇはそ
れぞれ信号線を示す。第３図は、本発明の変形例
であり、Ｃはプロトコル検証装置、PCはプロト
コル検証回路を示す。
Figure 1 shows an example of the conventional system, where A and B are terminals, N
is an exchange, and C is a protocol verification device. Second
The figure shows an embodiment of the present invention, where D is an information extraction circuit, M is a storage area, T is a timer, CM is an information verification circuit, PC is a protocol verification circuit, C is a protocol verification device, a, b, c, d, e, f, and g each indicate a signal line. FIG. 3 shows a modification of the present invention, where C indicates a protocol verification device and PC indicates a protocol verification circuit.
Claims (1)
ツト情報をモニタしつつプロトコルの検証を行な
うデータ通信システムにおいて、 相互に通信するデータ送受信装置間の端末Ａと
交換機間のデータ送信回線及びデータ受信回線
と、交換機と端末Ｂ間のデータ送信回線及びデー
タ受信回線上のパケツト情報S1，R2及びS2，R1
を同時に取り込む情報抽出回路と、 該情報抽出回路を経由して蓄積エリアに格納さ
れた該交換機を介在する前のパケツト情報S1，
R1と該情報抽出回路の該交換機を介在する後の
パケツト情報S2，R2とを同時に取り出しパケツ
ト情報〔S1とS2及びR1とR2〕の一致を検出する
情報一致回路と、 該情報一致回路にてパケツト情報が一致した時
プロトコル検証回路へ本情報を出力させることを
特徴とする多点プロトコル検証方式。[Scope of Claims] 1. In a data communication system located between data transmitting and receiving devices and verifying protocols while monitoring packet information on a line, data between a terminal A and an exchange between data transmitting and receiving devices that communicate with each other is provided. Packet information S 1 , R 2 and S 2 , R 1 on the transmission line, data reception line, and data transmission line and data reception line between the exchange and terminal B
an information extraction circuit that simultaneously captures packet information S 1 , which is stored in a storage area via the information extraction circuit and before passing through the exchange;
an information matching circuit that simultaneously extracts R 1 and packet information S 2 and R 2 after passing through the exchange of the information extraction circuit and detects a match between the packet information [S 1 and S 2 and R 1 and R 2 ]; A multi-point protocol verification method, characterized in that when packet information matches in the information matching circuit, this information is output to a protocol verification circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56215674A JPS58111459A (en) | 1981-12-24 | 1981-12-24 | Multipoint protocol verifying system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56215674A JPS58111459A (en) | 1981-12-24 | 1981-12-24 | Multipoint protocol verifying system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58111459A JPS58111459A (en) | 1983-07-02 |
| JPH0129107B2 true JPH0129107B2 (en) | 1989-06-07 |
Family
ID=16676281
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56215674A Granted JPS58111459A (en) | 1981-12-24 | 1981-12-24 | Multipoint protocol verifying system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58111459A (en) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5835421B2 (en) * | 1979-12-17 | 1983-08-02 | 富士通株式会社 | Data recording method |
-
1981
- 1981-12-24 JP JP56215674A patent/JPS58111459A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58111459A (en) | 1983-07-02 |
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