JPH01291660A - Surge voltage suppression circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Summary] Regarding a surge voltage suppression circuit in a switching power supply, the purpose of this invention is to suppress the surge voltage generated in a diode when a transistor constituting a switching power supply is turned on and turned off. , a boost converter having a saturable magnetic core, an inductance, a rectifying diode, and a smoothing capacitor, a secondary winding of the saturable magnetic core and a secondary winding of the inductance.
One end of the secondary winding is connected, and a diode and a resistor are connected in series to the other end of the secondary winding.

[Industrial application field]

The present invention relates to a surge voltage suppression circuit in a switching power supply.

A switching power supply has a transistor Tr and a diode D that turn on and off in opposite phases, but the diode D does not turn off the moment the transistor Tr turns on, and the accumulated charge in the diode D causes a pulse of reverse current. flow in a shape. At this time, the diode D in the circuit
As a result, energy is accumulated in the inductance parasitic to the wiring, and an excessive surge voltage is generated when diode D is turned off, which also generates large noise at the output terminal.

Various circuits have been studied to suppress this surge voltage.
This time, we propose a surge voltage suppression circuit for boost converters.

[Conventional technology]

FIG. 3 shows a circuit diagram of a surge voltage suppression circuit in a conventional boost converter. In the figure, 1 is a switching transistor Tr, 2 is a saturable magnetic core 5R33 is an inductance I7, 4 is a rectifying diode D, 5 is a smoothing capacitor C16 is an input DC power supply E, 7 is a load RL, and 8 is an RC snubber circuit. show.

The boost converter is a circuit that boosts the input voltage of the input DC power supply 6 by switching on and off the on/off transistor l, and supplies the DC voltage to the load 7. By turning on and off the base voltage of the switching transistor 1, the collector current IC of the transistor turns on and off, and the charge accumulated in the inductance 3 is accumulated in the capacitor 5 through the rectifying diode 4, and the discharge voltage Vc is applied to the load 7. Supplied. For example, if the DC voltage of the input chamber H6 is 5V, the voltage Vc supplied to the load 7 will be a constant voltage of IOV. Transistor 1 and diode 4 turn on and off in opposite phases as a switching power supply; when the transistor is on, the diode is off, and when the transistor is off, the diode is on, but the moment transistor 1 turns on, diode 4 turns off. Instead, the reverse current io flows in a pulsed manner due to the accumulated charge in the diode 4. At this time, energy is accumulated in the inductance of the diode 4 and the wiring in the circuit, and when the diode 4 is turned off, an excessive surge voltage is generated, and due to this, large noise is generated at the output terminal. Reverse current of diode 4 which is the main cause of this surge voltage 1. A saturable magnetic core 2 is used as a means to prevent this.

The saturable magnetic core 2 has a low inductance when it is in a saturated state, and a high inductance when it is in a non-saturated state, so depending on the saturated and non-saturated states of the saturable magnetic core 2, the turn-on time of the transistor 1, that is, the rise time of the collector current, and the turn-off time, that is, the rise time of the collector current, The transistor 1 is turned on and off by controlling the fall time of the collector current.

However, if there is only the saturable magnetic core 2, the reverse current i of the diode 4 when the transistor 1 is turned on is suppressed by the high inductance of the saturable magnetic core 2, and at this time the saturable magnetic core 2 changes from the saturated state to the unsaturated state. , and the transistor 1 remains in a non-saturated state during the on period.

Therefore, the next time transistor 1 is turned off, the forward current flowing through diode 4 is also blocked by the high inductance of saturable magnetic core 2, and an excessive surge voltage is generated in transistor 1, causing stress on transistor 1. give.

The surge voltage generated across the diode 4.

This causes large noise to occur at the output end, but as a countermeasure to this, a common method is to add an RC snubber circuit 8 consisting of a series circuit of a resistor and a capacitor to both ends of the diode 4. However, considering that the main cause of surge voltage generation is the reverse current of the diode, it is more effective to prevent this.
is being considered for use. However, with only the saturable magnetic core 2, the high inductance that blocks the reverse current of the diode 4 also blocks the forward current of the diode 4.
Conversely, a surge voltage is generated across the transistor switch I.

[Problem to be solved by the invention]

Therefore, if only the method of using a saturable magnetic core is used to suppress the surge voltage generated in the diode when the transistor is turned on and turned off, which is a problem with switching power supplies, surge voltage will be generated across the transistor switch. has promised to provide a circuit to suppress this.

[Means to solve the problem]

In order to solve this problem, the present invention provides a secondary winding around the saturable magnetic core and the inductance to block the reverse current in the diode that occurs when the l transistor is turned on.

FIG. 1 shows a basic configuration diagram of a surge voltage suppression circuit in a boost converter according to the present invention. In the figure, 1 is an open/close type transistor, 4 is a rectifying diode', 5 is a smoothing capacitor, 6 is a DC power supply, and 7 is a load, which constitutes a step-up converter. 10 is a surge voltage suppression circuit added in the present invention; a saturable magnetic core 20 having a secondary winding; an inductance 30 having a secondary winding; a rectifier connected to the secondary side of the saturable magnetic core 20 and the inductance 30; diode 4
0 and the resistor 50 surrounded by a dotted line.

[Effect]

In the present invention, one of the saturable magnetic core 20 and the inductance 30 is
Diode 4 generated by transistor 1 and diode 4 that turn on and off in opposite phases on the next side, as in the conventional case.
can prevent reverse current. Saturable magnetic core 20
is a minute inductance in a saturated state, and becomes infinite in a non-saturated state.

First, when the transistor l is in the off state, a current flows through the inductance 30 and the saturable magnetic core 20, and the saturable magnetic core 20 is in a saturated state and has a low inductance. Next, when the transistor 1 is turned off and off, the charge accumulated in the inductance 30 when it is on is released, so the saturable magnetic core 20 maintains a saturated state, so no surge voltage is generated.

Next, when the transistor 1 is turned on, that is, when a reverse current is generated in the diode 4, the reverse current flows in the region where the diode 4 has accumulated charge, but because a voltage is applied to the saturated magnetic core 20 in the reverse direction, it immediately stops flowing. Saturation fW core 2
0 becomes unsaturated and reverse current is blocked due to its high inductance.

At this time, the current flowing to the secondary side is smaller than the reverse current because of the resistor 50. In the region where the diode 4 is completely off, the diode 4 releases the stored charge and becomes off. At this time, the ≠ energy stored in the inductance 30 can force the saturated magnetic core 20 to return to the saturated state.

By repeating the above state, it is possible to suppress the surge voltage caused by the diode 4 caused by turning on and off the transistor 1.

〔Example〕

Examples of the present invention are shown in FIGS. 2(a), (b), and (C).

(d) will be broken down and explained. In the figure, Tr is a switching transistor, D is a rectifying diode 4, C is a smoothing capacitor 5, and E is an input DC power source 6.1? L is load 6,
SR is a saturable magnetic core 20. L is inductance 30, D
, - is a rectifier diode 40 connected to the secondary winding, R
indicates a resistor 50 connected to the secondary winding.

FIG. 2(a) shows when the l transistor Tr is in the on state,
+ and - indicate the direction of the inductance I and the voltage generated in the saturable magnetic core SR. Further, jC+ jO+jP respectively indicate the current flowing to the primary winding side of the inductance L, the primary winding side of the saturable magnetic core SR, and the current flowing to the secondary winding side of the inductance L and the saturable magnetic core SR, and their directions. When the Tr is on, a collector current IC flows through the inductance, and a current i flows through the diode D in the rectifying direction. flows and is accumulated in capacitor C. This current causes the saturable magnetic core SR to
The next winding becomes saturated, resulting in low inductance.

At this time, a current i flows in the direction of the rectifier on the secondary winding side.

flows.

FIG. 2(b) shows when the transistor Tr is turned off and off, and when the transistor Tr is turned on, the charge accumulated on the primary winding side of the inductance L is released, so that the current i. As a result, the primary winding side of the saturable magnetic core SR maintains a saturated state, so no surge voltage is generated. At this time, the reverse current i flowing to the secondary winding side is blocked by the rectifier.

FIG. 2(c) shows a state in which the transistor Tr is turned on.
That is, this shows a state in which a reverse current i1) of diode D is generated. At this time, in the region where the diode D has accumulated charge, the diode D is short-circuited due to the accumulated charge in the diode D, and the current io flows in the opposite direction, but the saturable magnetic core S
Since a voltage is applied in the reverse direction to the primary winding side of R, the saturable magnetic core SR immediately becomes unsaturated, and the reverse current iD is blocked due to its high inductance. At this time, a current i flows in the direction of the rectifier on the secondary winding side, but it is limited by the resistor R and is smaller than the current i.

In FIG. 2(d), in a region where the transistor Tr is turned on and the diode D is completely off, the diode D becomes off after releasing the accumulated charge. At this time, due to the energy stored in the inductance, 2
The saturable magnetic core SR can be returned to the saturated state by the current ip flowing in the rectifying direction toward the next winding. Then again the second
Return to the state shown in figure (a).

〔Effect of the invention〕

By repeating the conditions of (1) from FIG. Voltage can be suppressed.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the principle of the present invention, FIG. 2 is a circuit diagram illustrating an embodiment of the present invention step by step, and FIG. 3 is a circuit diagram of a conventional example. In the figure, 1 is a switching transistor, 2.20 is a saturable magnetic core, 3.30 is an inductance, 4 and 40 are rectifying diodes, 5 is a smoothing capacitor, 6 is an input DC power supply, 7 is an i-load, and 8 is an 10 is a snubber circuit, 10 is a surge voltage suppression circuit, and 50 is a resistor. Principle circuit diagram of the present invention Fig. 1 Fig. 3

Claims (1)

[Scope of Claims] A boost converter having a switching transistor (1), a saturable magnetic core (20), an inductance (30), a rectifying diode (4), and a smoothing capacitor (5), wherein the saturable magnetic core ( 20) and one end of the secondary winding of the inductance (30) are connected, and a diode (40) and a resistor (50) are connected in series to the other end of the secondary winding. A surge voltage suppression circuit characterized by: