JPH0129255B2 - - Google Patents
Info
- Publication number
- JPH0129255B2 JPH0129255B2 JP56155340A JP15534081A JPH0129255B2 JP H0129255 B2 JPH0129255 B2 JP H0129255B2 JP 56155340 A JP56155340 A JP 56155340A JP 15534081 A JP15534081 A JP 15534081A JP H0129255 B2 JPH0129255 B2 JP H0129255B2
- Authority
- JP
- Japan
- Prior art keywords
- defect
- printed circuit
- display sheet
- circuit board
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/84—Systems specially adapted for particular applications
- G01N21/88—Investigating the presence of flaws or contamination
- G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
- G01N21/956—Inspecting patterns on the surface of objects
Landscapes
- Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Biochemistry (AREA)
- General Health & Medical Sciences (AREA)
- General Physics & Mathematics (AREA)
- Immunology (AREA)
- Pathology (AREA)
- Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Supply And Installment Of Electrical Components (AREA)
- Length Measuring Devices By Optical Means (AREA)
Description
【発明の詳細な説明】
本発明はプリント基板表面に形成されたパター
ンの欠陥位置表示方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for indicating defect positions of patterns formed on the surface of a printed circuit board.
電子計算機には多数のプリント基板が用いられ
ているが、プリント基板の信頼度を維持するた
め、僅かな欠陥も残さぬようその製造工程におい
て形成されたパターンを検査し、発見された欠陥
はすべて補修を施こす。そのため発見されたパタ
ーンの欠陥位置を正確に表示することが必要で、
従来はパターン上に発見された欠陥に対応する位
置にマークを付した欠陥表示シートを作成し、こ
の欠陥表示シートをプリント板上に当てがつて修
正すべき欠陥を識別していた。 Many printed circuit boards are used in electronic computers, but in order to maintain the reliability of the printed circuit boards, the patterns formed during the manufacturing process are inspected to ensure that even the slightest defect remains, and all defects found are removed. Make repairs. Therefore, it is necessary to accurately display the defect position of the discovered pattern.
Conventionally, a defect display sheet with marks attached to positions corresponding to defects found on a pattern was created, and this defect display sheet was applied onto a printed board to identify defects to be corrected.
しかしこの方法では欠陥表示シートは紙を用い
るため不透明であり、欠陥を識別するには表示さ
れたマークの所を指でおさえて欠陥表示シートを
めくり、指でおさえた近傍を探して欠陥を見つけ
なければならず、また見出した欠陥を補修すると
きは欠陥表示シートを取りまずさねばならないと
いう不便さがあつた。 However, in this method, the defect display sheet is made of paper and is opaque, so to identify the defect, place your finger on the displayed mark and turn over the defect display sheet. In addition, there was the inconvenience of having to remove the defect display sheet when repairing a discovered defect.
本発明の目的は上記問題点を解消し、プリント
基板に欠陥表示シートをかぶせたまま欠陥を識別
し、補修し得る欠陥位置表示方法を提供すること
にあり、この目的は本発明において、欠陥表示シ
ートの検出された欠陥に対応する位置に、窓を開
口することにより達成される。 An object of the present invention is to solve the above-mentioned problems and to provide a defect position display method that can identify and repair defects while covering a printed circuit board with a defect display sheet. This is accomplished by opening a window in the sheet at a location corresponding to the detected defect.
以下本発明の一実施例を図面により説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第１図は本発明の欠陥位置表示方法の一実施例
を説明するための図で、使用した欠陥位置表示装
置のシステム構成を併せて示す。 FIG. 1 is a diagram for explaining one embodiment of the defect position display method of the present invention, and also shows the system configuration of the defect position display device used.
図において、１は検査しようとするプリント基
板である。このプリント基板１のパターン２を、
レーザ３から出射されたレーザビームをビームエ
キスパンダ４により一旦拡大し、これを回転ミラ
ー５により反射し、レンズ６で微小スポツトに絞
つて照射する。パターン２で反射した光はレンズ
６を通り回転ミラー５及びハーフミラー７で反射
し、レンズ８により光検知器９の受光面に結像さ
れる。光検知器９はこれを入射光強度に応じた電
気信号に変換し、増幅器１０に送出する。増幅器
１０で増幅された前記信号はコンパレータ１１で
２値化されて、前記パターンの有無に応じて
“１”か“０”の映像信号に変換される。 In the figure, 1 is a printed circuit board to be inspected. The pattern 2 of this printed circuit board 1 is
A laser beam emitted from a laser 3 is once expanded by a beam expander 4, reflected by a rotating mirror 5, and focused by a lens 6 to a minute spot for irradiation. The light reflected by the pattern 2 passes through the lens 6, is reflected by the rotating mirror 5 and the half mirror 7, and is imaged by the lens 8 on the light receiving surface of the photodetector 9. The photodetector 9 converts this into an electrical signal according to the intensity of the incident light, and sends it to the amplifier 10. The signal amplified by the amplifier 10 is binarized by the comparator 11 and converted into a video signal of "1" or "0" depending on the presence or absence of the pattern.
このような操作を回転ミラー５を回転させるこ
とによりレーザビームの照射位置を移動させ、ま
たプリント基板を載置したXYテーブル（図示せ
ず）を移動させることによりプリント基板１全面
に対して行う。このようにプリント基板１全面を
レーザビームで走査し、プリント基板１のパター
ンに対応した映像信号がアドレスと共に欠陥検出
回路１２に送り込まれる。欠陥検出回路１２は入
力された映像信号に基いて、所定の論理演算を行
つてパターンの欠陥とそのアドレスを検出し、ア
ドレスメモリ１３に格納する。なおここで、Ａは
欠陥検出手段を示す。 Such operations are performed over the entire surface of the printed circuit board 1 by rotating the rotary mirror 5 to move the irradiation position of the laser beam, and by moving the XY table (not shown) on which the printed circuit board is placed. In this way, the entire surface of the printed circuit board 1 is scanned with a laser beam, and a video signal corresponding to the pattern of the printed circuit board 1 is sent to the defect detection circuit 12 together with the address. The defect detection circuit 12 performs a predetermined logical operation based on the input video signal to detect pattern defects and their addresses, and stores them in the address memory 13. Note that here, A indicates a defect detection means.
プリント基板１全面の検査が終了すると、コン
トローラ１４は、前記アドレスメモリ１３に格納
された欠陥のアドレスを読み出し、欠陥位置表示
シードパンチヤ２０を作動せしめて欠陥表示シー
ト２１に窓を開口する。 When the entire surface of the printed circuit board 1 is inspected, the controller 14 reads out the address of the defect stored in the address memory 13, operates the defect position display seed puncher 20, and opens a window in the defect display sheet 21.
欠陥表示シートパンチヤ２０は、欠陥表示シー
ト２１を駆動するローラ２２，２３、欠陥表示シ
ート２１に窓を開口するためのパンチ２４、パン
チ２４を支持する支持部２５、支持部２５をガイ
ドバー２６上を紙面に直交する方向に移動させる
送りネジ２７、及びパンチ駆動部２８、ローラ駆
動部２９、送りネジ駆動部３０を具備して構成さ
れている。 The defect display sheet puncher 20 includes rollers 22 and 23 for driving the defect display sheet 21, a punch 24 for opening a window in the defect display sheet 21, a support section 25 for supporting the punch 24, and a guide bar 26 for supporting the support section 25. It is configured to include a feed screw 27 that moves the top in a direction perpendicular to the plane of the paper, a punch drive section 28, a roller drive section 29, and a feed screw drive section 30.
コントローラ１４は読み出された欠陥のアドレ
スに従つて、ローラ駆動部２９及び送りネジ駆動
部３０を作動させて、欠陥表示シート２１上の前
記欠陥のアドレスに対応する場所に、パンチ２４
を正確に位置せしめる。そしてパンチ駆動部２８
を作動させて、欠陥表示シート２１に窓を開口す
る。このようにして検出された欠陥のすべてに対
応する窓の開口を行う。 The controller 14 operates the roller drive unit 29 and the feed screw drive unit 30 in accordance with the address of the defect that has been read out, and punches 24 at the location corresponding to the address of the defect on the defect display sheet 21.
position accurately. And punch drive section 28
is activated to open a window in the defect display sheet 21. Windows are opened corresponding to all of the defects thus detected.
第２図の斜視図はこのようにして作成された欠
陥表示シート２１と対応するプリント基板を示す
図で、３１は開口された窓である。欠陥表示シー
ト２１及びプリント基板１にはそれぞれ位置合わ
せ用のガイドホール３２及び３３が設けられてい
る。そこでこのガイドホール３２，３３にガイド
ピン（図示せず）を挿通する等の方法で、プリン
ト基板１上に位置を正しく合わせて、欠陥表示シ
ート２１を重ねる。 The perspective view of FIG. 2 shows a printed circuit board corresponding to the defect display sheet 21 produced in this way, and 31 is an opened window. Guide holes 32 and 33 for alignment are provided in the defect display sheet 21 and the printed circuit board 1, respectively. Therefore, by inserting guide pins (not shown) into the guide holes 32 and 33, or the like, the defect display sheet 21 is placed on the printed circuit board 1 in the correct position.
すると第３図に示すように窓３１部にプリント
基板１のパターン２の欠陥３４が表出する。図で
は窓３１及び欠陥３４をそれぞれ１個のみ示した
が、欠陥が２個以上存在する場合でも欠陥のそれ
ぞれに窓が対応して開口されるので、欠陥表示シ
ート２１をかぶせたまゝすべての欠陥を識別でき
る。しかも欠陥は上述のように窓３１部に表出し
ているので、欠陥表示シート２１をかぶせたまゝ
補修を施こすことができる。 Then, as shown in FIG. 3, the defect 34 of the pattern 2 of the printed circuit board 1 is exposed at the window 31. In the figure, only one window 31 and one defect 34 are shown, but even if there are two or more defects, a window is opened corresponding to each defect, so all defects can be viewed with the defect display sheet 21 covered. can be identified. Furthermore, since the defect is exposed on the window 31 as described above, the defect can be repaired while the defect display sheet 21 is covered.
以上説明したごとく本発明によりプリント基板
の表面に形成されたパターンの欠陥を欠陥表示シ
ートをかぶせたまゝ識別し補修することが可能と
なり、パターンの補習作業が容易且つ確実とな
り、プリント基板の信頼度が向上する。 As explained above, the present invention makes it possible to identify and repair defects in patterns formed on the surface of a printed circuit board while covering the defect display sheet, making pattern repair work easy and reliable, and improving the reliability of printed circuit boards. will improve.
第１図は本発明の一実施例を示すシステム構成
図、第２図、第３図は上記一実施例により作成さ
れた欠陥表示シートを示す斜視図、及び上面図で
ある。
図において、１はプリント基板、２はパター
ン、１３はアドレスメモリ、１４はコントロー
ラ、２０は欠陥表示シートパンチヤ、２１は欠陥
表示シート、３１は窓、３４は欠陥、Ａは欠陥検
出手段を示す。
FIG. 1 is a system configuration diagram showing one embodiment of the present invention, and FIGS. 2 and 3 are a perspective view and a top view showing a defect display sheet created according to the above embodiment. In the figure, 1 is a printed circuit board, 2 is a pattern, 13 is an address memory, 14 is a controller, 20 is a defect display sheet puncher, 21 is a defect display sheet, 31 is a window, 34 is a defect, and A is a defect detection means. .
Claims (1)
陥位置を該プリント基板の上に欠陥位置表示シー
トをかぶせて前記パターンの欠陥位置を表示する
方法であつて、 検査対象パターンの欠陥を認識しその位置アド
レスを検知する欠陥検出手段と、検出された欠陥
位置アドレスを格納するアドレスメモリとを具備
し、該アドレスメモリに格納された欠陥位置アド
レスを読み出して、前記欠陥位置表示シートの前
記欠陥位置アドレスの位置に打抜き窓を開口する
ことを特徴とする欠陥位置表示方法。[Scope of Claims] 1. A method for displaying the defect position of a pattern formed on the surface of a printed circuit board by placing a defect position display sheet over the printed circuit board, the method comprising: detecting a defect in a pattern to be inspected; and an address memory for storing the detected defect position address, reads out the defect position address stored in the address memory, and reads out the defect position address stored in the address memory, A method for indicating a defect position, characterized in that a punching window is opened at the position of the defect position address.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56155340A JPS5855710A (en) | 1981-09-28 | 1981-09-28 | Displaying method for defect position |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56155340A JPS5855710A (en) | 1981-09-28 | 1981-09-28 | Displaying method for defect position |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5855710A JPS5855710A (en) | 1983-04-02 |
| JPH0129255B2 true JPH0129255B2 (en) | 1989-06-08 |
Family
ID=15603746
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56155340A Granted JPS5855710A (en) | 1981-09-28 | 1981-09-28 | Displaying method for defect position |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5855710A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6273577U (en) * | 1985-10-24 | 1987-05-11 | ||
| CN108549147B (en) * | 2018-04-18 | 2020-11-24 | 义乌市倩飞科技有限公司 | All-round portable amplifier for circuit board |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5371563A (en) * | 1976-12-08 | 1978-06-26 | Hitachi Ltd | Automatic inspection correcting method for mask |
| JPS6047583B2 (en) * | 1977-06-08 | 1985-10-22 | 富士通株式会社 | How to correct defect patterns |
-
1981
- 1981-09-28 JP JP56155340A patent/JPS5855710A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5855710A (en) | 1983-04-02 |
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