JPH01293079A - Amplified solid-state imaging device - Google Patents

Abstract

PURPOSE:To miniaturize the resetting means of a photodiode so as to improve the accuracy of the amplification factor of the title device by dividing the photodiode and deciding the amplification factor by the ratio of the junction capacitance to a capacitor. CONSTITUTION:The connecting point of the photodiode resetting means T20 controlled by the and scanning pulses G2 and a series circuit composed of more than one photodiodes D1-D4 connected in series is connected to the gate electrode of a capacitor setting means T10 controlled by the 1st scanning pulses G1 and the capacitor setting means T10 is connected to a capacitor resetting means T30 controlled by a capacitor (c) and the 2nd scanning pulses G2. Therefore, the photodiode resetting means can be miniaturized and the accuracy of the amplification factor can be improved.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to the configuration of an amplified solid-state imaging device.

[Summary of the invention]

The present invention provides an amplification type solid-state imaging device in which: 1) a capacitor is charged with the terminal voltage of a photodiode by a capacitor setting means; and 2) the charge charged in the capacitor is taken out as an output charge by a capacitor reset means. , 3) The output charge is less affected by variations in the amplification factor of the 11PET for amplification, and 4) Fixed pattern noise of the amplification solid-state imaging device is reduced.

[Conventional technology]

The configuration of the conventional amplified solid-state 38 image device is described in the Technical Report of the Television Society, published on Thursday, February 25, 1986 ED'
An example is shown in FIG. 1 of 88-61'-FPN analysis of amplified solid-state imaging device AMI. (F
PN is an abbreviation for fixed pattern noise, hereinafter abbreviated as FPN. ) In the above literature, the following four items are cited as causes of IFPN.

1) IFF for amplification! Variation in T threshold voltage Vt 2)
Variations in the amplification factor of 1m of the amplification lFET 3) Variations in the aperture ratio and parasitic capacitance of the photodiodes 4) Variations in the dark current of the photodiodes In the above literature, the cause of FPN deterioration is particularly the above [1] for amplification. "Variation of threshold voltage Vt of FF1T" and "3
) variations in the aperture ratio and parasitic capacitance of the photodiode.

[Problem to be solved by the invention]

However, the above-mentioned conventional technology has a problem in that it does not provide a means for suppressing FPN by the internal structure of the element.

The present invention is intended to solve these problems, and its purpose is to create an amplification type solid-state in which the FPH does not deteriorate due to variations in the threshold voltage of the amplification IPET or variations in the parasitic capacitance of the photodiode. The company provides an imaging device.

[Means to solve the problem]

(1) α) The amplified solid-state imaging device of the present invention includes b) a photodiode reset means T20 controlled by the second scanning pulse G2 and one or more photodiodes D;
C) A connection point between the photodiode series circuits D1 to D4 and the photodiode reset means T20 is a capacitor setting means T controlled by the first scanning pulse G1.
d) The capacitor setting means T10 is connected to the capacitor reset means T30 controlled by the capacitor C and the second scanning pulse G2.

(2) In addition to the means recited in claim 1, the amplified solid-state imaging device of the present invention provides that the capacitor 0 is constructed of the same material and manufacturing process as the photodiodes D1 to D4. Features.

(3) In addition to the means recited in claim 1, the amplifying solid-state imaging device of the present invention includes means for compensating the threshold voltage (T) of the photodiode resetting means T20 and the capacitor setting means T10. It is characterized by having.

(4) The amplification type solid-state imaging device of the present invention is characterized in that the photosensitive area of the pixel is divided into a plurality of parts, and the divided photosensitive elements are connected in series.

[Effect]

According to the above configuration of the present invention, the output signal charge qO according to the signal charge qi accumulated in the photodiode is expressed as q o = q i x ττ. Os is the junction capacitance of the photodiode, and an additional capacitance may be provided separately.

〔Example〕

FIG. 1 is a circuit diagram of an amplified solid-state imaging device according to an embodiment of the present invention, and FIG. 2 is a time chart showing its driving waveform.

01 to G6 are scanning pulses, which are applied in time series as shown in FIG. Moreover, scanning pulses 01 to G6 are the second
As shown by the broken line in the figure, the waveform may be obtained by applying the master output and slave output of the master-slave type shift register as they are, but in that case, the photodiode reset means T20 and the capacitor reset means '1'
30 must be supplied with the scanning pulse applied to the capacitor setting means T10 of the two pixels on the right in FIG. The scanning pulses 01 to G6 activate the photodiode resetting means T20, the capacitor setting means T10, and the capacitor resetting means T30 in Lebel.

N-channel double gate type MO'S) transistor 'I' 20.7 photodiodes D1 to D4. N channel double gate type MOS) run raster T10. which is a capacitor setting means. Capacitor 0. N-channel MO as capacitor reset means
3) The transistor T30 is a component corresponding to claim 1, and is a means for compensating the threshold voltage VT.
Channel MO8) transistor 'r3. T4. T5 is a component corresponding to claim 3, and the pixel 1 is composed of the above components.

N-channel MoS transistor 'r5. 'r20゜T1
The drain electrodes of pixels 0 and 1 are connected in common to form a terminal 6, the terminals 6 of each pixel 1 are commonly connected to form a terminal 2, and the power supply VDD is connected.
Connect to. A scanning pulse is applied to terminal 7 of pixel 1, and a scanning pulse of an adjacent pixel is applied to terminal 8.

The source electrode of the N-channel MOS transistor T'5 is used as a terminal 11, and the terminals 11 of each pixel 1 are commonly connected and connected as a terminal 5 to the power supply VBH. Photodiode D
The anode electrodes of the pixels 1 and one end of the capacitor O are commonly connected as a terminal 10, and the terminals 10 of each pixel 1 are commonly connected as the terminal 4 and grounded. The source IE[j of the N-channel MOS transistor TE3Ω is used as a terminal 9, and the terminals 9 of each pixel 1 are commonly connected to form a terminal 5, which is connected to the inverting input terminal of the amplifier AMP, which is virtually grounded. An integrator is constituted by the amplifier AMP, the capacitor C1, and the switch S. When the signal R8T shown in FIG. 2 is 1, the switch S is turned on and the integrator is reset. If the time when scanning pulses 01 to G6 become level is 1=0, then the relationship between video output voltage V and video output current V at T=t (T is smaller than the cycle of reset signal R5T) is as follows: T V From =--I ng Vat, the hail waveform is as shown in FIG. However, V is the video output current output from the terminal 5.

The pixels 1 can be arranged in a line or in an area, and if they are arranged in an area, it is necessary to provide a two-dimensional scanning circuit and pixel selection means. An N-channel double gate MoS transistor 20 serving as a photodiode reset means has two functions: a switch means and a source follower buffer amplifier. The switch means has a function to recharge the photodiodes D1 to D4, and the buffer amplifier has a function to determine the voltage for recharging. The N-channel double gate type MOS transistor T10, which is a capacitor setting means, has two functions: a switch means and a source follower buffer amplifier. The switch means is a function for recharging the capacitor C, and the buffer amplifier is a function for recharging the capacitor C.
The function is to control the voltage that recharges the capacitor C according to the terminal voltage of the capacitor C.

Next, the operation of pixel 1 will be explained.

1) In the initial state, the series circuit of photodiodes D1 to D4 is charged in the reverse direction to VDT=VBB+Vt. However, VBB is the power supply voltage, vt is the threshold voltage of the N-type MO8) transistor, and VDt
is the terminal voltage of the series circuit of photodiodes D1 to D4.

2) Next, photodiodes D1~. A current proportional to the amount of light irradiated onto D4 flows inside the photodiodes D1 to D4, and the reverse voltage of the photodiodes D1 to D4 is Δv.
Since the voltage is reduced by O, VDT=VBB-IVt-ΔvO.

3) Then, when the capacitor setting means T10 is activated by a scanning pulse, the terminal voltage of capacitor 0 is recharged to V(+=VBB-ΔVO, where Va is the terminal voltage of capacitor 0.

4) Next, the capacitor setting means T10 is set by the scanning pulse.
is made inactive and the capacitor reset means T30 is made active. The electric charge charged in the capacitor O is transferred to the terminal 5 via the capacitor reset means T30 to the video output current terminal V.
flows as

5) In parallel with the operation in 4) above, the photodiode reset means T20 is activated by a scanning pulse to recharge the series circuit of photodiodes D1 to D4 in the reverse direction to VDT='VBB+4t. The amount of charge qi recharged at this time is proportional to the amount of light irradiated to the photodiode and the exposure time.

From the above, the relationship between the output signal charge qQ, which is the integral value of the video output current factor V, and the recharge charge qi of the photodiode is qo=g=xnx-Os, and an amplification operation is performed. Day 0 is the sum of the junction capacitances of the photodiodes D1 to D4 for one pixel, and if an additional capacitance is provided, the value thereof is also included. Also, n is the number of photodiodes connected in series, and in Figure 1, n=
It is 4.

FIG. 6 is a circuit diagram showing an embodiment of pixel 1 of the amplified solid-state imaging device of the present invention, FIG. 4 is a circuit diagram showing an equivalent circuit of photodiode D, and FIG. 5 is a circuit diagram showing an equivalent circuit of photodiode D1. FIG. 6 is a circuit diagram showing an equivalent circuit of the series circuit of D4 to D4, and FIG. 6 is a characteristic diagram for explaining the threshold voltage VT of the MOS transistor.

Generally, the area of a photodiode in one pixel of a solid-state imaging device is finite, and takes a value of, for example, 100 μm square or 25 μm square. The effect of dividing this finite area photodiode into n pieces and connecting them in series will be explained using FIG. 4.5. (Corresponding to Claim 4) The area of the photodiode covers the photosensitive area, and the photodiode is included in the photosensitive element.
2...) is the photocurrent of the photodiode, which is proportional to the amount of light irradiated to the photodiode. ) ndensa Os, 0sn (Os1.Os2...
) is the junction capacitance of the photodiode, etc.
A separate capacitor may also be added.

Va is the anode electrode and VC is the cathode electrode.Next,
Photocurrent i8 and photocurrent jan(4θ1.
js2......) is
= n X i s n. Junction capacitance O
Junction capacity 1i0sn (Oal, 0
The relationship with s2=) is 08,000 nX08n. The relationship between the capacitance CD between the terminals Vc and Va and the capacitance ODn when divided into n is as follows: ・', OD:n'' ODn. Therefore, the on-resistance of the photodiode reset means is n2 times larger. Since the photodiode can be recharged with the same time constant, the photodiode reset means can be made smaller.

When the photodiode is irradiated with light, a photocurrent flows through the photodiode, so that the electric charge accumulated in the junction capacitance is discharged, and the voltage at the terminal 1 of the photodiode is reduced. The relationship between the voltage reduction amount ΔVD of the terminal voltage VD and the voltage reduction amount ΔVDn of the terminal voltage VDn when divided by n is 1°, ΔVD=ΔVDn. The voltage reduction amount ΔVDT of the terminal voltage VDT of the photodiode series circuit when divided into n is Δ'VDT=n
X ΔVDn. From the above, by dividing the photodiode into n parts, the photodiode reset means can be made smaller, and the amount of change in the terminal voltage of the photodiode series circuit is increased by n times.

In FIG. 3, a photodiode reset means is constituted by an N-channel MOS transistor T2 and a switch S2 controlled by a scanning pulse;
O'S) The transistor T1 and the switch S1 controlled by the scan pulse constitute a capacitor setting means, the switch S3 controlled by the scan pulse is a capacitor reset means, and R4 is a load resistor.

Figure 6 shows the gate-source voltage VG of a MOS transistor.
It shows S vs. drain current, and the parameter is the drain-source voltage V DS. When the gate-source voltage VGS is lower than the threshold voltage VT, no drain current flows.

In FIG. 3, N-channel MOS) transistor T5
, a small current is applied to T4. However, VBB<VDD. The N-channel MOS) transistor T5 is a means for passing a minute current, and may be a resistor or a constant current source. As is clear from FIG. 6, when vDS=vGS and a small amount of drain current is allowed to flow, VDS-=VT. Therefore, the gate electrode of N-channel MOS transistor 2 has VG
A voltage of 2=VBB+2XVT is applied. VO2 is the gate voltage of the N-channel MOS transistor TE2. As mentioned above, N
The threshold voltages VT of the N-channel MOS transistors TI, T2 are compensated by the channel MOS transistors T3, T4, T5, and these methods are the means recited in claim 3.

Next, the pixel signal accumulation/reading operation will be explained using FIG.

1) When switch C2 is activated, photodiode D
The terminal voltage VDT of the series circuit of 1 to D4 is VDT=VBB
Recharged to 4-VT. N channel MOS) transistor T2
Since the gate voltage VG2=VBB+2XVT, N
Channel MOS) is recharged until the gate-source voltage of transistor T2 decreases to VG5=VT. This is because, as is clear from FIG. 6, the drain current o becomes 0 at the threshold voltage 'VT.

2) Next, switch S2 is inactive and this time is 1=0.
shall be. Then, VDT=VBB+VT (t=o).

5) Next, switch S1 is activated. This time is t
= Ti, where Ti is the charge accumulation time.

The terminal voltage VDT of the series circuit of photodiodes D1 to D4 during this time is as follows. The terminal voltage VO of capacitor C is recharged to. This is because the gate-source voltage vas of the N-channel MOS transistor T1 is recharged until it decreases to VT, and the drain current n=Q at the threshold voltage VT in FIG.

4) Next, switch S1 is deactivated.

5) Next, activate switch S3. The charge qO stored in the capacitor 0 flows through the load resistor aL as a video output current V through the switch S3.

The output signal charge qO is as follows. Signal charge 9 obtained by photodiode
(Ii=, l″ 1θdt, so the output signal charge 9o is q o ” OXVB B−−9−q i = II
vdt), . .

] He will also come. As is clear from this formula, q i
: An output charge of qo=OXVBB is obtained at d, and the output charge decreases as the exposure amount of the photodiode increases. In the above equation, the signal charge qi
Focusing only on the absolute value of the change in the output signal charge qo, we get: - qo - Osxq.

Next, the photodiode junction capacitance o8 and the capacitor O
The amplification factor is determined by the ratio of

6) Then deactivate switch S5. 1) Activate the return switch S2.

As described above, in the amplified solid-state imaging device of the present invention,
.

1) Since the photodiode is divided into n parts, n times the output signal charge is obtained, and the photodiode reset means is divided into n parts.
It's twice as small and good.

2) Not affected by variations in the amplification factor of 9m of the amplification FET.

5) Since the amplification factor is determined by the ratio of the junction capacitance Os of the photodiode to the capacitor O, the accuracy of the amplification factor is high. (Effects corresponding to the above patent claim 1) 4) Not affected by variations in the threshold voltage Vt of the amplifying IFK'l''. (Effects corresponding to the above patent claim 5) Figure 7 shows the present invention. 5 is a circuit diagram showing another embodiment of the invention. D is a photodiode, the switch S1 in the embodiment of FIG. T1
is constructed with a small element size. switch s
3. N-channel MO when active 8) Select an element size that allows the source current of transistor T1 to be sufficiently ignored. The feature is that the total element size of the pixels can be made small.

FIG. 8 shows another embodiment of the present invention, and is a circuit diagram of a pixel of an amplified solid-state imaging device corresponding to claim 2 of the present invention. As a substitute for the capacitor 0 in FIG. 3, a photodiode DC is used after being subjected to light shielding treatment. When an additional capacitance is provided in the photodiode, the additional capacitance is also provided in the photodiode DC in accordance with the ratio of the additional capacitance to the junction capacitance. By using the technical means corresponding to the second patent claim, parasitic capacitance of photodiodes (such as variations in film thickness) can be reduced.
This has the effect of preventing variations in the output signal charge due to variations in the capacitor O (such as variations in thickness), and variations in their ratio. 9 shows another embodiment of the present invention, and is a circuit diagram of a pixel of an amplification type solid-state imaging device corresponding to claim 6. R is a resistor, and T6 is an N-channel MOS transistor. The outline of the operation and effect is the same as the explanation of FIG. 3, and the feature is that the number of elements is smaller than the example of FIG.

〔Effect of the invention〕

As described above, the present invention has the following effects.

1) Since the photodiode is divided into n parts, n times more output signal charges can be obtained, and the photodiode glue pot setting means can be made n2 times smaller. (Patent claim No. 1.4
2) Not affected by variations in the amplification factor gm of the amplification FET.

3) Since the amplification factor is determined by the ratio of the junction capacitance tos of the photodiode to the capacitor 0, the amplification factor is highly accurate. (Effect corresponding to Patent Claim 1 above) 4) By using a light-shielded photodiode instead of the capacitor O, variations in the capacitance ratio of the photodiode and capacitor (because they are not made of the same material, variations between them due to manufacturing) can be reduced. ) does not change the amplification factor. (Effects corresponding to the second patent claim) 5) Not affected by variations in the threshold voltage Vt of the amplifying PET. (Effects Corresponding to Patent Claim 3) The present invention is particularly effective in a contact type image sensor having an optical ratio of equal magnification. This is because an amplifying solid-state imaging device of the same size as the original is required, so a large semiconductor device must be formed. For example, the short side of an A4 size document is approximately 216rrrIR, and it is not easy to reduce variations in the parameters of the components of such a large semiconductor device.
It is useful to process signals by complementarity within each pixel.

Furthermore, development of thin film semiconductor devices has been active recently. The reliability of thin film semiconductor devices is inferior to that of single crystal semiconductor devices. Therefore, performing the amplification operation only when a pixel is selected as in the present invention is effective in constructing a highly reliable device.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the amplification type solid-state imaging device of the present invention. Figure 2 is the time chart of Figure 1. FIG. 3 is a circuit diagram showing one embodiment of a pixel. 4 and 5 are circuit diagrams showing photodiode circuits. FIG. 6 is a characteristic diagram showing the threshold voltage VT. FIG. 7 is a circuit diagram showing another embodiment of the pixel. FIG. 8 is a circuit diagram showing another embodiment of the pixel. FIG. 9 is a circuit diagram showing another embodiment of the pixel. 01-G6...Scanning Hals 1...Pixel T0n...Photodiode reset means D1-D4...Photodiode T10
...Capacitor reset means O...
Capacitor T30...Capacitor setting means Fig. 7

Claims (4)

[Claims] (1) α) In an amplified solid-state imaging device having one or more pixels 1 controlled by time-series scanning pulses G1 to G6, b) photodiode reset means T20 controlled by a second scanning pulse G2; a series circuit in which one or more photodiodes D1 to D4 are connected in series; c) a connection point between the photodiode series circuit D1 to D4 and the photodiode reset means T20 is a capacitor controlled by the first scanning pulse G1; Setting means T
d) The capacitor setting means T10 is connected to a capacitor reset means T30 controlled by a capacitor C and a second scanning pulse G2. (2) The capacitor C is connected to the photodiodes D1 to D.
4. The amplified solid-state imaging device according to claim 1, wherein the amplification type solid-state imaging device is constructed using the same materials and manufacturing process as those of the fourth embodiment. (3) The amplification type solid-state imaging device according to claim 1, further comprising means for compensating the threshold voltage V_T of the photodiode reset means T20 and the capacitor set means T10. (4) An amplification type solid-state imaging device having an amplification means for each pixel, characterized in that the photosensitive area of the pixel is divided into a plurality of parts, and the divided photosensitive elements are connected in series.