JPH0129408B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a method for automatically setting the operating point of a sensor such as a train detector using a loop coil.
In particular, the present invention relates to a constant setting method in a sensor using a corrector that automatically corrects the operating point according to changes in the environment when there is no detection signal, and prohibits the automatic correction based on the detection signal when there is a detection signal.

In a sensor, when extracting a physical change (change in physical quantity) of the object to be detected as a change in electrical signal, such as a change in frequency, voltage, phase, etc., here it is easy to think of a change in voltage. The setting (voltage) value (operating point) changes (hereinafter referred to as drift) as the environment in which it is used changes, and this drift may be larger than the change in the signal at the time of detection. In addition, in general, drift occurs slowly in sensors, whereas signal changes are faster than drift, so using this difference on the time axis, we can calculate the gradual change in the operating point. Constant value control is performed to automatically return to the initial operating point, and rapid changes in the operating point are output as detection output from a level detector, etc.

FIG. 1 is an explanatory diagram of the above-mentioned correction operation. In the figure, 1 is the input terminal of the transducer output (physical quantity → electrical signal conversion output) e in the sensor, 2 is the level tester, and 3 is the delay timer,
4 is a corrector, 5 is a detection signal output terminal, and 6 is a reference value e _s with respect to the sensor setting voltage value (operating point voltage) e ₀ .
7 is a comparator that compares _{the operating point voltage e 0 with} the reference value e _s ; The set voltage value (operating point voltage) e ₀ is given as the difference output between the input signal e and the output ε of the constant setting section generated as a result of constant setting. Operating point voltage e ₀ to level tester 2
changes from the reference value e _s by Δe ₀ , and if this change Δe ₀ continues for longer than the delay time T in timer 3, then
After time T, the corrector 4 starts operating. The corrector slowly corrects the electrical constant of the constant setting section, generates a correction value e′ in the output, and at the same time changes the operating point voltage e ₀ to −Δe ₀
(If the change in Δe ₀ is sufficiently slower than the correction delays T and τ by timer 3 and corrector 4, the operating point voltage e ₀ will be returned to the original operating point voltage e ₀ = e _s . causes virtually no change). On the other hand,
If the change in Δe ₀ is faster than the correction delays T and τ made by timer 3 and corrector 4, the correction will not be made in time, and the operating point voltage e ₀ will change Δe′, Δe′<Δe ₀ , and this change When Δe' exceeds the level test value (threshold level) in the level tester 2, the level tester 2 outputs a detection signal.

In Figure 1, the operating point voltage e ₀ as a sensor is e ₀ =
As e−ε, that is, the output ε of the constant setting section corresponds to the value e of an arbitrary input signal, and the reference value e ₀ = e _s
This is a configuration that performs constant value control operation that holds the value with a delay. Therefore, in the device shown in FIG. 1, even if the change Δe ₀ in the operating point voltage is fast, the change Δe ₀ will be corrected and the initial set voltage value, that is, the operating point voltage e ₀ = e _s
It goes back to . For this reason, the configuration is such that the correction operation is prohibited when an output from the level tester is generated in response to a rapid change in the operating point voltage, that is, when a detection output from the sensor is generated. On the other hand, if the correction operation is prohibited using the detection output, a voltage value in the correction prohibited area will be given to the operating point voltage e ₀ that changes at a specific time (with a large change). Input signal e at the start of operation
_It is necessary to set the initial _constants that produce the operating point voltage e ₀ (= e _s ) for , the output ε of the constant setting section for the input signal e is not determined, and this e
-ε changes rapidly).

In addition, if the output of the constant setting section, that is, the correction value e′ for slow fluctuations in the operating point voltage, is generated only during correction, it is not possible to continuously maintain the correct operating point voltage e ₀ = e _s . It is essentially necessary to update and store the difference from the initial setting point in the storage means of the constant setting section as the correct setting constant at that time. At the same time, there is a power outage in the device, and if we consider that the operating point voltage e ₀ will be restored after the power is restored, if the constant setting section stores this correction value e′ and the initial setting value e _i during the power outage, then the above-mentioned There is no need to perform resetting equivalent to initial settings.

However, in conventional sensors of this kind, the amount of correction is stored in a volatile memory such as a counter circuit in the constant setting section, so if the power is cut off due to a power outage, the stored amount of correction will be lost and the amount of correction will be lost when the power is restored. Unable to set points correctly. That is, in the device shown in Fig. 1, the operating point voltage when no detection signal is output is the input signal e minus the sum of the initial setting value e _i in the constant setting section and the correction amount e' for drift. However, even if the initial setting value of the constant setting section is fixed regardless of power outage, if the correction amount e' disappears due to a power outage, the correction amount e' becomes zero and the operating point voltage _e0 at the start of operation. is only regenerated and cannot be set to the operating point voltage immediately before power outage.

In order to eliminate these drawbacks, non-volatile storage means may be used, but this would complicate the device and make it expensive.

In the present invention, even if the constant setting section uses volatile memory, the operating point voltage can be set to the correct value e ₀ after power is restored.
The purpose is to provide a constant setting method that can be set to = e _s .

According to the present invention, the above object is achieved by suspending prohibition of correction of the operating point in the corrector for a certain period of time when the sensor starts operating or when the power is restored after a power cut.

In this way, even if the operating point returns to the initial setting value when the power is restored, the corrector operates and corrects the operating point to the correct value, and as a result, the correction using the volatile storage means can be performed. The operating point is automatically corrected to the correct value when the power is restored.

The present invention will be described below based on embodiments shown in the drawings.

In FIG. 2, 11 is an input terminal for an electric signal given as a DC voltage, 12 is a window comparator, 13 is a corrector including a constant setting section, 14 is a switch for inhibiting and interrupting correction, and 15 is a DC power source for logic circuits. The positive side terminal, 16 is an output terminal, 17 is a voltage dividing resistor that divides the input voltage with the resistors 30 ₁ to 30 _o of the constant setting section, 22 and 23 are timers, and 20 and 21 are comparators that constitute a level tester. be.

The window comparator 12 has a window of e ₀ ±e _w determined by upper and lower threshold levels, and oscillates only when the input signal level is within the window, and outputs no signal when it is outside the window. Become. Such a window comparator 12 was developed in U.S. Pat.
Since it is disclosed in Japanese Patent No. 4764 and the like and is well known, a detailed explanation thereof will be omitted.

The corrector 13 has two sets of AND circuits 24, 25 and clock signal oscillators 26, 27, and also includes a reversible counter 28 as a constant setting section, a switch circuit 29, and a plurality of voltage dividing resistors 30 with different resistance values. ₁ , 30 ₂ , 30 ₃ ...30 _o .

The input signal to the window comparator 12 is input to the level testers 20 and 21, which have a reference voltage e _s and constitute a comparator, and the level tester 20 detects that the level of the input signal is +e ₁ from the reference voltage e _s.
During the above period, an operation command signal is output to the next-stage timer 22, and the level tester 21 outputs an operation command signal to the next-stage timer 23 while the level of the input signal is less than _-e2 from the reference voltage _es .

When the operation command signal is input to each timer 22, 23, the timer 22 starts after T ₁ has elapsed.
After T ₂ has elapsed, the AND circuits 24 and 25 each receive a signal of logical value "H" until the operation command signal disappears.

Each AND circuit 24, 25 includes a timer 22, 2.
In addition to the output signals of 3, clock signals from the oscillators 26 and 27 are input, as well as the output signal of the window comparator 12, and the input signals from the window comparator 12 and timers 22 and 23 have a logic value of "H". oscillator 2
The clock signals from 6 and 27 are transferred to the reversible counter 28.
Output to. The input terminal from the window comparator 12 of the AND circuits 24 and 25 is the switch 14.
It is also connected to the positive side terminal 15 of the DC power supply for logic circuits via. The switch 14 is normally open.

The reversible counter 28 counts up when the clock signal is input from the AND circuit 24, and counts down when the clock signal is input from the AND circuit 25. The count value of this reversible counter 28 is determined by the switch circuit 29.
It is used as a signal to select one or more of the resistors 30 ₁ , 30 ₂ . . . 30 _o .

In this device, the initial setting voltage of the operating point e ₀
is determined (fixed) by the voltage division ratio of the resistor 17 and the resistors 30 ₁ , 30 _{2 ,} . Point voltage e ₀
is set to a level within the window of the window comparator 12 as an initial setting voltage. Therefore, the window comparator 12 constantly oscillates and outputs a high level logic value "H", and the operating point voltage e ₀
When the level of the input signal changes and the level of the input signal goes outside the window, a detection signal with a zero level logic value "L" is output.

While the window comparator 12 is outputting a detection signal of logical value "L", the AND circuit 24,
Since the counter 25 is closed, the clock signals from the oscillators 26 and 27 are prohibited from being input to the counter 28, and correction is prohibited.

When the operating point voltage e ₀ changes while the window comparator 12 is outputting a signal with a logical value “H” and the amount of change exceeds +e ₁ , e ₁ < e _w , the level tester 20 issues an operation command. When a signal is output and the change continues for more than time T ₁ , timer 2 is activated after time T ₁ has elapsed.
4 outputs a signal with a logical value of "H", the AND circuit 24 is opened, and the clock signal is input to the counter 28, which causes the counter 28 to count up, and the switch circuit 29 causes the resistor 3 to be incremented.
0 ₁ , 30 ₂ . . . 30 _o are sequentially selected, and as a result, the operating point voltage is corrected in stages. This correction is performed until the operating point voltage becomes e ₀ ≒ (e ₀ + e ₁ ) − e ₁ (1), and when the operating point is corrected to a value that satisfies equation 1, the level tester 20 The operation command signal is no longer output, and the correction operation ends.

The operating point is −e ₂ (e ₂ <e _w ) when the window comparator 12 is outputting a signal with a logical value of “H”.
When the change exceeds the above level, the level tester 21 outputs an operation command signal to the timer 23, and the change occurs for a time T ₂
If the above continues, the timer 23 outputs a signal with a logical value of "H" after time _T2 , so the AND circuit 25
is opened and a clock signal is input to the counter 28, which causes the counter 28 to count down and the switch circuit 29 to output the resistors 30 ₁ , 30 ₂ . . .
30 _° is chosen contrary to the above, so that the operating point is corrected step by step. This correction is performed until the operating point voltage becomes e ₀ ≒ (e ₀ − _{e 2} ) + e ₂ (2). When the operating point voltage reaches a value that satisfies the equation 2, the level tester 21 issues an operating command. No signal is output, and the correction operation ends.

While the window comparator 12 is outputting a signal with a logic value of “H”, the operating point is the timer 22,
23 and the response speed of the corrector 13 within a time shorter than (T ₁ +τ ₁ ) or (T ₂ +τ ₂ ), the window comparator 12 outputs a low-level detection signal,
This closes AND circuits 24 and 25 and prohibits correction.

The speed selected by the switch circuit 29 is determined by the oscillator 2
The oscillation frequencies are determined by the oscillation frequencies of 6 and 27, and the oscillation frequencies are different from each other. From the viewpoint of reliability, it is preferable that the oscillators 26 and 27 be made independent from each other, rather than having a configuration in which one clock signal is frequency-divided to generate two types of clock signals. In other words, if the frequency division is incorrect and the clock signal is output at a high speed, the correction speed will become faster and there is a risk that even rapid changes in the operating point voltage will be corrected.If the oscillation itself is at a low frequency, there is no need to worry about this. do not have.

In the above-mentioned device, when the power is cut off due to a power outage or the like, the counted value of the counter 28, that is, the correction value disappears, and when the power is restored, the counter 28 is in a reset state, and as a result, the operating point is the same as the window of the window comparator 12. The window comparator 12 outputs a low-level detection signal, and correction is prohibited. At this time, the operating point voltage has changed from the reference value _es , and the level tester 20 or 21 outputs a correction operation command signal, but the AND circuits 24 and 25 are closed and correction is prohibited. When the power is restored, the switch 14 is closed for a certain period of time to interrupt prohibition of correction for a certain period of time. In this way, the AND circuit 24 or 25 is opened and the clock signal is input to the counter 28 to perform correction, and when the operating point voltage satisfies equation 1 or 2, the correction ends and the operating point For details on the correct voltage value
It is set in the range e ₀ + e ₁ > e ₀ > e ₀ − e ₂ .

In addition, the signal to be detected (change in operating point voltage e ₀ )
If is positive or negative, a Schmitt circuit may be used instead of the window comparator 12.

Next, a switch 14 is activated to detect the restoration of the power supply and suspend the prohibition of correction in FIG. 2 for a certain period of time.
An embodiment of a control circuit for closing the circuit for a certain period of time will be described with reference to FIG.

In the figure, 40 is a resistor, 41 and 42 are capacitors, 43 is a diode, 44 is a logic circuit, and 4
5 is a relay, and switch 14 is an operating contact of relay 45. The logic circuit 44 is a logic circuit having asymmetric error characteristics, and rectifies the threshold logic operation oscillation circuit and its output to generate a positive or negative (+V or -
A fail-safe binary AND operation circuit is constructed using a rectifier circuit that outputs a signal of V).
Such logic circuits include a logic A circuit that oscillates and outputs a +V or -V signal when each input signal is +V, and a logic A circuit that oscillates and outputs a +V or -V signal when each input signal is -V.
There are logic B circuits that output a V or -V signal, and logic AB circuits that oscillate and output a +V or -V signal when one input signal is +V and the other is -V. Publication No. 45-29054, Special Publication
It is described in Publication No. 48-30777, Japanese Patent Publication No. 51-38211, Nippon Signal Technical Report (Vol. 2, No. 3, published in 1978), etc. In addition, this type of logic circuit can be created by arbitrarily combining a threshold oscillation circuit and a rectifier circuit.
Various logic circuits such as AND circuits, NAND circuits, and inverter circuits can be configured, and the output signal is given as a DC positive/negative pulse signal (+V, -V) and a fault signal of zero, and generally the output +V of the signal,
-V is used in correspondence with binary information "1" and "0".

As the logic circuit 44, any of a logic A circuit, a logic B circuit, and a logic AB circuit can be used, or a combination of these can be used, but in the illustrated example, a logic A circuit is used.

The positive side terminal of the diode 43 is connected to the positive side terminal 46 of the DC power supply for the logic circuit, thereby clamping the input side of the logic circuit 44 to the power supply voltage.

In this control circuit, when the power is turned on, the logic circuit 44 becomes ready to oscillate, and the capacitor 41
The voltage across the terminals rises with a delay of a time constant due to the resistor 40 and capacitor 41, and the positive side voltage of the capacitor 41 is input to the logic circuit 44 via the capacitor 42 in an alternating current manner. As a result, the logic circuit 44
oscillates for a time determined by the input resistance of the logic circuit itself and the time constant of the capacitor 42 to excite the relay 45, during which time the switch 14 in FIG. 2 closes and interrupts the prohibition of correction.

The control circuit in Figure 3 consists of 40 resistors and 4 capacitors.
2 and diode 43 are disconnected,
Alternatively, when the capacitor 41 is short-circuited, no input signal is input to the logic circuit 44, so the logic circuit 44 does not oscillate; when the capacitor 42 is short-circuited, the level of the input signal to the logic circuit 44 is low, so the logic circuit 44 does not oscillate. does not oscillate, thus resulting in an asymmetric error, so that if a circuit component fails, the relay 45 is not energized and the prohibition of correction is not interrupted. That is, the embodiment shown in FIG. 3 provides a power failure recovery signal generating circuit that will not erroneously release the prohibition of correction due to a circuit failure.

The above-mentioned embodiment is an example of a sensor that includes fixed value control, and is described in Japanese Patent Publication No. 19740/1974 filed by one of the present applicants. Although the sensor appears as follows, it can also be applied to a sensor using the detection head shown in FIG.

That is, the device shown in FIG. 4 uses the coil 51 as a transducer, and configures an oscillator 50 with the coil 51, capacitors 52 ₁ , 52 ₂ , ... 52 _o , and an amplifier 53. The change in the output signal is converted from frequency to DC voltage by the converter 54, and the output is inputted to the terminal 11 in FIG. 2. Furthermore, instead of switching the input signal by the switch circuit 29 in FIG. 52 ₁ ,52 ₂
...52 _o are sequentially selected to sequentially switch the output frequency of the oscillator 50.

As described above, the present invention suspends prohibition of correction of the operating point by the compensator for a certain period of time when the power is restored, so even if the operating point returns to the initial setting value when the power is restored, the compensator will not operate. The operating point can be corrected to the correct value, and therefore even if the corrector uses volatile storage means, the operating point can be automatically set to the correct value when the power is restored.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of an operating point correction method, FIG. 2 is a block diagram showing an example of an electric circuit of a device for carrying out the present invention, FIG. 3 is a diagram of an embodiment of a switch control circuit, and FIG. The figure is an embodiment of the signal generating circuit portion of the sensor. 11: Signal input terminal, 12: Window comparator, 13: Compensator, 14: Switch, 1
5: Positive side terminal of DC power supply for logic circuit.

Claims (1)

[Claims] 1. In a sensor that uses a corrector that automatically corrects the operating point according to changes in the environment when no detection signal is output, and prohibits the correction according to the detection signal when a detection signal is output, A method for automatically setting constants of a sensor, characterized in that prohibition of correction of the operating point by the corrector is suspended for a certain period of time upon recovery.