JPH01295170A - Waveform display device - Google Patents

Abstract

PURPOSE:To set a time a base substantially and optionally with relatively simple constitution by providing a means which drives display picture elements selectively according to grating-shaped scale data where the time base is optionally settable and displays a grating-shaped scale. CONSTITUTION:A waveform image generating circuit 3 which is controlled by a waveform display control circuit 4 reads measured waveform out of a waveform memory 2 in order and outputs a waveform image signal to an OR gate 8. A time base setter 10 which sets the time base of the grating-shaped scale optionally is connected to a microprocessor 5 which controls the whole device. The a scale image generating circuit 7 reads scale display data out of a dot refresh memory 6 in order and outputs an image signal for grating- shaped scale display to the OR gate 8, where a composite image is formed. Consequently, the waveform display device is obtained which enables the time base to be set substantially and optionally with the simple constitution.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a waveform display device, and more particularly to a scale display.

(Prior Art) One type of waveform display device is one configured to display a waveform by selectively driving a plurality of two-dimensionally arranged display pixels according to digitally sampled waveform display data. 6 For example, in the case of a CRT, an electron beam is sequentially scanned from the bottom left to the top right of the screen, and the CRT's fluorescent surface emits light only at the position where the waveform is displayed, resulting in a rask scan display. . Here, since the waveform is displayed by emitting light only when the fluorescent surface of the CRT is irradiated with an electron beam, the same waveform data is stored in a memory and displayed repeatedly, for example, 30 times per second.

By the way, in a waveform display device using such a CRT, scale lines are carved in a grid pattern on the surface of the CRT, and the time per grid is 1-2-5 steps (for example, i 1
sec/DIV, 211sec/DIV, 5 m5
ec/DTV, etc.).

However, repetition information such as the period of the measurement waveform and necessary time information do not necessarily match the time that can be set by switching.

Therefore, it is conceivable to provide a time axis side setting function for setting an arbitrary time axis so that the temporal change of the measured waveform matches the fixed grid-like scale.

(Problem to be solved by the invention) However, in order to be able to set the time axis arbitrarily, the sampling rate for digital sampling must be changed, but in order to obtain a stable and arbitrarily variable time base, it is necessary to change the sampling rate for digital sampling. In this case, the circuit becomes complicated and the cost 1- becomes high.

The present invention has focused on such a point, and an object thereof is to provide a waveform display device with a relatively simple configuration in which the time axis can be set substantially arbitrarily.

(Means for Solving the Problems) The waveform display device of the present invention is a waveform display device that displays a waveform by selectively driving a plurality of two-dimensionally arranged display pixels according to waveform display data. A scale display means is provided for displaying a grid-like scale by selectively driving the plurality of two-dimensionally arranged display pixels according to grid-like scale display data whose time axis can be arbitrarily adjusted. 6 (Example) Hereinafter, an example of the present invention will be described in detail using the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

In FIG. 1, 1 is an A/D converter which samples a measured waveform and converts it into a digital signal. This A/D
The digital signal output from the converter 1 is stored in a waveform memory 2. 3 is a waveform image generation circuit that sequentially reads out the waveform display data stored in the waveform memory 2 and generates an image #C signal for waveform display. 4 is a waveform display control circuit, and A/D converter 1. It controls the waveform memory 2 and the waveform image generation circuit 3. 5 is a microprocessor that controls the operation of the entire device. 6 is a dot refresh memory in which grid-like scale display data is stored. Reference numeral 7 denotes a scale image generation circuit that sequentially reads out the scale display data stored in the dot refresh memory 6 and generates an image signal for displaying grid-like scales. 8 is an OR gate that outputs the logical sum of the waveform image signal and the scale image signal, and 9 is a C R' that displays the composite image output from the OR gate 8.
It is r. 1o is a time axis setter for setting the time axis of the grid-like scale to an arbitrary value.

The operation of the device configured in this way will be explained.

Note that the waveform display system is the same as that of a known device, so a description thereof will be omitted.

It is assumed that the display resolution of CR'I' 9 is 501 dots x 401 dots, and a 10 x 8 grid scale is displayed as shown in FIG. That is, the pattern is 50 dots/lattice in both the horizontal and vertical directions. Here, the vertical direction is the raster scanning direction, and the horizontal direction is the raster arrangement direction. In order to display the scale as shown in FIG. 2, the microprocessor 5 writes scale data into the dot refresh memory 6.

The dot refresh memory 6 has a display space of 1250 dots x 512 dots, for example, as shown in FIG. Here, if the horizontal dot address is XH and the vertical dot address is yv, then the shaded XH=o~500. The microprocessor 5 writes scale data at a pitch of 50 dots/lattice over the entire display space of the dot refresh memory 6, either in the area of yv=θ˜400 or in the area used for normal display. That is, the horizontal dot addresses xH that store the vertical lines of the grid scale are 0, 50, .・, 450,
Vertical dot address y that becomes 500 and stores the horizontal line
v is 0.50. ....

It becomes 1200, 1250. The scale image generation circuit 7 reads out the scale data stored in the dot refresh memory 6 for each frame in synchronization with the waveform display operation and converts it into a scale image signal. When the scale image generation circuit 7 reads out the scale data stored in the dot refresh memory 6, it sets 0 as the horizontal dot address xH.
,1,2. By specifying addresses of consecutive integer values such as . . . , a grid-like scale pattern as shown in FIG. 2 can be displayed. When changing the horizontal pitch of such a grid-like scale pattern, that is, the pitch of the time axis, the horizontal dot address X HO, 50, .
.

It is only necessary to increase or decrease the horizontal dot address xH during reading without removing 450 and 500. Here, in order to shorten the time axis, addresses may be thinned out, and in order to expand the time axis, addresses may be interpolated. For example, set the horizontal dot address xH to 0.1, 2, . ..., 48, 50,
51. ..., 98,100,101. ..., 500
, 501, the pitch can be reduced to 49150.

The scale image generating circuit 7 is provided with an address counter that programmatically generates horizontal dot addresses xH for such reading. Letting the pitch reduction rate be RP, Rp = 1.49150.48150°...,
It can be set as 20150. In addition, the time axis is 1.2゜5
Since it is a step, up to 20150 is sufficient. In this case, the microprocessor 5 sends Rp to the scale image generation circuit 7.
Set the value of r so that = r150.

An operator inputs arbitrary time axis information into the microprocessor 5 by operating a time axis setting device 10 such as a rotary encoder. The microprocessor 5 sets the value of r for the scale image generation circuit 7 based on the time axis information. The scale image generation circuit 7 generates a horizontal dot address XH with Rp=r150, reads out the contents of the dot refresh memory 6, and displays a grid pattern on the CRT 9.

FIG. 4 is a diagram illustrating a display example of a lattice-like scale pattern with the time axis reduced in this manner. For example, RP = 401
50 and 21sec/DIV, 2 x 40150
= 1.6, and can be reduced to 1.611 sec/DIV.

With this configuration, since digital processing is possible, the time axis can be set to any value with high precision6.Also, since the scale display system is independent from the waveform display system, there is no possibility of adverse effects on the measurement waveform system. There isn't.

Furthermore, by reducing the time axis, the number of gratings increases, making it easier to observe waveform period and phase information compared to conventional fixed scales.

Further, in the above embodiment, an example in which a CRT is used as a display device has been described, but it is also effective when using a matrix type display device such as an LCD, L, ET), or EL.

Further, the scale generating means may be a conventional graphic display circuit using a microprocessor.

In this case, when changing the scale pitch, new scale display data is written after clearing the display data on the refresh memory. This allows you to easily enlarge or reduce the scale, or change the major or minor scale.

(Effects of the Invention) As described above, according to the present invention, it is possible to realize a waveform display device with a relatively simple configuration in which the time axis can be set substantially arbitrarily, and the practical effects are great.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is an explanatory diagram of display resolution, Fig. 3 is an explanatory diagram of the area of the dot refresh memory, and Fig. 4 is a display example of the time axis reduction scale. be. 1... A/D converter, 2... Waveform memory, 3...
Waveform image generation circuit, 4... Waveform display control circuit, 5...
・Microprocessor, 6... Dot refresh memory, 7... Graduation image generation circuit, 8... OR gate, 9... C Fig. 1 Fig. 2 Fig. 3 Fig. 4

Claims (1)

[Scope of Claims] A waveform display device that displays a waveform by selectively driving a plurality of two-dimensionally arranged display pixels according to waveform display data, wherein the plurality of two-dimensionally arranged display pixels What is claimed is: 1. A waveform display device comprising a scale display means for displaying a grid-like scale by selectively driving the scale according to grid-like scale display data whose time axis can be arbitrarily adjusted.