JPH01297902A - Circuit board - Google Patents

Circuit board

Info

Publication number
JPH01297902A
JPH01297902A JP63128824A JP12882488A JPH01297902A JP H01297902 A JPH01297902 A JP H01297902A JP 63128824 A JP63128824 A JP 63128824A JP 12882488 A JP12882488 A JP 12882488A JP H01297902 A JPH01297902 A JP H01297902A
Authority
JP
Japan
Prior art keywords
circuit board
frequency circuit
substrate
wiring
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63128824A
Other languages
Japanese (ja)
Inventor
Takao Matsubara
松原 隆雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63128824A priority Critical patent/JPH01297902A/en
Publication of JPH01297902A publication Critical patent/JPH01297902A/en
Pending legal-status Critical Current

Links

Landscapes

  • Waveguides (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To unite a high-frequency circuit and a low-frequency circuit and to realize the high integration of the circuits and the reduction of the capacity by adhering a multi-layered circuit board for the low-frequency circuit below a microstripper line. CONSTITUTION:A microstrip line consists of strip conductors 2 provided on the top surface of a dielectric substrate 1 and conductors 3 provided on the reverse surface of the substrate 1, and characteristic impedance is set by the dielectric constant of the substrate 1 and the thickness and width of the conductors 2. Then the multi-layered circuit board formed by laminating insulating substrates 5 having wiring formed by being patterned on the surfaces is adhered to the reverse surface of the microstrip line across insulating layers 6 provided on the reverse surface of a conductor layer 3. The wiring 4 is used as a power source line or the signal lines of the low-frequency circuit.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は回路基板に関し、特にマイクロストリブ線路を
有する回路基板に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a circuit board, and particularly to a circuit board having microstrib lines.

〔従来の技術〕[Conventional technology]

従来の回路基板は、第2図に示すように、誘電体基板1
の上面に設けたストリップ導体2と、誘電体基板1の下
面に設けた導体M3とを有するマイクロストリップ線路
を有し、電源配線や低周波の制御用配線を誘電体基板の
表面の一部に形成〈図示せず)していた。
A conventional circuit board has a dielectric substrate 1 as shown in FIG.
It has a microstrip line with a strip conductor 2 provided on the top surface and a conductor M3 provided on the bottom surface of the dielectric substrate 1, and the power supply wiring and low frequency control wiring are provided on a part of the surface of the dielectric substrate 1. (not shown).

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の回路、基板は特性インピーダンスを考慮
したマイクロストリップ線路を有しているが、電源線や
、低周波の制御線が多くなると同一基板上に形成した配
線が複雑化し、基板面積が大きくなり電子機器へ実装す
る際の占有面積が大きくなるという問題点がある。
The conventional circuits and boards mentioned above have microstrip lines that take characteristic impedance into consideration, but as the number of power lines and low-frequency control lines increases, the wiring formed on the same board becomes complicated and the board area increases. However, there is a problem in that the area occupied when mounted on an electronic device increases.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の回路基板は、誘電体基板の上面に設けたストリ
ップ導体と、前記誘電体基板の下面に設けた導体層とを
有するマイクロストリップ線路と、表面にパターニング
して設けた配線を有する絶縁基板を積層して形成し、前
記導体層の下に接着して設けた多層回路基板とを含んで
構成される。
The circuit board of the present invention includes a microstrip line having a strip conductor provided on the upper surface of the dielectric substrate, a conductor layer provided on the lower surface of the dielectric substrate, and an insulating substrate having wiring patterned on the surface. and a multilayer circuit board formed by laminating the conductor layers and adhesively provided under the conductor layer.

〔実施例〕〔Example〕

次に、本発明の実施例について説明する。 Next, examples of the present invention will be described.

第1図は本発明の一実施例を説明するための回路基板の
斜視図である。
FIG. 1 is a perspective view of a circuit board for explaining one embodiment of the present invention.

第1図に示すように、誘°電体基板1の上面に設けたス
トリップ導体2と、誘電体基板1の下面に設けた導体層
3とを有してマイクロストリップ線路を構成し、誘電体
基板1の誘電率とストリップ導体2の厚さ及び幅により
、特性インピーダンスを設定する。
As shown in FIG. 1, a microstrip line is constituted by a strip conductor 2 provided on the upper surface of a dielectric substrate 1 and a conductor layer 3 provided on the lower surface of the dielectric substrate 1. The characteristic impedance is set by the dielectric constant of the substrate 1 and the thickness and width of the strip conductor 2.

次に、表面にパターニングして設けた配線4を有する絶
縁基板5の複数枚を積層して形成した多層回路基板を導
体層3の下面に設けた絶縁層6を介して前記マイクロス
トリップ線路の下面に接着して設ける。
Next, a multilayer circuit board formed by laminating a plurality of insulating substrates 5 having wiring lines 4 patterned on the surface is connected to the lower surface of the microstrip line via an insulating layer 6 provided on the lower surface of the conductor layer 3. It is attached and provided.

ここで、前記多層回路基板の配線4は、電源線あるいは
低周波回路の信号線等に使用する。
Here, the wiring 4 of the multilayer circuit board is used as a power supply line, a signal line of a low frequency circuit, or the like.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、マイクロストリップ線路
の下に低周波回路用の多層回路基板を接着して設けるこ
とにより、高周波回路と低周波回路とを一体化した回路
基板で構成し、回路の高集積化と容積の縮減化を実現す
ることができ、電子機器への実装に際してもその占有面
積を縮小できるという効果を有する。
As explained above, the present invention provides a circuit board that integrates a high frequency circuit and a low frequency circuit by bonding and providing a multilayer circuit board for low frequency circuits under the microstrip line. It is possible to achieve high integration and volume reduction, and has the effect of reducing the area occupied when mounted on electronic equipment.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を説明するための回路基板の
斜視図、第2図は従来の回路基板の一例を説明するため
の斜視図である。 1・・・誘電体基板、2・・・ストリップ導体、3・・
・導体層、4・・・配線、5・・・絶縁基板、6・・・
絶縁層。
FIG. 1 is a perspective view of a circuit board for explaining an embodiment of the present invention, and FIG. 2 is a perspective view for explaining an example of a conventional circuit board. 1... Dielectric substrate, 2... Strip conductor, 3...
・Conductor layer, 4... Wiring, 5... Insulating substrate, 6...
Insulating layer.

Claims (1)

【特許請求の範囲】 (A)誘電体基板の上面に設けたストリップ導体と、前
記誘電体基板の下面に設けた導体層とを有するマイクロ
ストリップ線路、 (B)表面にパターニングして設けた配線を有する絶縁
基板を積層して形成し、前記導体層の下に接着して設け
た多層回路基板、 とを含むことを特徴とする回路基板。
[Claims] (A) A microstrip line having a strip conductor provided on the upper surface of a dielectric substrate and a conductor layer provided on the lower surface of the dielectric substrate; (B) Wiring provided by patterning on the surface. 1. A multilayer circuit board formed by laminating insulating substrates having a conductor layer and bonded under the conductor layer.
JP63128824A 1988-05-25 1988-05-25 Circuit board Pending JPH01297902A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63128824A JPH01297902A (en) 1988-05-25 1988-05-25 Circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63128824A JPH01297902A (en) 1988-05-25 1988-05-25 Circuit board

Publications (1)

Publication Number Publication Date
JPH01297902A true JPH01297902A (en) 1989-12-01

Family

ID=14994320

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63128824A Pending JPH01297902A (en) 1988-05-25 1988-05-25 Circuit board

Country Status (1)

Country Link
JP (1) JPH01297902A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002232153A (en) * 2001-01-31 2002-08-16 Sanyo Electric Co Ltd Multilayer circuit board
WO2020130004A1 (en) * 2018-12-18 2020-06-25 株式会社村田製作所 Circuit board and electronic device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002232153A (en) * 2001-01-31 2002-08-16 Sanyo Electric Co Ltd Multilayer circuit board
WO2020130004A1 (en) * 2018-12-18 2020-06-25 株式会社村田製作所 Circuit board and electronic device
JPWO2020130004A1 (en) * 2018-12-18 2021-09-09 株式会社村田製作所 Circuit boards and electronic devices
US11612053B2 (en) 2018-12-18 2023-03-21 Murata Manufacturing Co., Ltd. Circuit board and electronic device

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