JPH01297907A - Image cancel mixer - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a heterodyne detection tuner used in television tuners, satellite broadcasting receivers, etc. This relates to a cancel mixer.

[Conventional technology]

-a, in a tuner using a strange gain detection method, a mixer mixes a local oscillation signal with a high frequency signal to be received, converts it into an intermediate frequency signal, and outputs the signal. That is, for example, when the frequency of the local oscillation signal is fL, by mixing, a signal with a frequency f that is lower than the frequency f3 of the local oscillation signal by the intermediate frequency fI is converted into an intermediate frequency signal as a signal to be received. That will happen. However, in this case, the intermediate frequency fτ is higher than the frequency f of the local oscillation signal.
When a signal with a higher frequency f1M arrives, this signal with a higher frequency f1M is also converted into an intermediate frequency signal, which causes interference. A signal with such a frequency f,,4 is called an image signal.

Now, as an image cancel mixer capable of performing a mixer operation and removing the above-mentioned image signal, for example, conventionally, in Japanese Patent Application Laid-open No. 61-182305, two voltage controlled oscillator circuits are used, and 9
A circuit is disclosed that creates two local oscillation signals having a phase difference of 0 degrees and removes an image signal.

[Problem to be solved by the invention]

As mentioned above, the conventional image cancellation mixer requires two voltage controlled oscillation circuits. Therefore, when trying to integrate this image canceling mixer into an IC, if an LC oscillation circuit is used as the voltage controlled oscillation circuit, two LC resonant circuits are required outside the IC because it is difficult to integrate the inductor into an IC. Therefore, there was a problem that the circuit scale became large.

SUMMARY OF THE INVENTION An object of the present invention is to solve the problems of the prior art described above and to provide an image canceling mixer that does not increase the circuit scale when integrated into an IC.

[Means to solve the problem]

In order to achieve the above object, the present invention includes a local oscillation circuit that generates a local oscillation signal, a resistor and a capacitor, and a circuit that inputs the local oscillation signal and shifts the phase of the local oscillation signal. Consists of a pass-pass filter, resistance and capacitance,
a high-pass filter that has the same cutoff frequency as the low-pass filter and that inputs the local oscillation signal and shifts the phase of the local oscillation signal; a first limiter amplifier that limits the amplitude and outputs the signal; and a second limiter amplifier that amplifies the output signal from the high-pass filter and outputs the signal after limiting it to the same amplitude as the amplitude limited by the first limiter amplifier. a limiter amplifier, a first mixer circuit that mixes the output signal from the first limiter amplifier with the input high frequency signal, converts it into an intermediate frequency signal and outputs it, and mixes the input high frequency signal with the second a second mixer circuit that mixes the output signal from the limiter amplifier, converts it into an intermediate frequency signal, and outputs the intermediate frequency signal; and an intermediate frequency signal output from the first mixer circuit and the intermediate frequency signal output from the second mixer circuit. The image canceling mixer is configured with a phase synthesizer that combines the intermediate frequency signal and the intermediate frequency signal so that the signal components are in phase.

Further, as the resistor constituting the low-pass filter and the high-pass filter, a resistance between the drain and source of an FET is used (or as the capacitance constituting the low-pass filter and the high-pass filter, respectively,
(using a junction capacitance of two diodes whose cathodes are connected to each other), and in addition to the above configuration, the phase of the output signal from the first limiter amplifier and the phase of the output signal from the second limiter amplifier. a phase comparator that outputs a signal according to the phase difference; and an output signal from the phase comparator is input, and the low-pass filter and the high-pass filter are operated according to the output signal. Each of the constituent F
By changing the gate voltage of ET (or the voltage at the connected cathodes of two diodes), the phase difference between the output signal from the first limiter amplifier and the output signal from the second limiter amplifier is π/2. (90 degrees),
A control means for controlling the value of the resistance between the drain and source of each FET (or the junction capacitance of two diodes) may be provided.

[Effect]

As described above, the low-pass filter and the high-pass filter, each receiving the local oscillation signal from the local oscillation circuit, have the same cutoff frequency, so the phase difference of their output signals is always π/ 2 (90 degrees).

Further, the first and second limiter amplifiers amplify the output signals from the low-pass filter and the high-pass filter, respectively, limit the amplitudes so that they have the same amplitude, and output the signals.

Further, the first and second mixer circuits mix output signals from the first and second limiter amplifiers with the input high frequency signal, convert it into an intermediate frequency signal, and output the mixed signal. As a result, from the first mixer circuit,
For example, a signal component and an image signal component are outputted in the same phase as an intermediate frequency signal, and the signal component and an image signal component are outputted in opposite phase as an intermediate frequency signal from the second mixer circuit. be done. Moreover, the first
The signal component from the mixer circuit and the signal component from the second mixer circuit have a phase difference of π/2, and the image signal component from the first mixer circuit and the signal component from the second mixer circuit have a phase difference of π/2. There is a phase difference of π/2 between the image signal components.

Therefore, in the phase synthesizer, for example, the phase of the intermediate frequency signal output from the first mixer circuit is adjusted to π/2.
When shifted and synthesized with the intermediate frequency signal output from the second mixer circuit so that the signal components are in phase, the image signal component is canceled out of phase and only the signal component can be left.

In this way, the mixer operation can be performed and the image signal can be removed.

As described above, according to the present invention, the low-pass filter and the high-pass filter are each composed of a resistor and a capacitor, and unlike the conventional example described above, an inductor is not used. can be implemented as an IC, so there is no need to implement an IC or increase the circuit scale.

In addition, when attempting to perform the above-mentioned image cancellation operation in a wide band and with high performance, it is necessary to avoid the π/2 phase difference between the output signals of the low-pass filter and the high-pass filter due to the effects of variations in circuit elements, stray capacitance, etc. If a slight deviation from the above cannot be ignored, the phase comparator and control means may be further provided in addition to the above configuration.

That is, the phase comparator compares the phase of the output signal from the first limiter amplifier and the phase of the output signal from the second limiter amplifier, and outputs a signal according to the phase difference.

The control means inputs an output signal from the phase comparator, and adjusts the gate voltage of the FET (or the gate voltage of the two diodes) constituting the low-pass filter and the high-pass filter, respectively, according to the output signal. the drain of each FET so that the phase difference between the output signal from the first limiter amplifier and the output signal from the second limiter amplifier is π/2. - Control the value of the resistance between the sources (or the junction capacitance of two diodes).

As a result, even if there are variations in circuit elements, stray capacitance, etc., the phase difference between the output signals of the low-pass filter and the high-pass filter can always be accurately set to π/2.

Therefore, when the phase comparator and control means are further provided, a wide-band, high-performance image canceling operation can be performed without being affected by variations in circuit elements or stray capacitance.

〔Example〕

The present invention will be explained in detail below.

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

As shown in FIG. 1, this embodiment mainly includes a local oscillation circuit 1, a phase shifter 2.5, a limiter amplifier 8.9, a mixer circuit 10.11, and a phase synthesizer 13. Become.

Note that 16 is a bias resistor (resistance of approximately 2Ω).

The local oscillation signal output from the local oscillation circuit 1 is divided into two parts and each is input to a phase shifter 2.5.

Here, the phase shifter 2 is composed of a low-pass filter composed of a resistor 3 and a capacitor 4, and the phase shifter 5 is composed of a high-pass filter composed of a resistor 7 and a capacitor 6. . still,
17 is a ground capacitance.

Now, the frequency of the local oscillation signal is set to fL + phase shifters 2 and 5.
When the cutoff frequency of fc is fc, the phase shift amount θ1 of the phase shifter L2 becomes θH=-tan-'□, and the phase shift amount θ2 of the phase shifter 5 becomes θ2=tan-'□. L Ru. Therefore, the phase difference θ between the outputs of the phase shifters 2 and 5 is given by the following equation.

θ+θ2−θ.

That is, if the cutoff frequencies of phase shifters 2 and 5 are selected to be equal, the phase difference θ of the output signal of phase shifter 2.5 will always be π/2.

Next, the signals output from the phase shifter 2.5 are as follows:
After being amplified by limiter amplifiers 8 and 9 and limited in amplitude so that their amplitudes are equal, the mixer circuit 10.11
is input. Here, each of the limiter amplifiers 8.9 inputs an unbalanced signal and outputs a balanced (balanced) signal.
It consists of a single-power, two-output differential amplifier that outputs a balanced (balanced) signal. Therefore, the line 73 has the opposite phase signal of the line 72, and the line 75 has the opposite phase signal of the line 74.

Next, the mixer circuits 10 and 11 are each a balanced mixer circuit, and in addition to inputting the balanced signal output from the limiter amplifier 8.9 described above, a high frequency signal is input from the terminal 12.

The image signal removal operation will be described below.

Now, the signal input to the mixer circuit 10 via the line 72 is ell+ = E1 cos eQ t
--- Bichinaka... type (
1), and the signal input to the mixer circuit 11 via the line 74 is e ll! = EQ sin ωHt
”...Equation (2) (as mentioned earlier, eQ, and e
At has a phase difference of π/2. ). On the other hand, a high frequency signal input from terminal 12 (hereinafter referred to as input signal) is e(
=E3 sin ωst IHH++
Equation (3) is used, and the image signal is e + s = E I, 4 sin ω, Ht
−” −”Equation (4) is used. As is well known, the angular frequency ωIN of the image signal is ωIN = 2ω - ω, ...
Formula (5) % Formula % Hereinafter, attention will be paid only to the phase relationship of each signal.

The mixer circuit 10 mixes the signal eI21 and the input signal ei (mixing equation (1) and 2(3)), and
and image signals e1, 4 (Equation (1) and Equation (4)
As a result, if we remove the sum frequency component and focus on the difference frequency component, for the input signal, sinω5tXcosωQt→5in(ω2−ωsLL
...Formula (6) For the image signal, sinω,,tXcosωj! t → -5in (ω slack - ω
s)t...2 (7) is obtained.

Further, in the mixer circuit 11, the signal eQz and the input signal ei
(mixing equation (2) and equation (3)), and the signal ex
t and the image signal e1M (Equation (2) and Equation (4)
), and as a result, for the input signal, sinω3tXsireωit→cos(ωsee−ωs)t
...Formula (8) For the image signal, sinωIHt X5inωut→cos (ωg−
ωs)t...Formula (9) %Formula% In other words, the line 70 has an input signal component of 5 inches (ωg-ω
s) t and the image signal component -5in(ω2-ωs)t, and the line 71 has the input signal component cos(ω party-ω
s)t and an image signal component cos (ωλ−ωs)t appear, respectively.

Therefore, in the phase synthesis circuit, when the phase of the signal on the line 7o is shifted by π/2 and combined with the signal on the line 71, the image signal component is cancelled, and only the input signal component remains.

In this way, the intermediate frequency signal from which the image signal has been removed is output from the terminal 14.

As described above, according to this embodiment, since the phase shifters 2 and 5 are each constituted by a low-pass filter and a high-pass filter, a stable phase shifter can be obtained over a wide band. Also,
The above-mentioned low-pass filter and high-pass filter each consist of a resistor and a capacitor, and unlike the conventional example mentioned above, an inductor is not used, so the entire image canceling mixer can be integrated into an IC. For, I
When converting to C, the circuit scale does not increase.

FIG. 2 is a circuit diagram showing a second embodiment of the present invention.

In this embodiment, the junction capacitors of diodes 18 to 21 are used for the capacitors 4 and 6 constituting the phase shifter 2.5 of the embodiment shown in FIG. In order to do this, the diodes 18 to 21 have a common cathode connection system.

The operating principle and effects of this embodiment are the same as those of the embodiment shown in FIG. 1, but since a diode is used, the I
The circuit configuration is suitable for C conversion. In addition, in FIG. 2, 40 is a bias resistor (resistance of about 2Ω), and 41 is a ground capacitor.

Figure 3 shows the output point 15.22 in Figures 1 and 2.
．． 23 is an explanatory diagram showing the phase relationship of output signals at No. 23. FIG.

In Fig. 3, (a) shows the phase relationship when the frequency fL of the local oscillation signal is lower than the phase shift frequency rc of the phase shifter 2.5 (that is, fC>fL), and (b) shows the phase relationship when they are equal. (c) shows the phase relationship in the high case (i.e., fc=ft), and (c) shows the phase relationship in the high case (i.e., f, < rt).

Further, assuming that the counterclockwise direction is the increasing direction of the phase, the vector α is the vector of the output signal at the output point 15 of the local oscillation circuit 1, and the vector β is the vector of the output signal at the output point 23 of the phase shifter 5. γ is the vector of the output signal at the output point 22 of the phase shifter 2.

As shown in Figure 3, the phase difference between vector β and vector γ is always π/2, and when fc > fL, the magnitude of vector γ is the same as that of vector β, as shown in Figure 3 (a). If fc=ft, the magnitude of the vector β is equal to the magnitude of the vector T, as shown in FIG.

In the case of fL, the magnitude of the vector β is larger than the magnitude of the vector T, as shown in FIG.

FIG. 4 is a circuit diagram showing a third embodiment of the present invention.

In this embodiment, a resistor 130.1 with a large resistance value is connected to the common cathode of the diodes 18.19 and 20°21.
The configuration is such that a DC voltage is applied from a terminal 150 via a terminal 150.

By changing the DC voltage applied from this terminal 150 according to the high frequency signal input from the terminal 12 or the local oscillation signal input from the local oscillation circuit 1, a phase shifter consisting of a diode 18, 19 and a resistor 3, By varying the cut-off frequency of the phase shifter consisting of the diodes 20, 21 and the resistor 7, the amplitudes of the output signals appearing at its output points 22 and 23 can be made approximately equal.

FIG. 5 is a circuit diagram showing a fourth embodiment of the present invention.

In this embodiment, the anodes of diodes 18, 19 and 20.degree. 21 are commonly connected, and a DC voltage is applied to this common anode from a terminal 150 via resistors 130 and 131 having a large resistance value.

By changing the DC voltage applied from this terminal 150 in accordance with the high frequency signal input from the terminal 12 or the local oscillation signal input from the local oscillation circuit 1, a phase shifter consisting of a diode 18, 19 and a resistor 3 , and the cutoff frequency of the phase shifter consisting of the diodes 20, 21 and the resistor 7, respectively, and the output points 22 and 23 are changed.
It is possible to make the amplitudes of the output signals appearing on the two sides approximately equal.

Here, in the embodiment shown in FIG. 4 or the embodiment shown in FIG. How the amplitude changes depending on the DC voltage applied from the terminal 150 will be explained.

Here, the embodiment shown in FIG. 4 will be explained using FIG. 6 as an example.

FIG. 6 is a characteristic diagram showing the frequency characteristics of the amplitude of the output signal at the output points 22 and 23 in FIG.

The DC type pressure applied from the terminal 150 in Fig. 4 is now v.
I, as shown in FIG. 6, the frequency characteristic of the amplitude of the output signal at the output point 22 is given by a curve 160, and the frequency characteristic of the amplitude of the output signal at the output point 23 is given by a curve 161. On the other hand, if the DC voltage applied from the terminal 150 is V, (V,>Vl), the frequency characteristic of the amplitude of the output signal at the output point 22 is given by a curve 162, and the amplitude of the output signal at the output point 23 is given by a curve 162. The frequency characteristic of is given by a curve 163.

The frequency characteristic as shown in FIG. 6 is obtained by increasing the DC voltage applied from the terminal 150 to the diode 18.1.
This is because the junction capacitances of 9, 20, and 21 become smaller, thereby increasing the cutoff frequency of each phase shifter.

Therefore, for example, when the frequency of the local oscillation signal input from the local oscillation circuit 1 is around f, the DC voltage applied from the terminal 150 is set to approximately 1, and the local oscillation signal input from the local oscillation circuit 1 is When the frequency of is around r2, if the DC voltage applied from the terminal 150 is about v2, the amplitude of the output signal obtained at the output points 22 and 23 will be whatever the frequency of the local oscillation signal is.
It has the characteristic that you can obtain a fairly constant amount.

By the way, the difference between the embodiment shown in FIG. 4 and the embodiment shown in FIG.
DC voltage applied to diode 18, 19 by resistors 3, 40, and diode 2 by resistors 16, 7.
0.21 is applied to terminal 15, respectively.
When the applied DC voltage is lower than 0, the configuration shown in FIG. 4 is taken, and when it is higher, the configuration shown in FIG. 5 is taken. That is, the diodes 18.19 and 20.21 are characterized in that they are always used in a reverse bias state.

Unfortunately, the 4 shown in Figures 1, 2, 4, and 5
A feature of the two embodiments is that the DC bias applied to the input of the limiter amplifier 8.9 (i.e., the aforementioned output points 22, 23) and the bias voltage applied to the aforementioned diodes 18 to 21 are all It is internally auto-biased, ie, the aforementioned output point 15 is supplied with bias. By adopting such a circuit configuration, stable DC operation of the circuit is possible.

FIG. 7 is a circuit diagram showing a specific circuit configuration when the embodiment of FIG. 2 is applied to a television tuner capable of receiving signals in the UHF band and VHF band.

This circuit uses MESFET as an active device.

In FIG. 7, FETs 91 and 92 are oscillation transistors, with FET 91 oscillating in the UHF band and FET 92 oscillating in the VHF band, which are switched depending on the reception band.

A broken line block 93 is a buffer amplifier and level shift circuit, and obtains a gain of about 15 to 20 dB.

A broken line block 95 corresponds to the phase shifter in FIG.
The cutoff frequency due to the capacitance made up of the resistor 7 and the diode 20.21, and the cutoff frequency due to the capacitance made up of the resistor 7 and the diode 20.21 are each set to about 500 MHz.

A broken line block 94 corresponds to the limiter amplifier 8.9 in FIG. 2, and has a configuration in which the output amplitude of the differential amplifier circuit is limited by diodes 101 to 108.

The circuit shown in FIG. 7 is a 1-chip IC including mixer circuits 10 and 11, and is compact and capable of image canceling operation over a wide band.

FIG. 8 is a circuit diagram showing a fifth embodiment of the present invention.

As shown in FIG. 8, this embodiment mainly includes a local oscillation circuit 1, a phase shifter 2, a limiter amplifier 8.9, a mixer circuit 10, 11, and a phase synthesizer 13.

The local oscillation signal output from the local oscillation circuit 1 is divided into two parts, one of which is input to the first terminal of the limiter amplifier 8, and the other of which is input to the first terminal of the limiter amplifier 8, and the other is divided into two parts. It is input to phase box 2. The output signal from the phase shifter 2 is further divided into two parts and sent to the second limiter amplifier 8.
and the first terminal of the limiter amplifier 9. Further, the second terminal of the limiter amplifier 9 is connected to the first terminal of the limiter amplifier 8 via a bias resistor 16, and is grounded via a ground capacitor 25 having a large capacitance value.

As a result, the voltage across the resistor 3 of the phase shifter 2 is input to the limiter amplifier 8, and the voltage across the capacitor 40 of the phase shifter 2 is input to the limiter amplifier 9. The limiter amplifiers 8 and 9 amplify the input voltages, limit the amplitudes so that their amplitudes are equal, and input the voltages to the mixer circuits 10 and 11.

The mixer circuit 10.11 also includes a limiter amplifier 8,
In addition to the output signal from 9, a high frequency signal is input from terminal 12. The operation in mixer circuit 10.11 and phase synthesizer 13 is similar to that described in the embodiment of FIG.

The feature of this embodiment is that the voltage across the resistor 3 of the phase shifter 2 is extracted by the limiter amplifier 8, and the voltage across the capacitor 4 of the phase shifter 2 is extracted by the limiter amplifier 9. Since there is always a phase difference of π/2 between the voltage across the resistor 3 and the voltage across the capacitor 40, the output signal of the limiter amplifier 8.9 is always on the line 26.27.
Signals having a phase difference of π/2 from each other appear.

In this way, in this embodiment, only one phase shifter 2 is required, which is a low-pass filter composed of a resistor 3 and a capacitor 4, so that this embodiment is different from the embodiment shown in FIG. Therefore, it can be said that the structure is resistant to variations in circuit elements and is suitable for miniaturization.

FIG. 9 is a circuit diagram showing a sixth embodiment of the present invention.

In this embodiment, the capacitor t constituting the phase shifter 2 of the embodiment of FIG.
4, using the junction capacitance of the diode 24,
The circuit operation and effects are the same as those of the embodiment shown in FIG. 8, and the structure is more suitable for IC implementation.

FIG. 10 is an explanatory diagram showing the phase relationship of the signals on the output point 15 and the lines 26 and 27 in FIGS. 8 and 9. FIG.

In FIG. 10, when the cutoff frequency of the phase shifter 2 is fc and the frequency of the local oscillation signal input to the phase shifter 2 is fL, (a) shows the phase relationship when f c > f L,
(b) shows the phase relationship in the case of fc""ft, and (c) shows r
The phase relationships in the case of c<fL are shown respectively.

Further, the vector α is the vector of the output signal at the output point 15, the vector γ is the vector of the signal on the line 27, and the vector β is the vector of the signal on the line 26.

As shown in Figure 10, solid. The phase difference between the torque β and the vector γ is always π/2, and when fc>rL, the same figure (a
), the magnitude of the vector T is larger than the magnitude of the vector β, and if f, = fL, the magnitude of the vector β and the magnitude of the vector γ are equal, as shown in the same figure (b), Also, f.

In the case of fL, the magnitude of the vector β is larger than the magnitude of the vector γ, as shown in FIG.

FIG. 11 is a circuit diagram showing a seventh embodiment of the present invention.

In this embodiment, the junction capacitance of diodes 18 and 19 whose cathodes are common is used as the capacitance of the phase shifter 2. A DC voltage is applied to the diode 18 and the junction capacitance of the diodes 18 and 19 is changed.

FIG. 12 is a circuit diagram showing an eighth embodiment of the present invention.

This embodiment has almost the same configuration as the embodiment shown in FIG. A DC voltage is applied through a resistor 142 having a higher resistance value than the terminal 141.

FIG. 13 is a circuit diagram showing a ninth embodiment of the present invention.

This embodiment has almost the same configuration as the embodiment shown in FIG. 12, but the anodes of the diodes 18 and 19 are used as a common anode, and a DC voltage is applied thereto via a resistor 142 whose resistance value is larger than that of the terminal 141. There is.

In the embodiments shown in FIGS. 11 to 13, a high-frequency signal that is manually applied from the terminal 12 to the DC voltage applied from the terminal 141;
Alternatively, by changing the cutoff frequency of the phase shifter made up of the diodes 18 and 19 and the resistor 3 by changing it according to the local oscillation signal input from the local oscillation circuit 1, the amplitude of the voltage across the resistor 3 and the output point 22 can be changed. can be made approximately equal to the amplitude of the voltage.

By the way, the difference between the embodiment shown in FIG. 11 or 12 and the embodiment shown in FIG. FIG. 11 when the DC voltage is lower than the DC voltage applied from the terminal 141.

The configuration shown in FIG. 12 is adopted, and when the temperature is high, the configuration shown in FIG. 13 is adopted. In other words, the diodes 18 and 19 are always used in a reverse bias state.

Another feature of the five embodiments shown in FIGS. 8, 9, and 10 to 13 is the direct current bias applied to the inputs of the limiter amplifiers 8 and 9, and the diode described earlier. The bias voltages applied to 18 and 19 are all internally auto-biased, ie where the bias of the aforementioned output point 15 is supplied. By adopting such a circuit configuration, stable DC operation of the circuit is possible.

FIG. 14 is a circuit diagram showing a specific circuit configuration when the embodiment of FIG. 9 is applied to a television tuner capable of receiving signals in the UHF band and VHF band.

This circuit uses MESFET as an active device.

In FIG. 14, FETs 91 and 92 are oscillation transistors, FET 91 oscillates in the UHF band, and FET 92
oscillates in the VHF band, and is switched depending on the reception band.

A broken line block 93 is a buffer amplifier and level shift circuit, and obtains a gain of about 15 to 20 dB.

A broken line block 97 corresponds to the phase shifter 2 in FIG. 9, and the cutoff frequency due to the junction capacitance of the resistor 3 and the diode 24 is set to about 500 MHz.

A broken line block 98 is a buffer source follower circuit, and the gate width and bias are set so that the junction capacitance of the FET is approximately 0.01 p'F. Incidentally, in this circuit, the FET gate width is 80 μm.

A broken line block 94 corresponds to the limiter amplifier 8.9 in FIG. 9, and has a configuration in which diodes 101 to 108 limit the output amplitude of the differential amplifier circuit.

The circuit shown in FIG. 14 is a one-chip IC including mixer circuits 10 and 11, and is compact and capable of image canceling operation over a wide band.

FIG. 15 is a circuit diagram showing a tenth embodiment of the present invention.

As shown in FIG. 15, this embodiment mainly includes a local oscillation circuit 1, a phase shifter 2.5, a limiter amplifier circuit 8.9, a mixer circuit 10.11, a phase synthesizer 13, Phase comparator 30, loop filter 31, and loop amplifier 32
It consists of and.

The local oscillation signal output from the local oscillation circuit 1 is divided into two parts and input to phase shifters 2 and 5, respectively.

Here, the phase shifter 2 is constituted by a low-pass filter consisting of a resistance between the source and drain of FET 33 and a capacitance N4, and the phase shifter 5 is constituted by a resistance between the source and drain of FET 34 and a capacitance 6. It consists of a high-pass filter consisting of.

At this time, in order to operate the FETs 33 and 34 as resistors as described above, the DC biases of their sources and drains are made equal. Also, for this reason, the bias resistor 1
6, 37, and 38, bias voltages are applied to the sources and drains of the FETs 33 and 34.

Furthermore, the FETs 33 and 34 have a characteristic that the resistance value between the source and drain changes when the voltage applied to the gates is changed. .36
The resistance value is controlled by applying it through the resistor.

Furthermore, the cutoff frequency due to the resistance and capacitance 4 between the source and drain of FET 33, and the source and drain of FET 34 are
The cutoff frequency due to the resistance between the drains and the capacitor 6 is set to be equal. With this setting, the phase difference between the output signals from the phase shifters 2 and 5 is always π/2, as described in the implementation QJ of FIG. 1 above.

Next, the signals output from the phase shifters 2 and 5 are respectively
After being amplified by the limiter amplifier 8.9 and limited in amplitude so that the mutual amplitudes are equal, the mixer circuit 10.11
is input. Further, in addition to the output signals from the limiter amplifiers 8 and 9, a high frequency signal is inputted to the mixer circuit 10.11 from the terminal 12.

The image canceling operation of this embodiment is similar to that shown in the embodiment of FIG. 1 described above.

By the way, as explained above, the low-pass filter and the high-pass filter that respectively constitute the phase shifter 2.5 always obtain a phase difference of π/2 as the phase difference of their output signals. When attempting to perform this over a wide band and with high performance, the effects of variations in circuit elements and stray capacitance cannot be ignored, and a slight deviation from π/2 in the phase difference between the output signals of phase shifters 2 and 5 becomes a problem. Become.

Therefore, in this embodiment, a phase locked loop (PLL) is configured in order to maintain the phase difference between the output signals of the phase shifters 2 and 5 at π/2 with high accuracy. That is,
The phase of the output signal of the limiter amplifier 8.9 is compared by the phase comparator 30, and the output voltage of the phase comparator 30 is converted to the loop filter 31.9. It is fed back to the phase shifters 2 and 5 via the loop amplifier 32. The feedback light to the phase shifter 2.5 is the gate 111, 112 of the FET 33, 34 mentioned above, and the amount of phase shift of the phase shifter 2, 5 is controlled by changing the resistance value between the source and drain. I do.

By adopting such a configuration, a wide band and high performance image canceling operation is possible, and a circuit configuration suitable for C conversion can be obtained.

FIG. 16 is a circuit diagram showing an eleventh embodiment of the present invention.

This embodiment has almost the same configuration as the embodiment shown in FIG.
The difference is that the phase shifter 5 is composed of a low-pass filter consisting of a junction capacitance of a resistor 7 and a diode 20, and a high-pass filter consisting of a junction capacitance of a resistor 7 and a diode 20. Therefore, from the loop amplifier 32 to the phase shifter 2.5
The feedback light is transmitted through diodes 18 and 1 whose cathodes are common.
9 and the cathodes of diodes 20 and 21, respectively.

Since the junction capacitance of the diodes 18, 19, 20, and 21 changes when the potential difference across them changes, in this embodiment,
This change in junction capacitance is used to control the amount of phase shift of the phase shifters 2 and 5.

In addition, in this example, the bias resistance is 16.40, so that
A bias voltage is supplied to the inputs of the limiter amplifiers 8 and 9, and a common bias voltage is applied to the anodes of the diodes 18 and 19°20.21.

According to this embodiment, since the junction capacitance of a diode is used as the capacitance, the structure is more suitable for IC implementation.

FIG. 17 is a circuit diagram showing a twelfth embodiment of the present invention.

This embodiment has almost the same configuration as the embodiment shown in FIG. The difference is that the phase shifter 5 is constituted by a high-pass filter consisting of a resistance between the source and drain of an FET 34 and a junction capacitance of diodes 20 and 21. Therefore, the feedback light from the loop amplifier 32 to the phase shifter 2.5 is fed back to the gates of the FETs 33 and 34, and changes the resistance value between the source and drain.
．． The amount of phase shift in step 5 is controlled. Note that 42 is a resistor.

In this embodiment, the junction capacitance of a diode is used as the capacitance, so the structure is more suitable for IC implementation.

FIG. 18 shows the phase comparator 3 in FIGS. 15 to 17.
0. Loop filter 31. 3 is a circuit diagram showing a specific circuit configuration of a loop amplifier 32. FIG.

In the circuit shown in FIG. 18, the loop amplifier and loop filter are arranged in opposite directions.

In FIG. 18, a broken line block 61 corresponds to the phase comparator 30 in FIGS. 15 to 17, and has a double-balanced structure. Further, a broken line block 62 is a level shift circuit. Furthermore, the broken line block 63 corresponds to the loop amplifier 32 in FIGS. 15 to 17. Here, the gain of the loop amplifier is the FET3 shown in FIGS. 15 to 17.
It is set to about 20 dB based on the control sensitivity of the resistance value between the sources and drains of No. 3 and 34. Broken line block 64
is an RC low-pass filter, which corresponds to the loop filter 31 in FIGS. 15 to 17, and its cutoff frequency is several MHz.
It has been selected as z. A broken line block 65 is a level shift circuit, and a DC voltage is fed back to the phase shifters 5 and 2 from terminals 54 and 55.

In the circuit shown in FIG. 18, the limiter amplifier 9.
8, if the phase relationship of the signals input to the terminals 50, 51 and 52, 53 deviates from π/2, an output voltage at the output terminal 54, 55 is obtained, and the output voltage is phase shifted. By controlling the amount of phase shift of the devices 5 and 2, the terminals 50 and 51
And the phase difference of the signals input from terminals 52 and 53 is π/
Control wholesale to 2.

This control operation will be explained in detail below.

The output voltages of the broken line block 61 corresponding to the phase comparator 30 appear at nodes 121 and 122, but the voltage changes are opposite to each other. That is, if the voltage at node 121 changes in the positive direction, the voltage at node 122 changes in the negative direction. Such a voltage change also appears at terminal 54.55, and terminal 54.5
The output voltage of phase shifter 5.2 always changes in a negative phase relationship with respect to the reference voltage, that is, it moves the resistance value of phase shifter 5.2 in the opposite direction.

For example, if the phase difference between the signals input from the limiter amplifier 9.8 to the terminals 50.51 and 52.53 is greater than π/2, the voltage at the terminal 54 increases, the voltage at the terminal 55 decreases, and the phase shifter The phase shift amount of phase shifter 5 increases, the phase shift amount of phase shifter 2 decreases, and the phase difference between the outputs of phase shifter 2.5 becomes π/2.

Conversely, if the phase difference between the signals input from the limiter amplifiers 9 and 8 to the terminals 50, 51 and 52.53 is smaller than π/2, the voltage at the terminal 54 decreases and the voltage at the terminal 55 increases, resulting in a phase shift. The phase shift amount of phase shifter 5 decreases, the phase shift amount of phase shifter 2 increases, and the phase difference between the outputs of phase shifter 2.5 becomes π/2.

In this way, by using a circuit as shown in FIG. 18, a good image cancellation effect can be obtained over a wide band with a simple configuration.

FIG. 19 is a circuit diagram showing a specific circuit configuration of the phase synthesizer 13 used in each embodiment of the present invention.

As shown in FIG. 19, the phase synthesizer 13 includes a capacitor 131,
A high-pass filter consisting of a resistor 134 and a capacitor 132 .
A mixer circuit 10.11 is configured with a low-pass filter consisting of a resistor 133, and has the same cutoff frequency.
When the output signals from the mixer circuit 10 are combined, only the phase of the output signal from the mixer circuit 10 is shifted by π/2, and the phase is combined, thereby suppressing the image signal.

Each embodiment of the present invention has been described above, but the junction capacitance of the diode constituting the phase shifter shown in FIGS. 4, 5, 11, 12, and 13, respectively, has been described. In the embodiments in which the configuration is controlled by a DC voltage applied to the terminal 141 or 150, when these embodiments are used in a tuner used for a television tuner, a satellite broadcast receiver, etc., the local oscillation circuit and filter of the tuner can be varied. From the voltage used to
By creating a DC voltage to be applied to
It is possible to provide a tuner with a simpler configuration using an image cancellation mixer.

〔Effect of the invention〕

According to the present invention, the low-pass filter and the high-pass filter each consist of a resistor and a capacitor, and unlike the conventional example described above, an inductor is not used. Therefore, the entire image canceling mixer can be integrated into an IC. Therefore, when integrated into an IC, the circuit size does not increase.

Further, in the present invention, when the phase comparator and control means are further provided, the phase difference between the output signals of the low-pass filter and the high-pass filter may be Even if it deviates from /2, it can always be controlled accurately to π/2, and therefore a wideband, high-performance image cancellation operation can be performed.

Further, in the present invention, when the junction capacitance of a diode is used as the capacitance constituting each of the low-pass filter and the high-pass filter, and the voltage applied to the cathode or anode of the diode is changed, the above-mentioned It is also possible to adjust the amplitudes of the signals input to the first and second limiter amplifiers to be equal to each other by varying the cut-off frequencies of the low-pass filter and the high-pass filter while remaining equal to each other.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a first embodiment of the invention, FIG. 2 is a circuit diagram showing a second embodiment of the invention, and FIG. 3 is an output point 15 in FIGS. FIG. 4 is a circuit diagram showing the third embodiment of the present invention, FIG. 5 is a circuit diagram showing the fourth embodiment of the present invention, Fig. 6 is a characteristic diagram showing the frequency characteristics of the amplitude of the output signal at the output points 22 and 23 in Fig. 4, and Fig. 7 is a characteristic diagram showing the frequency characteristics of the amplitude of the output signal at the output points 22 and 23 in Fig. 4. A circuit diagram showing a specific circuit configuration when applied to a television tuner, FIG. 8 is a circuit diagram showing a fifth embodiment of the present invention, and FIG. 9 is a circuit diagram showing a sixth embodiment of the present invention. , FIG. 10 is an explanatory diagram showing the phase relationship of the signals on the output point 15 and the lines 26 and 27 in FIGS. 8 and 9.
1 is a circuit diagram showing a seventh embodiment of the invention, FIG. 12 is a circuit diagram showing an eighth embodiment of the invention, and FIG. 13 is a circuit diagram showing a ninth embodiment of the invention. FIG. 14 is a circuit diagram showing a specific circuit configuration when the embodiment of FIG. 9 is applied to a television tuner capable of receiving UHF band and VHF band signals;
FIG. 15 is a circuit diagram showing a tenth embodiment of the present invention;
6 is a circuit diagram showing an eleventh embodiment of the invention, FIG. 17 is a circuit diagram showing a twelfth embodiment of the invention, and FIG. 18 is a circuit diagram showing the phase comparator 30 in FIGS. 15 to 17. Loop filter 31. FIG. 19 is a circuit diagram showing a specific circuit configuration of the loop amplifier 32; FIG. 19 is a circuit diagram showing a specific circuit configuration of the phase synthesizer 13 used in each embodiment of the present invention;
It is. Explanation of symbols 1... Local oscillation circuit, 2.5... Phase shifter, 8.9.
...Limiter amplifier, 10.11...Mixer circuit, 1
3... Phase synthesizer, 30... Phase comparator, 31...
- Loop filter, 32... loop amplifier. Agent Patent Attorney Akio Namiki Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 tl ↑2 - Kiyoshi Sato Figure 8 Figure 9 Figure 10 (Q) (b) (c ) Figure 11 n Figure 12 Figure 13 Figure 15 Figure 17 ■-4

Claims (1)

[Claims] 1. A local oscillation circuit that generates a local oscillation signal, and a low-pass filter that inputs the local oscillation signal and shifts the phase of the local oscillation signal, which is composed of a resistor and a capacitor; a high-pass filter consisting of a resistor and a capacitor, whose cut-off frequency is equal to that of the low-pass filter, and which inputs the local oscillation signal and shifts the phase of the local oscillation signal; a first limiter amplifier that amplifies the output signal and outputs the output signal after limiting it to a predetermined amplitude; and a first limiter amplifier that amplifies the output signal from the high-pass filter and limits it to the same amplitude as the amplitude limited by the first limiter amplifier. a second limiter amplifier that outputs an intermediate frequency signal, a first mixer circuit that mixes an input high frequency signal with an output signal from the first limiter amplifier, converts it into an intermediate frequency signal, and outputs the intermediate frequency signal; a second mixer circuit that mixes the output signal from the second limiter amplifier with the high frequency signal, converts the signal into an intermediate frequency signal, and outputs the intermediate frequency signal; An image canceling mixer comprising: a phase synthesizer that synthesizes the intermediate frequency signal output from the second mixer circuit so that the signal components thereof are in phase. 2. In the image canceling mixer according to claim 1, the low-pass filter and the high-pass filter each use a junction capacitance of a diode as the capacitor constituting the filter, and the voltage applied to the cathode or anode of the diode is An image canceling mixer characterized in that by changing the value of the junction capacitance of the diode, the cutoff frequencies of the low-pass filter and the high-pass filter can be changed while remaining equal to each other. 3. A local oscillation circuit that generates a local oscillation signal, a low-pass filter that is composed of a resistor and a capacitor, and that inputs the local oscillation signal, and a voltage across the resistor that constitutes the low-pass filter. a first limiter amplifier that amplifies the output and limits it to a predetermined amplitude;
a second limiter amplifier that limits the amplitude to the same amplitude as that limited by the limiter amplifier, and mixes the output signal from the first limiter amplifier with the input high frequency signal and converts it into an intermediate frequency signal. a first mixer circuit that mixes the output signal from the second limiter amplifier with the input high frequency signal, converts it into an intermediate frequency signal, and outputs the intermediate frequency signal; a phase synthesizer that combines the intermediate frequency signal output from the first mixer circuit and the intermediate frequency signal output from the second mixer circuit so that their signal components are in phase. Image cancellation mixer. 4. The image cancel mixer according to claim 3, characterized in that a high pass filter consisting of a resistor and a capacitor is used in place of the low pass filter. 5. In the image canceling mixer according to claim 3 or 4, the low-pass filter or the high-pass filter uses a junction capacitance of a diode as a constituting capacitance, and the cathode or anode of the diode is An image canceling mixer characterized in that the cutoff frequency of the low-pass filter or the high-pass filter can be changed by changing the value of the junction capacitance of the diode by changing the applied voltage. 6. Local oscillation circuit that generates local oscillation signal, capacitance and F
It consists of a resistance between the drain and source of the ET, a low pass filter that inputs the local oscillation signal and shifts the phase of the local oscillation signal, and a capacitor and a resistance between the drain and source of the FET, a high-pass filter that has the same cutoff frequency as the low-pass filter and that inputs the local oscillation signal and shifts the phase of the local oscillation signal; a first limiter amplifier that limits the amplitude and outputs the signal; and a second limiter amplifier that amplifies the output signal from the high-pass filter and outputs the signal after limiting it to the same amplitude as the amplitude limited by the first limiter amplifier. a limiter amplifier, a first mixer circuit that mixes the output signal from the first limiter amplifier with the input high frequency signal, converts it into an intermediate frequency signal and outputs it, and mixes the input high frequency signal with the second A second circuit mixes the output signals from the limiter amplifiers, converts them into intermediate frequency signals, and outputs the intermediate frequency signals.
a mixer circuit, and a phase synthesizer that combines an intermediate frequency signal output from the first mixer circuit and an intermediate frequency signal output from the second mixer circuit such that their signal components are in phase. , a phase comparator that compares the phase of the output signal from the first limiter amplifier and the phase of the output signal from the second limiter amplifier and outputs a signal according to the phase difference; and the phase comparator The output signal from the first limiter amplifier is inputted, and the gate voltages of the FETs constituting the low-pass filter and the high-pass filter are changed according to the output signal, and the output signal from the first limiter amplifier and the first limiter amplifier are changed. The drain of each FET is set so that the phase difference with the output signal from the limiter amplifier No. 2 is 90 degrees.
An image canceling mixer comprising: control means for controlling the value of resistance between sources. 7. Consists of a local oscillation circuit that generates a local oscillation signal, a resistor, and a junction capacitance of two diodes whose cathodes are connected to each other, and inputs the local oscillation signal and shifts the phase of the local oscillation signal. It consists of a low-pass filter, a resistor, and a junction capacitance of two diodes whose cathodes are connected to each other.The cutoff frequency of the low-pass filter is the same as that of the low-pass filter, and when the local oscillation signal is input, the local oscillation signal is a high-pass filter that shifts the phase; a first limiter amplifier that amplifies the output signal from the low-pass filter and limits it to a predetermined amplitude; and a first limiter amplifier that amplifies the output signal from the high-pass filter. A second limiter amplifier limits the amplitude to the same amplitude as that limited by the first limiter amplifier, and mixes the output signal from the first limiter amplifier with the input high frequency signal, a first mixer circuit that converts the signal into a frequency signal and outputs the signal; and a second mixer circuit that mixes the input high frequency signal with the output signal from the second limiter amplifier, converts it into an intermediate frequency signal, and outputs the signal. a phase synthesizer that combines the intermediate frequency signal output from the first mixer circuit and the intermediate frequency signal output from the second mixer circuit such that their signal components are in phase; a phase comparator that compares the phase of the output signal from the first limiter amplifier with the phase of the output signal from the second limiter amplifier and outputs a signal according to the phase difference; and an output from the phase comparator. input a signal, change the voltages of the connected cathodes of two diodes constituting the low-pass filter and the high-pass filter, respectively, according to the output signal, and output the output signal from the first limiter amplifier. and control means for controlling the value of the junction capacitance of each of the two diodes so that the phase difference between the output signal from the second limiter amplifier and the output signal from the second limiter amplifier is 90 degrees. .