JPH01303705A - Chip type inductor and mounting thereof - Google Patents
Chip type inductor and mounting thereofInfo
- Publication number
- JPH01303705A JPH01303705A JP13260188A JP13260188A JPH01303705A JP H01303705 A JPH01303705 A JP H01303705A JP 13260188 A JP13260188 A JP 13260188A JP 13260188 A JP13260188 A JP 13260188A JP H01303705 A JPH01303705 A JP H01303705A
- Authority
- JP
- Japan
- Prior art keywords
- conductive
- dielectric
- conductive surface
- chip
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
Landscapes
- Coils Or Transformers For Communication (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Control Of Motors That Do Not Use Commutators (AREA)
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野コ
本発明は、チップ形インダクタ及びその実装方法に関し
、特に自動車電話等の高周波モジュールに用いられる誘
電体共振器及び該誘電体共振器を基板に実装する方法に
関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a chip-type inductor and a method for mounting the same, and in particular to a dielectric resonator used in a high-frequency module such as a car phone, and a method for mounting the dielectric resonator on a substrate. Regarding how to implement.
[従来の技術]
第2図は従来のチップ形インダクタの実装状態図である
。[Prior Art] FIG. 2 is a diagram showing a state in which a conventional chip-type inductor is mounted.
同図において、1はチップ形インダクタとしての誘電体
共振器、2は誘電体、3は内部電極、4は外部電極、5
は屈曲したリード端子、6は基板、7は接続パターンで
ある。リード端子5は内部電極3の一端に接続されてお
り、このリード端子5の端部を基板6上の接続パターン
7に半田付けすることにより、誘電体共振器1が基板6
上に実装される。In the figure, 1 is a dielectric resonator as a chip inductor, 2 is a dielectric, 3 is an internal electrode, 4 is an external electrode, and 5
6 is a bent lead terminal, 6 is a substrate, and 7 is a connection pattern. The lead terminal 5 is connected to one end of the internal electrode 3, and by soldering the end of the lead terminal 5 to the connection pattern 7 on the substrate 6, the dielectric resonator 1 is connected to the substrate 6.
implemented on top.
また、実開昭60−25218号公報においては、リー
ド端子をコンデンサやコイル等の素子と直接接続し、接
続パターン7を省略して実装時の手間を簡素化すること
が提案されている。Furthermore, Japanese Utility Model Application Laid-Open No. 60-25218 proposes connecting lead terminals directly to elements such as capacitors and coils, omitting the connection pattern 7, and simplifying the effort at the time of mounting.
[発明が解決しようとする課題]
しかしながら、第2図及び実開昭60−25218号公
報による構成及びその実装方法にあっては、いずれも屈
曲したリード端子を誘電体共振器の中央から突出させて
その他端を接続パターンや他の回路素子と確実に半田付
けしなければならないため、実装工程の自動化が困難で
、手作業に頼っているのが現状である。[Problems to be Solved by the Invention] However, in the configuration and the mounting method shown in FIG. Since the other end must be reliably soldered to the connection pattern or other circuit elements, it is difficult to automate the mounting process, and the current situation is that it relies on manual work.
また、誘電体共振器を基板に実装する際に、リード端子
を使用して接続するので選択度Qが低下するという問題
点があった。Furthermore, when mounting the dielectric resonator on the substrate, lead terminals are used for connection, resulting in a problem that the selectivity Q is reduced.
本発明は、かかる事情に鑑みてなされたものであり、そ
の目的は、実装工程を自動化し得るチップ形インダクタ
及びその実装方法を提供するとともに、実装化による高
周波モジュールを、選択度Qの高いものにすることにあ
る。The present invention has been made in view of the above circumstances, and its purpose is to provide a chip-type inductor and its mounting method that can automate the mounting process, as well as to provide a high-frequency module by mounting with a high selectivity Q. It is to make it.
[課題を解決するための手段]
本発明は前記問題点を解決するために、第1の発明にお
いては、板状の誘電体の両面に導電面を形成したチップ
形インダクタにおいて、下面の導電面を分割して形成し
その一方の導電面を上面の導電面と導通状態に形成し、
前記分割した一方の導電面と他方の導電面とがインダク
タの両電極をなした。そして第2の発明においては、板
状の誘電体の両面に導電面を形成したチップ形インダク
タを基板に実装する方法において、下面の導電面を分割
しその一方の導電面を上面の導電面と導通状態に形成し
、基板における前記分割した各導電面との取付は対応位
置にそれぞれ接続パターンを設け、導電性接着材料を用
いて前記分割した各導電面と各接続パターンとをそれぞ
れ接続する実装方法とした。[Means for Solving the Problems] In order to solve the above-mentioned problems, the present invention provides a chip-type inductor in which conductive surfaces are formed on both sides of a plate-shaped dielectric. The conductive surface of one of the conductive surfaces is formed in a conductive state with the upper conductive surface,
One of the divided conductive surfaces and the other conductive surface formed both electrodes of the inductor. In the second invention, in a method of mounting a chip-type inductor in which conductive surfaces are formed on both sides of a plate-shaped dielectric material on a substrate, the lower conductive surface is divided and one of the conductive surfaces is used as the upper conductive surface. Mounting is performed by forming a conductive state in a conductive state, providing a connection pattern at a corresponding position to each of the divided conductive surfaces on the substrate, and connecting each of the divided conductive surfaces and each connection pattern using a conductive adhesive material. method.
[作 用]
第1の発明によれば、上面の導電面と下面の他方の導電
面とは誘電体を挾んで別体に形成されてこれら別体の各
導電面間でインダクタが構成され、そして下面の一方の
導電面は上面の導電面と導通状態であり、よってインダ
クタの両電極は下面の一方の導電面と他方の導電面とに
よって下面に配置される。[Function] According to the first invention, the upper conductive surface and the other lower conductive surface are formed separately with a dielectric interposed therebetween, and an inductor is configured between each of these separate conductive surfaces, One conductive surface on the lower surface is electrically connected to the conductive surface on the upper surface, and therefore both electrodes of the inductor are arranged on the lower surface by one conductive surface and the other conductive surface on the lower surface.
そして第2の発明によれば、第1の発明による両電極と
、基板における該両電極と対応位置に設けた各接続パタ
ーンとの間が導電性接着材料を用いて接続されて実装さ
れる。According to the second invention, the two electrodes according to the first invention and the respective connection patterns provided on the substrate at positions corresponding to the two electrodes are connected and mounted using a conductive adhesive material.
[実施例]
第1図は本発明の一実施例を示すチップ形インダクタの
実装状態図、第3図は第1図の誘電体共振器を斜め下方
からみた図である。[Embodiment] FIG. 1 is a diagram of a mounting state of a chip-type inductor showing an embodiment of the present invention, and FIG. 3 is a diagram of the dielectric resonator of FIG. 1 viewed obliquely from below.
第1図、第3図において、8はチップ形インダクタとし
ての誘電体共振器、9は誘電体共振器8の誘電体である
。10は誘電体9の表面に形成された回路形成側の電極
をなす導電面で、誘電体9の上面の導電面11と、各側
面の導電面12A。In FIGS. 1 and 3, 8 is a dielectric resonator as a chip-type inductor, and 9 is a dielectric of the dielectric resonator 8. In FIG. Reference numeral 10 denotes conductive surfaces forming electrodes on the circuit formation side formed on the surface of the dielectric 9, including a conductive surface 11 on the top surface of the dielectric 9 and conductive surfaces 12A on each side surface.
12Bと、下面の一方の各導電面13A、13Bよりな
り、これらはAg−P d合金等の印刷された金属膜に
より一体に形成されている。14は誘電体9の下面の他
方の導電面で、導電面10と同様の金属膜によって形成
され、一方の各導電面13Aと13Bとの中間位置にあ
って相互に電気的に隔離されていてアース側の電極をな
している。12B, and one of the lower conductive surfaces 13A and 13B, which are integrally formed of a printed metal film such as Ag-Pd alloy. Reference numeral 14 denotes the other conductive surface on the lower surface of the dielectric 9, which is formed of the same metal film as the conductive surface 10, and is located at an intermediate position between the conductive surfaces 13A and 13B, and is electrically isolated from each other. It forms the electrode on the ground side.
よって各電極をなした上面の導電面11と下面の他方の
導電面14との間に誘電体9を有してこれらはインダク
タを形成している。Therefore, a dielectric material 9 is provided between the upper conductive surface 11 and the other lower conductive surface 14 forming each electrode, and these form an inductor.
15は基板、16A 、 16Bは回路形成側の接続
パターン、17はアース側の接続パターンで、各接続パ
ターン16A、16B、17は、基板15上に誘導体共
振器8を取付ける場合の各電極をなす導電面13A、1
3B、14との取付は対応位置に形成されている。15 is a substrate, 16A and 16B are connection patterns on the circuit forming side, and 17 is a connection pattern on the ground side. Each connection pattern 16A, 16B, and 17 forms each electrode when the dielectric resonator 8 is mounted on the substrate 15. Conductive surface 13A, 1
3B and 14 are installed at corresponding positions.
実装に当っては、デイスペンサによって各接続パターン
16A、16B、17の上面に適量のりリーム半田等の
導電性接着材料を供給し、チップマウンタによって誘電
体共振器8を各接続パターン16A、16B、17に位
置合わせして搭載し、クリーム半田を熱溶融させて半田
付けする。第1図の実装状態の回路は高周波モジュール
を構成する。For mounting, a dispenser supplies an appropriate amount of conductive adhesive material such as glue ream solder to the upper surface of each connection pattern 16A, 16B, 17, and a chip mounter applies the dielectric resonator 8 to each connection pattern 16A, 16B, 17. Align and mount it, and solder it using cream solder. The circuit in the mounted state shown in FIG. 1 constitutes a high frequency module.
なお、第1図と第3図において、回路形成側の電極は下
面の一方の導電面13A、13Bと接続パターン16A
、16Bで示すように各2個所の接続部を設けているが
、回路構成に応じてそれぞれその片方のみで形成しても
よい。In addition, in FIGS. 1 and 3, the electrode on the circuit forming side is connected to one of the lower conductive surfaces 13A, 13B and the connection pattern 16A.
, 16B, each of which has two connection portions, may be formed with only one of the connection portions depending on the circuit configuration.
[発明の効果コ
以上説明したように本発明によれば、誘電体の下面に接
続用の各導電面を形成し、その一方の導電面を上面の導
電面と導通状態に形成したので、接続部が共に下部の接
続対応位置に配設されたチップ形インダクタとなる。そ
して下面の該各導電面と対向する接続パターンとの間を
導電性接着材料を用いて接続するようにしたので、その
実装工程が容易に自動化でき、また、電極と接続パター
ンが直接に接続されるようにしたので、その実装によっ
て選択度Qの高い高周波モジュールが得られる。[Effects of the Invention] As explained above, according to the present invention, each conductive surface for connection is formed on the lower surface of the dielectric, and one of the conductive surfaces is formed in a conductive state with the upper conductive surface. Both portions form a chip-type inductor disposed at the connection corresponding position at the bottom. Since each conductive surface on the bottom surface and the opposing connection pattern are connected using a conductive adhesive material, the mounting process can be easily automated, and the electrodes and the connection pattern are directly connected. By implementing this, a high frequency module with high selectivity Q can be obtained.
第1図は本発明の実施例を示すチップ形インダクタの実
装状態図、第2図は従来のチップ形インダクタの実装状
態図、第3図は第1図の誘電体共振器の斜視図である。
9・・・誘電体、11・・・上面の導電面、12A、1
2B・・・側面の導電面、13A、13B・・・下面の
一方の導電面、14・・・下面の他方の導電面、15・
・・基板、16A 、 16B・・・回路形成側の接
続パターン、17・・・アース側の接続パターン。
特許出願人 沖電気工業株式会社
代理人 弁理士 吉 1)精 孝FIG. 1 is a mounting state diagram of a chip-type inductor showing an embodiment of the present invention, FIG. 2 is a mounting state diagram of a conventional chip-type inductor, and FIG. 3 is a perspective view of the dielectric resonator of FIG. 1. . 9... Dielectric, 11... Upper conductive surface, 12A, 1
2B...Conductive surface on the side surface, 13A, 13B...One conductive surface on the bottom surface, 14...The other conductive surface on the bottom surface, 15.
... Board, 16A, 16B... Connection pattern on the circuit formation side, 17... Connection pattern on the ground side. Patent Applicant Oki Electric Industry Co., Ltd. Agent Patent Attorney Yoshi 1) Takashi Sei
Claims (3)
インダクタにおいて、 下面の導電面を分割して形成しその一方の導電面を上面
の導電面と導通状態に形成し、 前記分割した一方の導電面と他方の導電面とがインダク
タの両電極をなした ことを特徴とするチップ形インダクタ。(1) In a chip-type inductor in which conductive surfaces are formed on both sides of a plate-shaped dielectric material, the conductive surface on the lower surface is divided and formed, and one of the conductive surfaces is formed in a conductive state with the conductive surface on the upper surface, and the said division A chip-type inductor characterized in that one conductive surface and the other conductive surface constitute both electrodes of the inductor.
側面において導電面により上面の導電面と導通状態に形
成し、 他方の導電面は前記一方の各導電面相互の中間位置に形
成した ことを特徴とする請求項(1)記載のチップ形インダク
タ。(2) One conductive surface is divided into two parts, and each conductive surface is formed on both sides of the dielectric body to be electrically connected to the upper conductive surface, and the other conductive surface is placed at a midpoint between the two conductive surfaces. The chip-type inductor according to claim 1, characterized in that the chip-type inductor is formed.
インダクタを基板に実装する方法において、下面の導電
面を分割しその一方の導電面を上面の導電面と導通状態
に形成し、 基板における前記分割した各導電面との取付け対応位置
にそれぞれ接続パターンを設け、 導電性接着材料を用いて前記分割した各導電面と各接続
パターンとをそれぞれ接続する ことを特徴とするチップ形インダクタの実装方法。(3) In a method of mounting a chip-type inductor in which conductive surfaces are formed on both sides of a plate-shaped dielectric material on a substrate, the conductive surface on the lower surface is divided and one of the conductive surfaces is formed in a conductive state with the conductive surface on the upper surface. , a chip type characterized in that a connection pattern is provided at a mounting position corresponding to each of the divided conductive surfaces on the substrate, and each of the divided conductive surfaces and each connection pattern are respectively connected using a conductive adhesive material. How to implement an inductor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13260188A JPH01303705A (en) | 1988-06-01 | 1988-06-01 | Chip type inductor and mounting thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13260188A JPH01303705A (en) | 1988-06-01 | 1988-06-01 | Chip type inductor and mounting thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01303705A true JPH01303705A (en) | 1989-12-07 |
Family
ID=15085148
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13260188A Pending JPH01303705A (en) | 1988-06-01 | 1988-06-01 | Chip type inductor and mounting thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01303705A (en) |
-
1988
- 1988-06-01 JP JP13260188A patent/JPH01303705A/en active Pending
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