JPH01304738A - Semiconductor device package structure - Google Patents

Abstract

PURPOSE:To reduce the warpage to sealing resin by a method wherein the upper and lower parts of a semiconductor element are covered with the sealing resin and the thermal expansion coefficients of the upper part and the lower part are adjusted. CONSTITUTION:A metal foil 9 is bonded to the rear of a semiconductor element 1 with die-bonder 5. Then the semiconductor element 1 is placed in a mold and sealing resin 8 is cast to seal the semiconductor element 1 by surrounding the whole semiconductor element 1 with the sealing resin 8. If the mold is so designed as to have the thicknesses (t1) and (t2) equal to each other, the semiconductor element 1 can be placed at the center of a the package and, looking outward from the center of the package, the same structure can be provided around the semiconductor element 1, so that expansion and contraction of the sealing resin 8 caused by curing contraction and heat can be cancelled between the upper and lower parts. With this constitution, the warpage of the package can be avoided.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention relates to tape automated bonding (T
ape Automated Bonding TA
The present invention relates to a package structure of a semiconductor device using a semiconductor device (abbreviated as B).

Conventional technology Figures 5(a) and 5(b) show 'T'AB of a conventional semiconductor device.
Figure 6 is a side sectional view showing a conventional package structure.
) is a semiconductor element, (2) is a protruding electrode provided on the semiconductor element (1), (3) is a carrier tape, (3a) is a support tape for supporting the inner lead (4a),
(3b) is a bridge provided to support the support tape (3a), (3C) is the center device hole in which the semiconductor element (1) is housed, and (3d) is the outer lead (4).
(4) is a wiring pattern provided on the tape carrier (3); (4a) is an outer lead hole for providing b).
is an inner lead connected to a protruding electrode (2), (4
b) is an outer lead to be connected to a substrate such as a printed circuit board ceramic board; (4c) is a backside connection lead for electrically connecting the backside of the semiconductor element (1) via the metal cap (6); (5) is a tie bonding material using a brazing material such as solder or a conductive or non-conductive adhesive for bonding the semiconductor element (1) and the metal cap (6);
6) is a metal cap, (6a) is a protrusion provided to connect with the wiring pattern (4), and (7) is a solder etc. for bonding the rear connection lead (4C) and the protrusion (6a). The adhesive material (8) is a sealing resin for protecting the semiconductor element (1), which is a brazing material or a conductive adhesive.

Next, the operation will be explained. The inner lead (4a) is aligned with the protruding electrode (2) provided on the semiconductor element (1), and the inner lead (4a) is pressed against the protruding electrode (2) using a heated bonding tool (inner lead). The semiconductor element (1) is connected to the carrier tape (3) by lead bonding (ILB) (fifth
(See figure ■). Next, the bottom surface of the metal cap (6) and the back surface of the semiconductor element (1) are bonded together using a Guibond material (5). At this time, if the back side of the semiconductor element (1) has to be at the same potential as the front surface circuit, the back side connection lead (4) connected to the protruding electrode (2) necessary for this purpose.
C) and the flange part of the metal cap (6) using an adhesive (7).
). This adhesion can be achieved by providing a protrusion (6a) on the flange and adhering the back connection lead (4C) to it, as shown in Figure 6, or by providing a through hole in the support tape (3a) and gluing the back connection lead (4C) there. In some cases, a lead (4C) is provided in a protruding shape, and a metal cap (6) is bonded to this lead. Next, with the metal cap (6) connected to the carrier tape (3), the sealing resin (8) is placed by transfer molding or potting.
) to seal.

[Problem to be solved by the invention]

As described above, in the conventional package structure of semiconductor devices, the top and bottom surfaces of the semiconductor element were made of different materials, which caused differences in linear expansion coefficients and due to shrinkage during curing of the encapsulating resin. There were problems in that the sealing resin warped and a gap formed between the carrier tape and the metal cap.

Furthermore, due to the difference in linear expansion coefficient between the sealing resin and the metal cap due to temperature changes, cracking may occur at the bonded part between the two.
There was also the problem that stress was applied to the semiconductor element, which had an adverse effect.

This invention was made in order to solve the above-mentioned problems, and provides a semiconductor device that can eliminate warping of the encapsulating resin and also eliminate peeling due to the phenomenon of contraction and expansion of the encapsulating resin due to heat. The purpose is to obtain a package structure.

[Means to solve the problem]

The package structure of the semiconductor device according to the present invention eliminates the difference in expansion coefficient between the upper and lower sides by eliminating the metal cap and using metal foil or mesh metal instead, and by covering both the upper and lower surfaces of the semiconductor element with sealing resin. be.

[Effect]

In the semiconductor device package structure of the present invention, when the thickness of the package is divided into two equal parts, the linear expansion coefficients of the upper and lower sides are made close to each other, thereby reducing warpage of the sealing resin.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure is a side sectional view of a semiconductor device which is an embodiment of the present invention.
FIG. 2 is a top view (a
) and a side sectional view (6).

In the figure, (1) is a semiconductor element, (2) is a protruding electrode provided on the semiconductor element (1), (3) is a carrier tape, (3a) is a support tape that supports an inner lead (4a), and (3b) is a support tape that supports an inner lead (4a). ) is a bridge part that supports the support tape (3a), (3C) is a center device hole that accommodates the semiconductor element (1), (3d) is an outer lead hole for forming an outer lead (4b), (3 is a bridge part) Part (3b)
Among them, the gate bridging part is made wide to allow the resin to flow, (3f) is a through hole for allowing the sealing resin (8) to flow downward, and (4) is a metal foil made of copper, for example, formed by photolithography. (4a) is an inner lead for connecting with the protruding electrode (2), (4b) is an outer lead to be connected to a substrate such as a printed circuit board or ceramic board,
(4c) is a back surface connection lead for electrically connecting the back surface of the semiconductor element (1) via the metal foil (9);
) is a die-bonding material using a brazing material such as solder or a conductive or non-conductive adhesive to bond the metal foil (9) and the back side of the semiconductor element (1), and (7) is the die bonding material used to bond the metal foil (9) and the back side of the semiconductor element (1). An adhesive using a brazing material such as solder or a conductive adhesive to bond the connection lead (4C), (8) is a sealing resin to protect the semiconductor element (1), and (9) is a back side connection. For example, a metal foil such as a 35 μm thick copper foil (
9a) indicates the adhesive part of the metal foil (9) with the back side connection lead (4), and ◇0 indicates the position where the molding die hits during transfer molding.The arrow in Fig. 2 indicates the sealing resin. This shows the flow of (8).

Next, the operation will be explained. In addition, carrier tape (3
) and the connection of the semiconductor element (1) to the semiconductor element (1) are the same as those of the prior art, so the explanation will be omitted. Next, a metal foil (9) that is slightly wider (about 0.1 to 0.2 mm) than the width of the semiconductor element (1) is bonded to the back surface of the semiconductor element (1) using a die bonding material (5). At the same time, the back surface connection lead (4C) is also bonded using the adhesive (7). Here, the die-bonding material (5) and adhesive material (7) are cured by heat or the like. Next, it is placed in the mold α0 and the sealing resin (
8) to seal the semiconductor element (1). Here, if the width of the metal foil (9) is too wide than the width of the semiconductor element (1), the sealing resin (8) will pass through the through hole (3f).
Since the area when flowing to the lower surface of the metal foil (9) is narrowed, phenomena such as non-sealing occur. In addition, the size of the through hole (3f) is determined by the dimensions of the semiconductor element (1) and the support tape (
It is determined by the external shape of 3a), and there is no difference in any variety.

Therefore, the amount of sealing resin flowing to the lower surface of the metal foil (9) is determined by the plane connecting the edge of the metal foil (9) to the edge of the through hole (3f), and as a result of experiments, the width of the semiconductor element (1) +0.2
I got the result that no unsealed cases occurred until my friend. This is the flow line (arrow) of the sealing resin (8) shown in Figure 2.
As can be seen from the figure, the narrower the width of the metal foil (9), the better. On the other hand, if it is too narrow, there will be problems in terms of workability and strength. Further, according to this structure, the sealing resin (8) covers the entire semiconductor element (1), and the same structure as a wire bond type plastic package can be adopted. Moreover, tl and t! shown in FIG. By being able to set the same thickness of the sealing resin (8) using the mold 0Q, the semiconductor element (1) can be placed in the center of the package, and further,
The structure facing outward from the center of the package is the semiconductor element (1
), the sealing resin (8) cancels curing shrinkage and thermal expansion/shrinkage at the top and bottom, making it difficult for the package to warp (1).
There is no longer any stress that would have a negative impact on the According to this structure, the warpage of the package was suppressed to within 10 μm.

Furthermore, although the above embodiment describes the case where metal foil is used, a net-like metal may be used instead as shown in FIG. If this mesh metal is used, the width can be increased as shown in FIG. 3(b).

Further, although the shape of the hole is shown as a rhombus, it may be of any shape such as a round shape. However, the size of one hole is 0.3 m.
It is better to exceed d. Also, as shown in Figure 4, metal foil (9)
It is also possible to adopt a structure in which the carrier tape (3) and the carrier tape (3) are sandwiched in a mold (10) and sealed with resin.

〔Effect of the invention〕

As described above, according to the present invention, in the package structure of a semiconductor device, it is possible to cover the top and bottom of a semiconductor element with sealing resin to match the thermal expansion coefficients, and to bring the semiconductor element to the center of the package, so that the semiconductor element is centered in the thickness direction. Since the structure is symmetrical with respect to the line, warpage of the package can be reduced, and by covering the entire semiconductor element with the sealing resin, high reliability can be obtained such as improved moisture resistance.

[Brief explanation of the drawing]

FIG. 1 is a sectional side view showing a package structure of a semiconductor device according to an embodiment of the present invention, and FIGS. 3(a), 4(b) and 4 are sectional side views showing a package structure of a semiconductor device according to another embodiment of the present invention, and FIGS. 5 and 6 are sectional side views showing a conventional package structure. FIG. 2 is a front view and a cross-sectional side view. In the figure,
(1) is a semiconductor element, (3a) is a support tape, (4
C) is the back connection lead, (5) is the die bond material, (7
) indicates adhesive, (August) sealing resin, (9) indicates metal foil or mesh metal, and α0 indicates molding die. In the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] TAB semiconductor devices that require backside potential
1. A package structure for a semiconductor device, characterized in that, in the package structure using the above-mentioned method, the electrical conduction is made using metal foil or a metal mesh, and the entire semiconductor element is covered with a sealing resin.