JPH0579173B2 - - Google Patents

Info

Publication number
JPH0579173B2
JPH0579173B2 JP61194263A JP19426386A JPH0579173B2 JP H0579173 B2 JPH0579173 B2 JP H0579173B2 JP 61194263 A JP61194263 A JP 61194263A JP 19426386 A JP19426386 A JP 19426386A JP H0579173 B2 JPH0579173 B2 JP H0579173B2
Authority
JP
Japan
Prior art keywords
semiconductor element
mounting member
resin
bonding
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61194263A
Other languages
Japanese (ja)
Other versions
JPS6350049A (en
Inventor
Ryuichiro Mori
Tatsuhiko Akyama
Katsuyuki Fukutome
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP61194263A priority Critical patent/JPS6350049A/en
Priority to US07/085,769 priority patent/US4884124A/en
Publication of JPS6350049A publication Critical patent/JPS6350049A/en
Publication of JPH0579173B2 publication Critical patent/JPH0579173B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、樹脂封止型半導体装置に関し、さ
らに詳しくは、半導体素子、その載置部材および
封止樹脂相互の反り防止手段を講じた樹脂封止型
半導体装置の改良構造に係るものである。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a resin-sealed semiconductor device, and more particularly, to a resin-sealed semiconductor device, and more particularly, to a resin molded semiconductor device, a mounting member for the semiconductor element, and a resin molded with a means for preventing mutual warpage of the molding resin. This invention relates to an improved structure of a sealed semiconductor device.

〔従来の技術〕 従来例によるこの種の樹脂封止型半導体装置の
概要構成断面を第3図および第4図a,bに示
す。
[Prior Art] A schematic cross-section of a conventional resin-sealed semiconductor device of this type is shown in FIGS. 3 and 4a and 4b.

すなわち、まず第3図において、符号1は半導
体素子、2は同半導体素子1を封止する封止樹脂
であり、また、3は封止樹脂内から外部に取出さ
れたそれぞれの導電部材、4は前記半導体素子1
の各端子と各導電部材3とを電気的に接続する内
部リード線、5は前記半導体素子1を接合材6に
よつて、接合、載置している載置部材である。そ
してこゝでは、前記各導電部材3および載置部材
5の材料には、通常の場合、銅系合金が用いられ
る。
That is, first, in FIG. 3, reference numeral 1 is a semiconductor element, 2 is a sealing resin for sealing the semiconductor element 1, 3 is a respective conductive member taken out from inside the sealing resin, and 4 is a sealing resin for sealing the semiconductor element 1. is the semiconductor element 1
Internal lead wires 5 electrically connect each terminal and each conductive member 3, and reference numeral 5 denotes a mounting member on which the semiconductor element 1 is bonded and mounted using a bonding material 6. Here, the conductive members 3 and mounting members 5 are usually made of a copper alloy.

また、第4図a,bは、前記従来例装置での半
導体素子1と接合材6を介した載置部材5との接
合関係を示す平面図、縦断面図であつて、半導体
素子1は、その下面中央部を自身の大きさよりも
十分に小さな面積範囲内で、単一な平板形状をし
た載置部材5上に、接合材6を用いて適宜に接合
させたものである。
4a and 4b are a plan view and a vertical sectional view showing the bonding relationship between the semiconductor element 1 and the mounting member 5 via the bonding material 6 in the conventional device, in which the semiconductor element 1 is , the central part of its lower surface is appropriately bonded to a single plate-shaped mounting member 5 using a bonding material 6 within an area sufficiently smaller than its own size.

〔発明が解決しようとする問題点〕 しかしながら、前記のように構成された従来例
による樹脂封止型半導体装置においては、半導体
素子1が大型化した場合、その載置部材5に対す
る接合、載置態様のために、安定した接合面積を
得ることがはなはだ困難であつて、接合面積が小
さければ、折角、載置させた半導体素子1が、樹
脂封止以前に載置部材5上から脱落する惧れがあ
り、また、これとは反対に、接合面積が大きけれ
ば、半導体素子1での基材シリコンの熱膨張係数
(Si;3.5×10-61/℃)と、載置部材5の熱膨張
係数(銅系合金;約17×10-61/℃)とが、相互
に大きく異なるために、接合後の温度変化で、第
5図に見られるように、反りを生じて半導体素子
1の破壊を招くことがある。
[Problems to be Solved by the Invention] However, in the conventional resin-sealed semiconductor device configured as described above, when the semiconductor element 1 increases in size, it is difficult to bond and place the semiconductor element 1 on the mounting member 5. Due to the aspect, it is extremely difficult to obtain a stable bonding area, and if the bonding area is small, there is a risk that the mounted semiconductor element 1 may fall off from the mounting member 5 before resin sealing. On the other hand, if the bonding area is large, the thermal expansion coefficient of the base silicon (Si; 3.5×10 -6 1/°C) in the semiconductor element 1 and the heat of the mounting member 5 Since their expansion coefficients (copper alloy; approximately 17×10 -6 1/°C) are significantly different from each other, temperature changes after bonding cause warping and damage to the semiconductor element 1, as shown in Figure 5. may lead to destruction.

また一方、封止樹脂2についても、熱膨張係数
(例えば、エポキシ樹脂;約2〜5×10-51/℃)
が半導体素子1とは大きく異なつて、載置部材5
に近く、たとえ樹脂封止以前に半導体素子1に反
りを生じていなくても、通常の場合、封止樹脂2
と半導体素子1間の密着力に比較して、載置部材
5と封止樹脂2間の密着力が弱いために、先の第
3図従来例構成に見られるように、たとえ素子上
下部分の樹脂厚を相互に等しくさせてあつたとし
ても(同図中、t1=t3)、半導体素子1と封止樹
脂2とは、封止後の温度変化に伴なつて、同様に
反りを生ずることになる。なお、t2は半導体素子
1の厚さである。
On the other hand, the sealing resin 2 also has a thermal expansion coefficient (for example, epoxy resin; approximately 2 to 5 × 10 -5 1/°C)
is significantly different from the semiconductor element 1, and the mounting member 5
Even if there is no warpage in the semiconductor element 1 before resin encapsulation, in normal cases, the encapsulation resin 2
Since the adhesion between the mounting member 5 and the sealing resin 2 is weak compared to the adhesion between the mounting member 5 and the semiconductor element 1, as seen in the conventional configuration shown in FIG. Even if the resin thicknesses are made equal (t 1 = t 3 in the figure), the semiconductor element 1 and the encapsulating resin 2 will similarly warp as the temperature changes after encapsulation. will occur. Note that t 2 is the thickness of the semiconductor element 1.

そこで、第6図に示したように、半導体素子1
の上下部分での封止樹脂2の厚さを代えることに
よつて(同図中、t1<t3)、半導体素子1の反り
を一時的には抑制し得るものと考えられるが、同
時に封止樹脂2の反りをも解消するのは困難であ
る。
Therefore, as shown in FIG.
It is thought that warping of the semiconductor element 1 can be temporarily suppressed by changing the thickness of the sealing resin 2 in the upper and lower parts (t 1 < t 3 in the figure), but at the same time It is also difficult to eliminate warpage of the sealing resin 2.

すなわち、このように従来例による装置構成の
場合には、特に半導体素子が大型化すると、温度
変化に伴なう反りの発生により、この半導体素子
自体、あるいは封止樹脂が破壊されるに至ると云
う問題点があつた。
In other words, in the case of the conventional device configuration as described above, especially when the semiconductor element becomes large, warping due to temperature changes can lead to destruction of the semiconductor element itself or the sealing resin. There was a problem.

この発明は、従来のこのような問題点を解消す
るためになされたもので、その目的とするところ
は、半導体素子、その載置部材および封止樹脂相
互の接合に伴なう反り、ならびに樹脂封止後の半
導体素子と封止樹脂の反りを、それぞれに併せて
抑制し得るようにした、この種の樹脂封止型半導
体装置を提供することである。
This invention was made in order to solve these conventional problems, and its purpose is to prevent warping caused by mutual bonding of a semiconductor element, its mounting member, and a sealing resin, and to prevent the resin from warping. It is an object of the present invention to provide a resin-sealed semiconductor device of this kind, which can suppress warpage of a semiconductor element and a sealing resin after being sealed.

〔問題点を解決するための手段〕[Means for solving problems]

前記目的を達成するために、この発明に係る樹
脂封止型半導体装置は、載置部材の中央部に、半
導体素子をこの半導体素子自身の大きさより小さ
な面積範囲内で接合させるためのその接合面積、
形状に対応した面積、形状の接合部を、この載置
部材の中央部を周囲から幅狭な連接部を残して分
離させることによつて形成し、この載置部材にお
ける前記接合部の周囲に位置する非接合部に、表
裏を貫通する貫通孔を複数穿孔させたものであ
る。
In order to achieve the above object, the resin-sealed semiconductor device according to the present invention has a bonding area in the center of the mounting member for bonding the semiconductor element within an area smaller than the size of the semiconductor element itself. ,
A joint with an area and shape corresponding to the shape is formed by separating the central part of this mounting member from the surroundings leaving a narrow connecting part, and forming a joint around the joint in this mounting member. A plurality of through holes penetrating the front and back sides are formed in the non-jointed portion.

〔作用〕[Effect]

すなわち、この発明においては、半導体素子の
下面中央部を、自身の大きさよりも十分に小さな
面積範囲内で接合させるための、同接合面積、形
状に対応した面積、形状の接合部を、載置部材上
に一部連接状態で分離形成させることにより、大
型化した半導体素子と載置部材間の接合面積を一
定にでき、また、載置部材の非接合部に複数の貫
通孔を穿孔させ、かつこれらを封止樹脂で一体的
に樹脂封止させることにより、載置部材の接合部
を除いた非接合部と半導体素子間、ならびに各貫
通孔内への樹脂充填をなし得るのである。
In other words, in the present invention, in order to bond the central portion of the lower surface of the semiconductor element within an area range that is sufficiently smaller than the size of the semiconductor element, a bonding portion having an area and shape corresponding to the bonding area and shape is placed. By separately forming parts on the member in a connected state, the bonding area between the enlarged semiconductor element and the mounting member can be made constant, and a plurality of through holes are bored in the non-bonded portion of the mounting member, By integrally sealing these with a sealing resin, resin can be filled between the semiconductor element and the non-bonded portion of the mounting member excluding the bonded portion, as well as into each through-hole.

〔実施例〕〔Example〕

以下、この発明に係る樹脂封止型半導体装置の
一実施例につき、第1図および第2図を参照して
詳細に説明する。
Hereinafter, one embodiment of a resin-sealed semiconductor device according to the present invention will be described in detail with reference to FIGS. 1 and 2.

第1図はこの実施例を適用した樹脂封止型半導
体装置の概要構成を示す縦断面図、第2図は同上
載置部材の平面図であり、これらの実施例各図に
おいて、前記第3図従来例構成と同一符号は同一
または相当部分を示している。
FIG. 1 is a vertical cross-sectional view showing the general structure of a resin-sealed semiconductor device to which this embodiment is applied, and FIG. 2 is a plan view of the same mounting member. The same reference numerals as those in the conventional structure in the figure indicate the same or corresponding parts.

この実施例構成においては、前記載置部材5に
あつて、前記半導体素子1の下面中央部を、自身
の大きさよりも十分に小さな面積範囲1a内で接
合させるための、その接合面積および形状に対応
した面積、形状の接合部5aを、適宜に各連接部
5cを一部に残して、残余の非接合部5bから分
離させると共に、この非接合部5bには、表裏を
貫通する複数の貫通孔5dを穿孔させたものであ
る。すなわち、前記接合部5aは載置部材5の中
央部に位置づけられ、第2図において左右に位置
する幅狭な連接部5cを介して周囲の非接合部5
bに連結されている。
In this embodiment configuration, the mounting member 5 has a bonding area and a shape for bonding the central portion of the lower surface of the semiconductor element 1 within an area range 1a that is sufficiently smaller than its own size. The joint parts 5a having the corresponding area and shape are separated from the remaining non-joint parts 5b, leaving each joint part 5c in a part, and the non-joint parts 5b have a plurality of through holes penetrating the front and back sides. A hole 5d is drilled therein. That is, the joint portion 5a is located at the center of the mounting member 5, and is connected to the surrounding non-joint portions 5 through the narrow connecting portions 5c located on the left and right sides in FIG.
connected to b.

しかして、前記のように形成した接合部材5を
用い、その接合部5a上に、半導体素子1の下面
中央部での所定の面積範囲1aを、接合材6によ
り接合、載置させるときは、半導体素子と載置部
材間の接合面積を、例えば、それぞれの大きさな
どに対応して、相対的には常に一定にできること
になり、これによつて接合に伴なう半導体素子の
反りを効果的に抑制し得るのである。
Therefore, when using the bonding member 5 formed as described above and bonding and placing a predetermined area 1a at the center of the lower surface of the semiconductor element 1 on the bonding portion 5a using the bonding material 6, This means that the bonding area between the semiconductor device and the mounting member can always be kept relatively constant, depending on the size of each component, for example, and this can effectively reduce the warping of the semiconductor device that occurs during bonding. Therefore, it can be suppressed.

また、前記半導体素子1と載置部材5とを、こ
のように接合、載置させた状態で、これらの両者
を、封止樹脂2により所定通りに樹脂封止させる
ときは、載置部材5の接合部5aを除いた残余の
非接合部5bと半導体素子1間、ならびに各貫通
孔5d内に十分な樹脂充填をなし得ることにな
り、特にそれぞれの貫通孔5d部分では、封止樹
脂2の絡み付きによつて、強固な結合がなされる
もので、このため機械的に載置部材5の各部と封
止樹脂2との密着力を十分に増加でき、同様に反
りに対する抑制効果を十分に発揮し得るのであ
る。
Furthermore, when the semiconductor element 1 and the mounting member 5 are bonded and mounted in this manner and are sealed with the sealing resin 2 in a predetermined manner, the mounting member 5 is This means that sufficient resin can be filled between the remaining non-bonded portion 5b excluding the bonded portion 5a and the semiconductor element 1, as well as in each through-hole 5d. A strong bond is formed by the entanglement of the sealing resin 2 and the sealing resin 2. Therefore, the adhesion force between each part of the mounting member 5 and the sealing resin 2 can be sufficiently increased, and the effect of suppressing warping can also be sufficiently increased. It can be demonstrated.

そしてまた、一般に前記載置部材5が銅系合金
材料であつて、封止樹脂2との熱膨張係数が近似
していることから、前記半導体素子1での上下部
分の樹脂厚がほゞ等しく(第1図中、t1=t3)な
るようにするときは、同各部での熱膨張を均衡さ
せ得て、樹脂封止後におけるこれらの半導体素子
1と封止樹脂2との相互の反りをも抑制できるこ
とになる。
Furthermore, since the mounting member 5 is generally made of a copper-based alloy material and has a thermal expansion coefficient similar to that of the sealing resin 2, the resin thicknesses of the upper and lower portions of the semiconductor element 1 are approximately equal. (t 1 = t 3 in Figure 1), it is possible to balance the thermal expansion in each part, and to reduce the mutual interaction between the semiconductor element 1 and the encapsulating resin 2 after resin encapsulation. This means that warping can also be suppressed.

すなわち、このようにして、この実施例構成の
場合には、実質的に半導体素子1、その載置部材
5および封止樹脂2の各相互間での反りを、良好
かつ効果的に防止できるのである。
That is, in this way, in the case of the configuration of this embodiment, it is possible to effectively and effectively prevent warping between the semiconductor element 1, its mounting member 5, and the sealing resin 2. be.

〔発明の効果〕〔Effect of the invention〕

以上詳述したように、この発明によれば、載置
部材の中央部に、半導体素子をこの半導体素子自
身の大きさより小さな面積範囲内で接合させるた
めのその接合面積、形状に対応した面積、形状の
接合部を、この載置部材の中央部を周囲から幅狭
な連接部を残して分離させることによつて形成し
たので、半導体素子と載置部材間の接合面積を、
相対的に常に一定にできて、接合に伴なう半導体
素子の反りを効果的に抑制させることができる。
As described in detail above, according to the present invention, an area corresponding to the bonding area and shape of the semiconductor element for bonding the semiconductor element within an area smaller than the size of the semiconductor element itself is placed in the central part of the mounting member. The joint area between the semiconductor element and the mounting member was formed by separating the central part of the mounting member from the periphery leaving a narrow joint, so the joint area between the semiconductor element and the mounting member was
It can be kept relatively constant at all times, and warpage of the semiconductor element due to bonding can be effectively suppressed.

また、載置部材の非接合部には、複数の貫通孔
を穿孔させたゝめに、これらの各貫通孔の存在に
より、樹脂封止時での溶融樹脂の流れが円滑化さ
れ、その結果、載置部材の接合部を除いた非接合
部と半導体素子間の隙間、それに各貫通孔内への
樹脂充填が完全かつ確実になされて、密着力の向
上を図り得ると共に、特にそれぞれの貫通孔部分
では、封止樹脂の絡み付きにより、強固な結合が
なされて、各部材相互の一体化、ひいては反り防
止を容易に達成でき、しかも構造的にも極めて簡
単で、容易かつ安価に実施し得るなどの優れた特
徴を有するものである。
In addition, since multiple through holes are drilled in the non-bonded part of the mounting member, the presence of each of these through holes facilitates the flow of molten resin during resin sealing, and as a result, , the gap between the non-bonded part of the mounting member excluding the bonded part and the semiconductor element, and the resin filling into each through hole are completely and reliably filled, and it is possible to improve the adhesion strength, and especially to improve the adhesive strength of each through hole. In the hole part, a strong bond is formed by entangling the sealing resin, making it easy to integrate each member with each other and prevent warping. Moreover, it is extremely simple in structure and can be implemented easily and inexpensively. It has excellent characteristics such as:

加えて、封止樹脂が載置部材の貫通孔に流入し
て半導体素子と非接合部との間に充填されること
に起因して、封止樹脂を載置部材に機械的に拘束
できるから、下記の効果が得られる。
In addition, the sealing resin flows into the through hole of the mounting member and is filled between the semiconductor element and the non-bonded portion, so that the sealing resin can be mechanically restrained by the mounting member. , the following effects can be obtained.

一般に、載置部材に半導体素子を半田で接合す
るに当たつては、半導体素子の裏面に金がメタラ
イズされている。そして、載置部材に半導体素子
を接合させるのであるが、接合部の面積を半導体
素子の面積より小さくしているので、半導体素子
の裏面に接合されない部分が多く残存する。この
残存した部分には、当然金がメタライズされてい
る。封止樹脂と金とは接着性が低いため、載置部
材に半導体素子を接合させた後に封止樹脂により
パツケージングすると、半導体素子の裏面と封止
樹脂との接着部分が剥がれ易くなる。そして、パ
ツケージングが終了したこの半導体装置を半田に
より基板に実装させる際に封止樹脂に熱が加えら
れると、封止樹脂中に吸湿されている水分が水蒸
気に変化し、その際の水分の体積膨張および封止
樹脂と半導体素子との熱膨張率の相違により、封
止樹脂と金との接着面が剥がれると共に、封止樹
脂における半導体素子の角部と対応する部分から
クラツクが発生することがある。この現象はパツ
ケージクラツクと呼ばれており、できるだけ防止
しなければならないものである。
Generally, when a semiconductor element is bonded to a mounting member by soldering, gold is metallized on the back surface of the semiconductor element. The semiconductor element is then bonded to the mounting member, but since the area of the bonding portion is made smaller than the area of the semiconductor element, a large portion that is not bonded remains on the back surface of the semiconductor element. This remaining part is naturally metallized with gold. Since the adhesiveness between the sealing resin and gold is low, if the semiconductor element is bonded to the mounting member and then packaged with the sealing resin, the bonded portion between the back surface of the semiconductor element and the sealing resin tends to peel off. When this semiconductor device, which has been packaged, is mounted on a board by soldering, heat is applied to the encapsulating resin, and the moisture absorbed in the encapsulating resin changes to water vapor. Due to the volumetric expansion and the difference in thermal expansion coefficient between the sealing resin and the semiconductor element, the adhesive surface between the sealing resin and the gold may peel off, and cracks may occur at the portions of the sealing resin that correspond to the corners of the semiconductor element. There is. This phenomenon is called a package crack, and must be prevented as much as possible.

本発明に係る半導体装置では、上述したように
封止樹脂を載置部材に機械的に拘束できるから、
上述したパツケージクラツクをも防ぐことができ
る。すなわち、半導体装置の信頼性を高めること
ができる。
In the semiconductor device according to the present invention, since the sealing resin can be mechanically restrained to the mounting member as described above,
The above-mentioned package crack can also be prevented. That is, the reliability of the semiconductor device can be improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明に係る樹脂封止型半導体装置
の一実施例による概要構成を示す縦断面図、第2
図は同上載置部材の平面図であり、また第3図は
従来例による同上半導体装置の概要構成を示す縦
断面図、第4図a,bは同上半導体素子と載置部
材との接合関係を示す平面図、縦断面図、第5図
および第6図は同上従来例での反りの状態および
その対応構造をそれぞれに示す断面説明図であ
る。 1……半導体素子、1a……接合面積範囲、2
……封止樹脂、3……導電部材、4……内部リー
ド線、5……載置部材、5a……接合部、5b…
…非接合部、5c……連接部、5d……貫通孔、
6……接合材。
FIG. 1 is a longitudinal cross-sectional view showing a schematic configuration of an embodiment of a resin-sealed semiconductor device according to the present invention, and FIG.
The figure is a plan view of the mounting member, FIG. 3 is a longitudinal sectional view showing the general structure of the conventional semiconductor device, and FIGS. 4a and 4b are the bonding relationships between the semiconductor element and the mounting member. A plan view, a vertical cross-sectional view, and FIGS. 5 and 6 are explanatory cross-sectional views each showing the state of warpage and the corresponding structure in the conventional example. 1... Semiconductor element, 1a... Junction area range, 2
... Sealing resin, 3 ... Conductive member, 4 ... Internal lead wire, 5 ... Placement member, 5a ... Joint portion, 5b ...
...Non-joint part, 5c...Connection part, 5d...Through hole,
6... Bonding material.

Claims (1)

【特許請求の範囲】[Claims] 1 半導体素子の下面中央部を、載置部材上に接
合材により接合、載置させ、これらの半導体素
子、および載置部材のそれぞれを樹脂封止して構
成する樹脂封止型半導体装置において、前記載置
部材の中央部に、半導体素子をこの半導体素子自
身の大きさより小さな面積範囲内で接合させるた
めのその接合面積、形状に対応した面積、形状の
接合部を、この載置部材の中央部を周囲から幅狭
な連接部を残して分離させることによつて形成
し、この載置部材における前記接合部の周囲に位
置する非接合部に、表裏を貫通する貫通孔を複数
穿孔させたことを特徴とする樹脂封止型半導体装
置。
1. In a resin-sealed semiconductor device in which the central part of the lower surface of a semiconductor element is bonded and placed on a mounting member using a bonding material, and each of these semiconductor elements and the mounting member is sealed with resin, At the center of the mounting member, a bonding portion having an area and shape corresponding to the bonding area and shape of the semiconductor element for bonding the semiconductor element within an area smaller than the size of the semiconductor element itself is placed in the center of the mounting member. A plurality of through holes penetrating the front and back sides are formed in the non-joint part of the mounting member located around the joint part. A resin-sealed semiconductor device characterized by:
JP61194263A 1986-08-19 1986-08-19 Resin sealed type semiconductor device Granted JPS6350049A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP61194263A JPS6350049A (en) 1986-08-19 1986-08-19 Resin sealed type semiconductor device
US07/085,769 US4884124A (en) 1986-08-19 1987-08-17 Resin-encapsulated semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61194263A JPS6350049A (en) 1986-08-19 1986-08-19 Resin sealed type semiconductor device

Publications (2)

Publication Number Publication Date
JPS6350049A JPS6350049A (en) 1988-03-02
JPH0579173B2 true JPH0579173B2 (en) 1993-11-01

Family

ID=16321718

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61194263A Granted JPS6350049A (en) 1986-08-19 1986-08-19 Resin sealed type semiconductor device

Country Status (1)

Country Link
JP (1) JPS6350049A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19639181B4 (en) * 1996-09-24 2006-08-17 Infineon Technologies Ag Microelectronic component with a lead frame and an integrated circuit
JP3610787B2 (en) * 1998-03-24 2005-01-19 セイコーエプソン株式会社 Semiconductor chip mounting structure, liquid crystal device and electronic apparatus

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5295173A (en) * 1976-02-06 1977-08-10 Hitachi Ltd Lead frame
JPS554983A (en) * 1978-06-27 1980-01-14 Nec Kyushu Ltd Lead frame for semiconductor device
JPS56161356U (en) * 1980-04-28 1981-12-01

Also Published As

Publication number Publication date
JPS6350049A (en) 1988-03-02

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