JPH01311616A - Contact reading circuit - Google Patents

Abstract

PURPOSE:To reduce power consumption and to accelerate response speed by impressing a pulsative voltage on each contact at every group with a prescribed cycle time divisionally. CONSTITUTION:A pulse signal is outputted from a clock signal generation circuit 21 with the prescribed cycle as a clock signal 1c, and the pulsative voltage is impressed on each contact of plural groups having plural contacts 40-45 at every group with the prescribed cycle time divisionally via resistors 9-14 and diodes 3-8. And the voltages of capacitors 22-27 in a filter circuit consisting of resistors 15-20 and capacitors 22-27 connected to the contacts 40-45 are compared with a reference voltage Vs by comparators 28-33, and the turn-on and turn-off state of each contact is discriminated, and the output of the comparators 28-33 are selected and read at every group by selection signals 1s and 2s. In such a way, it is possible to reduce the power consumption and to accelerate the response speed.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a contact reading circuit that reads information on the on/off state of external contacts, and is particularly suitable for application when there are a large number of contacts. Regarding.

[Conventional technology]

In the conventional contact reading circuit of this type, as shown in the first example of FIG. A voltage element (■) is applied to the contact point 40, and a comparator 28 determines whether the applied point 40 is at a low level or a high level through a filter circuit consisting of a resistor 15 and a capacitor 22.
Information on the contact point 40 was taken in from the output via the AND gate 34 in response to the selection signal 1s. However, in this conventional example, since current always flows through the resistor 9 when the contact 40 is on, there is a problem in that if there are a large number of contacts 40 to 45, a large amount of power is consumed overall.

On the other hand, a contact reading circuit that eliminates the above problems first outputs a selection signal corresponding to the contact to be captured, and if it is contact 40, outputs a selection signal IS, as shown in the second example of Fig. 5. Then, the photocoupler 46 is turned on by turning on the transistor 58 and the photocoupler 49, which is then judged by the comparator 28 through the filter circuit consisting of the resistor 15 and the capacitor 22, and the selection signal 1s from the output is sent to the AND gate 34 The information on the contact point 40 was taken out through the . However, in this conventional example, it takes time to change the information on the contact 40 after outputting the selection signal 1s, and furthermore, the voltage from the power supply 60 is applied only once to the contact 40 when the selection signal 1s is output. Therefore, there is a problem that depending on the surface condition of the contact 40, there is a possibility of poor contact.

Related devices of this type include, for example, Japanese Patent Laid-Open Publication No. 50-36030 and the report on the current status of process interfaces published by the Japan Electronics Industry Promotion Association.
1971, 3 birds), page 166.

[Problem to be solved by the invention]

The above-mentioned conventional technology has advantages and disadvantages, especially when the number of contacts increases, the speed from issuing a selection signal to retrieving contact information is fast but consumes a lot of power, or the power consumption is low but the speed of retrieving contact information is slow. There was a problem with the characteristics of

An object of the present invention is to provide a contact reading circuit that consumes less power and has a faster response speed from outputting a selection signal to obtaining contact information, especially when there are a large number of contacts.

[Means to solve the problem]

The above purpose is to provide a circuit that applies a pulsed voltage in a time-sharing manner at a predetermined period to each contact of a plurality of groups having a plurality of contacts via a resistor and a diode for each group,
The voltage of the capacitor of the filter circuit consisting of a resistor and capacitor connected to each contact is compared with the reference voltage by a comparator to determine the on/off state of each contact, and the output of the comparator is determined by the selection signal for each group. This is achieved by a selective reading circuit.

[Effect]

Since the above contact reading circuit applies a pulsed voltage to each contact in a time-sharing manner at a predetermined period for each group, the power consumption due to voltage application to the contacts is only the application time. Set the non-applying time ratio to 7 as 25%.
If it is set to 5%, power consumption can be reduced to 1/4, and since the on/off state of each contact is stored in the capacitor when the voltage is applied, the voltage of the capacitor changes depending on whether the voltage is high or low. The state of the contact is determined by a comparator, and the contact information can be read at a high response speed using a selection signal from a host processing device without slowing down due to delays in the operation of circuit elements or filter circuits.

〔Example〕

Embodiments of the present invention will be described below with reference to FIGS. 1 to 3.

FIG. 1 is a circuit diagram showing a first embodiment of a contact reading circuit according to the present invention. In FIG. 1, 1°2 is a transistor, 3-8 are diodes, 9-20 are resistors, 21 is a clock signal generation circuit, 22-27 are capacitors, 28-20 are resistors, 22-27 are capacitors,
33 is a comparator, 34 to 39 are AND gates, 40
45 is a contact, 62.63 is a resistor. For example, one terminal of the contact 40 of the plurality of groups of contacts in FIG. and the inverting input of comparator 28. The anode of the diode 3 is connected to the collector of the transistor 1, the emitter of the transistor 1 is connected to the contact application power supply +V, and the base is connected to the first output of the clock signal generation circuit 21 via the resistor 62. Connected. The non-inverting input of the comparator 28 is connected to the reference voltage Vs, and its output terminal is connected to one input terminal of the AND gate 34. The other input terminal of the AND gate 34 is connected to the selection signal 1s, and its output terminal is connected to the data bus. The other terminal of the contact 40 and the other terminal of the capacitor 22 are connected to ground. Now, the above is contact 40
The connection of the contact reading circuit corresponding to
A similar circuit contact point is provided for 5, etc. Furthermore, when importing information such as these many contact points 41 to 45, it is more convenient to collect several points, so it is divided into groups, and these groups are used as one word, two words, etc.
・, 4 words, etc., and the points of contact 40-42, 43-45, etc. in each word are 1 point,
2 points, ..., n points.

The selection signals is, 2s, etc. are signals for selecting 1 word, 2 words, etc., and the 1st, 2nd, etc. outputs of the clock signal generation circuit 21 are output to give timing for each 1 word, 2 words, etc. This is the configuration that will be used.

FIG. 2 is a timing chart showing the operation of FIG. 1. The circuit operation in the above configuration will be explained with reference to FIG. First, the clock signal generating circuit 21 outputs pulses at a constant period, as shown in the first output clock signal 1c in FIG. Then, the transistor 1 is turned on when the pulse of the clock signal 1c is at a low level, and turned off when it is at a high level. Now, in such a state, for example, if the contact 40 is first turned off as shown in FIG. 2, then the clock signal generator 21 first outputs a low-level pulse of the clock signal 1c as shown in FIG. , since the base current flows through the transistor 1 via the resistor 62, the transistor 1 is turned on. As a result, a charging current TUt flows through the diode 3, the resistor 9, and the resistor 15 to the capacitor 22, which forms a filter circuit together with the resistor 15.
The potential of the inverting input of 8 continues to rise. Then, when the clock signal 1c changes to a high level, the transistor 1 is turned off, so that charging of the capacitor 22 is stopped.

Now, looking at the potential of the capacitor 22 in this state, since the contact 40 is off, no current flows, and since the diode 3 is in the opposite direction from the capacitor 22 to the collector of the transistor 1, there is no reverse current. . Furthermore, by using a high impedance inverting input of the comparator 28, the current flowing therein can be made so small as to be almost negligible. When the -tan capacitor 22 is charged in this way, its potential is held even if the clock signal 1c disappears (even if it becomes high level). Furthermore, even if there is an accidental discharge, the transistor 1 is turned on again at the next pulse (low level) of the clock signal 1c output after a certain period and is supplementally charged. The inverting input remains at high level. Therefore, the comparator 28 compares the potential of the capacitor 22 with the reference voltage Vs, and since the potential of the capacitor 22 is greater, the output of the comparator 28 becomes a low level as shown in FIG.

Here, the reference voltage Vs is set to an intermediate value between the high level (power supply +V) and the low level (earth potential) of the potential of the capacitor 22.

Next, assume that the contact 40 is turned on as shown in FIG.

Then, the charge in the capacitor 22 is transferred to the resistor 15 and the contact 4.
2, the potential of the capacitor 22, that is, the potential of the inverting input of the comparator 28, decreases by the time constant of the capacitor 22 and the resistor 15, as shown in FIG. 2, and then reaches the ground potential. Then, the output of the comparator 28 becomes the second
The level becomes high as shown in the figure. At this time, even if the pulse of the clock signal IC of the clock signal generation circuit 21 becomes low level and turns on the transistor 1, as long as the contact 40 is on, the potential of the capacitor 22 remains at the ground potential (
○V), so the output of the comparator 28 continues to output a high level. Assume that the contact 40 is then turned off as shown in FIG. However, when the clock signal 1c is off, the potential of the capacitor 22 is Ov when the pulse of the clock signal 1c is at a high level, but when the next output clock signal 1c is at a low level, the transistor 1 is turned on and a charging current flows. Therefore, the potential of the capacitor 22, that is, the potential of the inverting input of the comparator 28, increases as shown in FIG. By setting the pulse period of the clock signal 1c to be sufficiently shorter than the on/off period of the contact 40, the state of the contact 4o is always outputted from the output of the comparator 28, and the state of the contact 40 is always outputted. Can read all information. The above was an operation for the 1 point contact 40 of 1 word, but 2 to 2 of 1 word
The operations for the n-point contacts 41-42 are completely similar. Also 2-4 words 1-n point contact 43-
1 of the clock signal generation circuit 21.
~ By outputting pulses such as the clock signals 1c to 40 of the fourth output in a time-division manner at a constant cycle as shown in Fig. 2, the outputs of the comparators 31 to 33, etc. are always connected to the contacts 43 to 45, etc. The status of is output. In this way, the contacts of 1 to n points of 1 to 4 words 40 to 42.43
The contact information obtained as the output of the comparators 28-: 1O, 31-33, etc. of ~45 is sent via AND gates 34-36, 37-39, etc. by the selection signals 18-23 output from the host computer, etc. placed on the data bus. Note that the filter circuit consisting of the resistor 15 and capacitor 22 can serve as a filter for removing noise mixed into the input by appropriately setting their values.

FIG. 3 is a circuit diagram showing a second embodiment of the contact reading circuit according to the present invention. In FIG. 3, the same symbols as in FIG. 1 indicate corresponding parts, 46 to 53 are photocouplers, 54 to
57 is a resistor, 58.59 is a transistor, 60.6
1 is a power supply, 64.65 is an inverter, and 66 to 71 are resistors. The difference between Fig. 3 and Fig. 1 is the external contact 40~
45 etc. and the internal contact reading circuit.
By adding circuits centered around 6 to 53, a configuration is achieved in which external contacts 40 to 45 and the like and the contact reading circuit are insulated. This photo coupler 46-49.5
0 to 53 drive the transistors 58 and 59 from each output of the clock signal generation circuit 21 via the inverter 64 and 65, respectively, and the transistors 1 and 2 and the photocouplers 46 to 49 and 50 to 5
3 can be turned on and off at the same time, so that the contacts 40 to 42 and 43 to 45 operate in the same manner as the embodiment shown in FIG. The embodiment shown in FIG. 3 has the same functions and effects as the embodiment shown in FIG.

In the above embodiment, contact information is stored using a capacitor, but a register may also be provided.

〔Effect of the invention〕

According to the present invention, since the voltage is applied to the contacts in a time-sharing manner, the power consumption can be reduced to 1/4 in proportion to the duty ratio of the clock, for example, if the duty ratio is 25%. Since the contact information always reaches the input of the AND gate, which is the final stage of the circuit, the time required from issuing the selection signal until the data is transferred to the data bus is extremely short. Since many pulses of voltage are applied in the same manner, contact reliability can be improved compared to the case where data is read with one pulse of the selection signal.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a first embodiment of a contact reading circuit according to the present invention, FIG. 2 is a timing chart of FIG. 1, and FIG.
4 is a circuit diagram showing a first example of a conventional contact reading circuit, and FIG. 5 is a circuit diagram showing a second example of the conventional contact reading circuit. 1.2...transistor, 3-8...diode,
9-20...Resistor, 21...Clock signal generation circuit, 22-27...Capacitor, 28-33...Comparator, 34-39...And gate, 40-4
5... Contact, 46-43... Photocoupler, 54
~57...Resistor, 58.59...Transistor,
60.61...Power supply, 62.63...Resistance, 64.
65...Inverter, 66-71...Resistor. Representative Patent Attorney Tadashi Akimoto Actual Survey 2 Diagram ``Sword Rei 93I-CR) Honka 4-53 Photocoupler Assembled Figure

Claims (1)

[Scope of Claims] 1. A plurality of groups having a plurality of contacts, a circuit that applies a pulsed voltage to each of the contacts in a time-sharing manner at a predetermined period via a resistor and a diode, and each of the above-mentioned groups. A filter circuit consisting of a resistor and a capacitor connected to the contacts, a comparator that compares the voltage of each capacitor with a reference voltage to determine the on/off state of each contact, and output signals of each comparator for each group. and a circuit that selects and reads based on a selection signal. 2. The contact reading circuit according to claim 1, further comprising a photocoupler that is driven for each group by the output of the circuit between each of the contacts and the circuit that applies the pulsed voltage.