JPH01314340A - Trouble processing system for information processor - Google Patents

Abstract

PURPOSE:To prevent such double trouble that an input/output controller becomes faulty when waiting for an answer from a central processor by stopping the input/ output controller by a service processor in case of the trouble of the central processor and restarting the input/output controller when the central processor retries processing successfully. CONSTITUTION:An interruption accepting circuit 20 in the service processor 2 accepts an interruption from a trouble informing circuit 11 and a state read circuit 21 sends a polling signal to a state display circuit 13 to read the result of the retrial processing of the central processor 1. Then a start/stop control circuit 22 resets the central processor 1 when the interruption accepting circuit 20 accepts the interruption, to perform the retrial processing of the central processor 1 by a CPU retrial processing circuit 12. Simultaneously, input/output controllers 3 and 4 are stopped from operating and when the state read circuit 21 reads out the retrial success as the result of the retrial processing of the central processor 1, the retrial processing of the input/output controllers 3 and 4 is performed by IOP retrial processing circuits 30 and 31. Consequently, such double trouble that when the central processor becomes faulty, the input/ output controllers also become faulty at the time of waiting an answer from the central processor is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a failure handling method for an information processing device, and particularly to a failure handling method for an information processing device including a central processing unit, an input/output control unit, and a service processor.

[Conventional technology]

Conventionally, this type of information processing equipment has always been equipped with a service processor for use in system operation and fault monitoring, and in the event of a fault in the central processing unit, the fault is detected by a fault detection circuit within the central processing unit. By issuing an interrupt signal to the service processor, the service processor reads internal information within the central processing unit and resets the central processing unit. The reset central processing unit then performs a retry process, and if the retry is successful, the program can run.

By the way, in conventional information processing devices, even if the central processing unit fails while the input/output control unit is accessing the main storage device or the central processing unit, the failure is reported to the service processor; The '4'n device was configured so that failure reports were not made.

[Problem to be solved by the invention]

In the conventional information processing device described above, if a failure occurs in the central processing unit while the input/output control unit is accessing the main storage device or the central processing unit, the failure of the central processing unit is reported to the service processor. was not reported to the input/output control unit, so the input/output control unit was unable to recognize the failure of the central processing unit and detected a timeout such as the monitoring time while waiting for a response from the central processing unit. The input/output control unit also becomes a failure together with the central processing unit, resulting in a double failure.

Furthermore, if there is a double failure in the central processing unit and the input/output control unit, there is a drawback that failure analysis of the system cannot be easily performed.

In view of the above points, an object of the present invention is to prevent the occurrence of a double failure in which the input/output control device also becomes a failure while waiting for a response from the central processing unit when the central processing unit fails. An object of the present invention is to provide a failure handling method for an information processing device.

[Means to solve the problem]

The failure handling method of the information processing device of the present invention includes a failure reporting circuit that interrupts a service processor when a failure occurs in the central processing unit, and a CP that performs retry processing of the central processing unit.
a U retry processing circuit, a status display circuit that displays the result of the retry processing of the central processing unit by the CPU retry processing circuit, an IOP retry processing circuit that performs the retry processing of the input/output control device, and a state display circuit that displays the result of the retry processing of the central processing unit by the CPU retry processing circuit; an interrupt acceptance circuit within the service processor that accepts an interrupt; a status readout circuit that polls the status display circuit to read the result of retry processing of the central processing unit; Resetting the central processing unit and causing the CPU retry processing circuit to execute the retry processing of the central processing unit, stopping the operation of the input/output control device, and causing the state a reading circuit to execute the retry processing of the central processing unit. and a start/stop control circuit that causes the TOPIJ) lie processing circuit to execute retry processing of the input/output control device when a retry success is read.

[Effect]

In the failure processing method of the information processing device of the present invention, the failure reporting circuit interrupts the service processor when a failure occurs in the central processing unit, the CPU retry processing circuit performs the retry processing of the central processing unit, and the status display circuit performs the CPU retry processing. The circuit displays the result of retry processing of the central processing unit, the IOP retry processing circuit performs retry processing of the input/output control device, the interrupt acceptance circuit in the service processor accepts an interrupt from the failure reporting circuit, and the status a reading circuit polls the status display circuit and reads the result of the retry processing of the central processing unit, and the start/stop control circuit resets the central processing unit when the interrupt is accepted by the interrupt reception circuit. The input/output w control device by the rOP retry processing circuit causes the processing unit to execute retry processing and stops the operation of the input/output control device, and when the status reading circuit reads out retry success as a result of the retry processing of the central processing unit. Executes retry processing.

〔Example〕

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a failure handling system of an information processing apparatus according to an embodiment of the present invention. and two input/output control devices 3 and 4.

Central processing unit! f1 includes a fault detection circuit IO that detects a fault in the central processing unit l; a fault reporting circuit 11 that sends an interrupt signal to the service processor 2 to report a fault;
A CPU (central processing unit) retry processing circuit 1 that receives a start instruction from the service processor 2 and retries commands (retry processing) when the central processing unit 1 fails.
2, and a status display circuit 13 for displaying whether the retry processing of the central processing unit 1 by the CPUIJ retry processing circuit 12 is successful or not.

The service processor 2 polls an interrupt reception circuit 20 that receives an interrupt signal as a failure report from the failure report circuit 11 in the central processing unit 1 and a status display circuit 13 in the central processing unit 1 to retry the central processing Wl+. It is configured to include a status reading circuit 21 for reading processing results, and a start/stop control circuit 22 for instructing the central processing unit 1 and input/output control units 3 and 4 to start and stop instructions.

The input/output control devices 3 and 4 are configured to include IOP (input/output control device) retry processing circuits 30 and 31, respectively.

Next, the operation of the failure handling method of the information processing apparatus of this embodiment configured as described above will be explained.

When a failure occurs in the central processing unit 1, the failure detection circuit 1
0 recognizes the occurrence of a fault, and the fault reporting circuit 11 sends an interrupt signal to the service processor 2 as a fault report.

In the service processor 2, when the interrupt receiving circuit 20 receives an interrupt signal as a fault report from the fault reporting circuit 11, the interrupt receiving circuit 20 receives the interrupt signal from the state reading circuit 21.
A read instruction is issued to the start/stop control circuit 22, and a start/stop instruction is issued to the start/stop control circuit 22.

The status successive circuit 21, which has received a read instruction from the interrupt acceptance circuit 20, polls the status display circuit 13 in the central processing unit 1 at regular intervals to determine whether the retry processing of the central processing unit 1 is a result, whether the retry is successful, or whether the retry line is a success. Start checking for success.

In addition, the start/stop control circuit 22 that receives the start/stop instruction from the interrupt reception circuit 20 resets the inside of the central processing unit l, issues a retry start instruction to the CPU I7 try processing circuit 12, and performs input/output control. A stop↑ indication is issued to the IOP retry processing circuits 30 and 31 of devices 3 and 4 because a failure has occurred in central processing unit 1.

The CPU retry processing circuit 12, which has received the NoriI/Restart instruction from the start/stop control circuit 22, executes the retry processing after processing the fault, such as notifying the program of the content of the fault, and when the retry processing is successful. A successful retry is sent to the status display circuit 13, and a successful retry is sent if the retry processing is not successful.

Further, the IOP retry processing circuits 30 and 31 that have received a stop instruction from the start/stop control circuit 22 stop the operations of the input/output control devices 3 and 4.

As mentioned above, the status display circuit 13 is connected to the status display circuit 21.
Since the contents are read by polling,
When the CPUIJ try processing circuit 12 executes the retry process and sets retry success or retry-ne success, the status reading circuit 21 in the service processor 2
determines whether the result of the retry processing of the central processing unit 1 is a successful retry or a successful retry, and if the result of the retry processing of the central processing unit 1 is a successful retry, it stops polling the status display circuit 13 and starts. /Sends a start instruction to the stop control circuit 22.

The start/stop control circuit 22, which has received the start instruction from the status reading circuit 21, issues a retry start instruction to the IOP retry processing circuits 30 and 31 in the input/output control devices 3 and 4.

Upon receiving the retry start instruction, the l0PIJ) lie processing circuits 30 and 31 execute the instruction (retry processing) upon receiving the stop instruction, and restart the operations of the input/output control devices 3 and 4.

Note that the central processing unit 1 read out from the status display circuit 13
When the result of the retry processing is unsuccessful, the state succession circuit 21 controls the start/stop control circuit 22.
Does this result in a start/stop system? Since the 11Eiil path 22 does not issue a retry start instruction to the l0P-retry processing circuits 30 and 31, the input/output control device ll! 3 and 4 remain stopped in the state in which they received the stop instruction.

By the way, in the above embodiment, the input/output control devices connected to the central processing unit 1 are two input/output control devices 3 and 4, but the present invention can be applied regardless of how many input/output side JB'A M there are. Needless to say, it is also applicable.

〔Effect of the invention〕

As explained above, the present invention provides a central processing unit and an input/output control device with a CPUIJI-Ly processing circuit and an IOP.
IJ) To set up retry processing circuits, provide a start/stop control circuit in the service processor to start and stop these retry processing circuits, so that the service processor can control input/output in the event of a failure of the central processing unit. ! What happens on the input/output side when the I+ device is stopped and the central processing unit succeeds in retry processing? By restarting the No. 11 devices, it is possible to prevent the occurrence of a double failure in which the human output control device also becomes a failure while waiting for a response from the central processing unit.

Also, what happens on the input/output side when retry fails? 11g Since the W is kept in a stopped state, there is an effect that the state of the input/output control device can be referred to when analyzing a failure of the central processing unit.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a failure handling method of an information processing apparatus according to an embodiment of the present invention. In the figure, 1... Central processing unit, 2... Service processor, 3.4. Input/output control device, ■0... Failure detection circuit, 11... Failure reporting circuit, 12... CPU retry. Processing circuit, 13... Status display circuit, 20... Interrupt acceptance circuit, 21... Shape C, readout circuit, 22... Start/stop control circuit, 30, 31...
l0PIJ) is a lie processing circuit.

Claims (1)

[Scope of Claims] A failure reporting circuit that interrupts a service processor when a failure occurs in a central processing unit; a CPU retry processing circuit that performs retry processing of the central processing unit; and a retry of the central processing unit by the CPU retry processing circuit. a status display circuit that displays processing results; an IOP retry processing circuit that performs retry processing of the input/output control device; an interrupt reception circuit within the service processor that receives interrupts from the failure reporting circuit; and the status display circuit. a status reading circuit that polls and reads the result of retry processing of the central processing unit; and a status reading circuit that resets the central processing unit when an interrupt is accepted by the interrupt acceptance circuit and causes the CPU retry processing circuit to read the result of the retry processing of the central processing unit. The input/output control device is controlled by the IOP retry processing circuit when a retry process is executed and the operation of the input/output control device is stopped, and when a retry success is read out by the status reading circuit as a result of the retry processing of the central processing unit. A failure handling method for an information processing device, comprising: a start/stop control circuit that causes the device to perform retry processing.