JPH01314341A - Trouble processing system for information processor - Google Patents

Abstract

PURPOSE:To prevent such double trouble that an input/output controller in an answer waiting state becomes faulty by interrupting a service processor when the retrial processing of a central processor by a CPU retrial processing circuit is successful and reporting the retrial success. CONSTITUTION:When the retrial processing of the central processor 1 by a CPU retrial processing circuit 12 is successful, a retrial processing interrupting circuit 13 interrupts the service processor 2 to report the retrial success and IOP retrial processing circuits 30 and 31 perform the retrial processing of input/ output controllers 3 and 4. Then an interruption accepting circuit 20 in the service processor 2 accepts interruptions from a trouble informing circuit 11 and the retrial processing interruption circuit 13 and a start/stop control circuit 21 resets a central processor 1 to perform the retrial processing of the central processor 1 by the CPU retrial processing circuit 12. Consequently, such double trouble that the input/output controller in the answer waiting state becomes faulty is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a failure handling method for an information processing device, and particularly to a failure handling method for an information processing device including a central processing unit, an input/output control unit, and a service processor.

[Conventional technology]

Conventionally, this type of information processing equipment has always been equipped with a service processor for use in system operation and fault monitoring, and in the event of a fault in the central processing unit, a fault detection circuit within the central processing unit issues an I* signal. By issuing an interrupt signal to the service processor, the service processor reads internal information within the central processing unit and resets the central processing unit. The reset central processing unit then performs a retry process, and if the retry is successful, the program can run.

By the way, in conventional information processing devices, even if the central processing unit fails while the input/output control unit is accessing the main storage device or the central processing unit, the failure is reported to the service processor, but the input/output control The 2I device was configured so that no failure reports were made.

[Problem to be solved by the invention]

In the conventional information processing device described above, if a failure occurs in the central processing unit while the input/output control unit is accessing the main storage device or the central processing unit, the failure of the central processing unit is reported to the service processor. was not reported to the I/O control 2I device, so the I/O control device was unable to recognize the failure of the central processing unit and detected a timeout such as monitoring time while waiting for a response from the central processing unit. , the input/output control unit also becomes a failure together with the central processing unit, resulting in a double failure.

Furthermore, if there is a double failure in the central processing unit and the input/output control unit, there is a drawback that failure analysis of the system cannot be easily performed.

In view of the above-mentioned points, an object of the present invention is to prevent the occurrence of a double failure in which the human output control device also becomes a failure while waiting for a response from the central processing unit when the central processing unit fails. An object of the present invention is to provide a failure handling method for an information processing device.

[Means to solve the problem]

The failure processing method of the information processing device of the present invention includes: a failure reporting circuit that interrupts a service processor to report the failure when a failure occurs in the central processing unit; and a CPUIJ) lie processing circuit that performs retry processing of the central processing unit. A retry processing interrupt circuit that interrupts the service processor to report a retry success when the result of the retry processing of the central processing unit by the CPU retry processing circuit is a success; l0PU) when an interrupt from the failure reporting circuit is accepted by the interrupt acceptance circuit in the service processor, and the interrupt acceptance circuit in the service processor accepts interrupts from the failure reporting circuit and the retry processing interrupt circuit; The CPU retry processing circuit resets the central processing unit to cause the CPU retry processing circuit to execute retry processing of the central processing unit, stops the operation of the input/output side rB device, and causes the interrupt acceptance circuit to accept an interrupt from the retry processing interrupt circuit. and a start/stop control circuit that causes the 10P retry processing circuit to execute retry processing of the input/output control device when the 10P retry processing circuit is accepted.

[Effect]

In the failure handling method of the information processing device of the present invention, the failure reporting circuit interrupts the service processor to report the failure when the central processing unit fails, and the CPUIJ) write processing circuit performs retry processing of the central processing unit to retry. When the retry processing of the central processing unit by the CPU retry processing circuit results in a successful retry, the processing interrupt circuit interrupts the service processor to report the retry success, and the IOP retry processing circuit performs the retry processing of the input/output control device. The interrupt acceptance circuit in the service processor accepts interrupts from the failure reporting circuit and the retry processing interrupt circuit, and the start/stop control circuit interrupts the central processing unit when the interrupt acceptance circuit accepts the interrupt from the failure reporting circuit. is reset, the CPU retry processing circuit executes the retry processing of the central processing unit, the operation of the input/output control device is stopped, and the IOP retry processing circuit executes the retry processing when an interrupt from the interrupt reception circuit is accepted. Executes retry processing of the input/output control device.

〔Example〕

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a failure handling system of an information processing apparatus according to an embodiment of the present invention. and two input/output control devices 3 and 4.

The central processing unit 1 includes a failure detection circuit 10 that detects a failure in the central processing unit 1, a failure reporting circuit 11 that sends an interrupt signal to the service processor 2 to report a failure, and a failure detection circuit 11 that sends an interrupt signal to the service processor 2 to report a failure. a CPU (central processing unit) retry processing circuit 12 that receives a start instruction from 2 and performs retry (retry processing) of commands, etc.;
When the result of the retry processing of the central processing unit 1 by the CPU retry processing circuit 12 is a retry success, the IJ sends an interrupt signal to the service processor 2 to report the retry success. There is.

The service processor 2 includes an interrupt receiving circuit 20 that receives interrupt signals as failure reports and retry success reports from the failure reporting circuit 11 and retry processing interrupt circuit 13 in the central processing bag ffl, the central processing unit 1, and the input/output control unit. The start/stop control circuit 21 instructs 3 and 4 to start and stop instructions.

The human output control devices 3 and 4 are configured to include IOP (input/output control device) retry processing circuits 30 and 31, respectively.

Next, the operation of the failure handling method of the information processing apparatus of this embodiment configured as described above will be explained.

When a failure occurs in the central processing unit 1, the failure detection circuit 1
0 recognizes the occurrence of a fault, and the fault reporting circuit 11 sends an interrupt signal to the service processor 2 as a fault report.

In the service processor 2, when the interrupt receiving circuit 20 receives an interrupt signal as a fault report from the fault reporting circuit 11, the interrupt receiving circuit 20 issues a start/stop instruction to the start/stop control circuit 21.

The start/stop control circuit 21, which has received the start/stop instruction from the interrupt reception circuit 20, resets the inside of the central processing unit ff1l and returns the processing circuit 1 to the CPUIJ).
2, and the IOP retry processing circuits 30 and 3 of the human output control devices 3 and 4.
1, a stop instruction is issued because a failure has occurred in the central processing unit 1.

The CPU retry processing circuit 12, which has received the retry start instruction from the start/stop control circuit 21, executes the retry processing after executing fault processing such as notifying the program of the content of the fault, and sends the result of the retry processing to the retry processing interrupt. Notify circuit 13.

When the result of the retry processing of the central processing unit 1 notified from the CPU retry processing circuit 12 is a successful retry, the separate try processing circuit 13 is notified of the result of the retry processing by the CPU retry processing circuit 12. An interrupt signal is sent as a retry success report.

Further, the rOP retry processing circuits 30 and 31 that have received a stop instruction from the start/stop control circuit 21 stop the operations of the input/output control devices 3 and 4.

The interrupt reception circuit 20 receives the interrupt signal as a retry success report from the retry processing interrupt circuit 13, and
A start instruction is issued to the start/stop control circuit 21.

The start/stop control circuit 21, which has received the start instruction from the interrupt acceptance circuit 20, issues a retry start instruction to the l0PIJI-Rye processing circuits 30 and 31 in the input/output control devices 3 and 4.

The l0PIJI-Rye processing circuits 30 and 31, which have received the retry start instruction from the start/stop control circuit 21, execute the command (retry processing) when receiving the stop instruction, and control the operation of the input/output control bags W3 and 4. restart.

Note that if the result of the retry processing of the central processing unit 1 by the CPU retry processing circuit 12 is that the retry is unsuccessful, the retry processing interrupt circuit 13 does not interrupt the interrupt acceptance circuit 20 of the service processor 2. /The stop control circuit 21 does not issue a start instruction. As a result, the input/output control devices 3 and 4 remain stopped while receiving the stop instruction.

By the way, in the above embodiment, the input/output control devices connected to the central processing unit 1 are two input/output control devices 3 and 4, but the present invention can be applied similarly regardless of the number of input/output control devices. Needless to say, it is applicable.

(Effects of the Invention) As explained above, the present invention provides a central processing unit and an input/output control unit with a CPU retry processing circuit and an l0PIJ.
) A start/stop control circuit is provided in the service processor to start and stop these retry processing circuits, so that the service processor stops the input/output control device when the central processing unit fails, and the central processing unit By restarting the input/output control device when the retry process is successful, is it possible to control human output while waiting for a response from the central processing unit? This has the effect that it is possible to prevent the occurrence of double failures that would also cause failures for the No. 11 devices.

Also, if the retry is unsuccessful, the human output system is 2B! Since the i-position remains stopped, there is an advantage that the state of the input/output control device can be referenced when analyzing a failure of the central processing unit.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a failure handling method of an information processing apparatus according to an embodiment of the present invention. In the figure, 1... Central processing unit, 2... Service processor, 3.4. Input/output control device, lO... Fault detection circuit, 11... Fault reporting circuit, 12... CPU+J) light Processing circuit, 13... Retry processing interrupt circuit, 20... Interrupt reception circuit, 21... Start/stop control circuit, 30.3l-
This is a 10P retry processing circuit.

Claims (1)

[Scope of Claims] A failure reporting circuit that interrupts a service processor to report a failure when a failure occurs in a central processing unit; a CPU retry processing circuit that performs retry processing of the central processing unit; a retry processing interrupt circuit that interrupts the service processor and reports retry success when the result of the retry processing of the central processing unit is a retry success; an IOP retry processing circuit that performs retry processing of the input/output control device; an interrupt acceptance circuit in the service processor that accepts interrupts from the failure reporting circuit and the retry processing interrupt circuit; and an interrupt acceptance circuit in the service processor that resets the central processing unit when the interrupt acceptance circuit accepts the interrupt from the failure reporting circuit. causes the CPU retry processing circuit to execute retry processing of the central processing unit, stops the operation of the input/output control device, and causes the IOP retry when the interrupt acceptance circuit accepts an interrupt from the retry processing interrupt circuit. A failure handling method for an information processing device, comprising: a start/stop control circuit that causes a processing circuit to execute retry processing of the input/output control device.