JPH01321645A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH01321645A JPH01321645A JP63155843A JP15584388A JPH01321645A JP H01321645 A JPH01321645 A JP H01321645A JP 63155843 A JP63155843 A JP 63155843A JP 15584388 A JP15584388 A JP 15584388A JP H01321645 A JPH01321645 A JP H01321645A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- ball
- ultrasonic vibration
- thin metal
- contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/0711—Apparatus therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/015—Manufacture or treatment of bond wires
- H10W72/01551—Changing the shapes of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/0711—Apparatus therefor
- H10W72/07141—Means for applying energy, e.g. ovens or lasers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07511—Treating the bonding area before connecting, e.g. by applying flux or cleaning
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07531—Techniques
- H10W72/07532—Compression bonding, e.g. thermocompression bonding
- H10W72/07533—Ultrasonic bonding, e.g. thermosonic bonding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/59—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/923—Bond pads having multiple stacked layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、半導体装置の製造方法に関し、特に半導体
チップの表面電極と金属細線との接続方法に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of connecting a surface electrode of a semiconductor chip and a thin metal wire.
第2図(a)〜(C)は従来の表面電極と金属細線との
接続、特にボールボンド工程を説明するための概略図で
ある。第2図において、1は半導体チップ、1aはこの
半導体チップ1の表面電極、2はこの表面電極1aに接
続される金属細線、3はこの金属細線2を表面電極1a
に押え付けるキャピラリ、4は前記金属細線2の先端に
金属ボールを形成する電気トーチである。FIGS. 2(a) to 2(C) are schematic diagrams for explaining the conventional connection between a surface electrode and a thin metal wire, particularly the ball bonding process. In FIG. 2, 1 is a semiconductor chip, 1a is a surface electrode of this semiconductor chip 1, 2 is a thin metal wire connected to this surface electrode 1a, and 3 is a thin metal wire 2 connected to the surface electrode 1a.
The capillary 4 is an electric torch that forms a metal ball at the tip of the thin metal wire 2.
次に従来の接続方法について説明する。なお、ここでは
特にボールボンド工程に対するものであり、各部の材料
として、表面、電極1aはAu2またはAfL−St金
合金An電極という)、金属細線2はAu (Au線と
いう)を用いる。Next, a conventional connection method will be explained. Here, the description is particularly for the ball bonding process, and as materials for each part, the surface and electrode 1a are referred to as Au2 or AfL-St gold alloy An electrode), and the thin metal wire 2 is made of Au (referred to as Au wire).
へ1電極1aとAu線2の接続には、まず電気トーチ4
を用いてAu線2を溶解し、生成したAuボール2aを
キャピラリ3によってAu2電極1aに押え付ける。A
n電極1aとAuボール2aの接触後、Auボール2a
に超音波振動を発生させる。この超音波振動と、あらか
じめ半導体チップに施しておいた熱のエネルギーによっ
てAfL電極1aの表面酸化膜を破壊し、Au2とAu
の合金を形成することによりAn電極1aとAu線2を
接続するものである。To connect the 1 electrode 1a and the Au wire 2, first use the electric torch 4.
The Au wire 2 is melted using a capillary 3 to press the generated Au ball 2a against the Au2 electrode 1a. A
After the n-electrode 1a and the Au ball 2a come into contact, the Au ball 2a
generates ultrasonic vibrations. This ultrasonic vibration and the thermal energy applied to the semiconductor chip in advance destroy the surface oxide film of the AfL electrode 1a, and the Au2 and Au
The An electrode 1a and the Au wire 2 are connected by forming an alloy of the following.
このような従来の半導体装置の製造方法はAuボール2
aをAu2電極1aに接続する際、Aで電極1aの表面
酸化膜を十分破壊することができず、Au2とAuの間
に接続不良が発生し、最悪の場合にはこれらが剥離する
という問題点があった。The conventional manufacturing method for semiconductor devices is as follows: Au ball 2
When connecting a to the Au2 electrode 1a, the problem is that the surface oxide film of the electrode 1a cannot be sufficiently destroyed by A, and a connection failure occurs between Au2 and Au, and in the worst case, they peel off. There was a point.
この発明は、上記の問題点を解消するためになされたも
ので、半導体チップの表面電極と金属細線との接続に際
して、この接続部での初期的な接続不良を防止すること
ができる半導体装置の製造方法を得ることを目的とする
。This invention has been made to solve the above problems, and is a semiconductor device that can prevent initial connection failures at the connection portion when connecting a surface electrode of a semiconductor chip and a thin metal wire. The purpose is to obtain a manufacturing method.
この発明に係る半導体装置の製造方法は、半導体チップ
の表面電極と金属細線とを接続する際、金属細線を表面
電極との接触前後に超音波振動させて接続するものであ
る。In the method for manufacturing a semiconductor device according to the present invention, when connecting a surface electrode of a semiconductor chip to a thin metal wire, the thin metal wire is ultrasonically vibrated before and after contact with the surface electrode.
この発明においては、半導体チップの表面電極と金属細
線とを接続する際、その接触前後に金属細線を超音波振
動させることから、Au電極の表面酸化膜を効率的に破
壊することができ、AnとAuの初期接合性か向上する
。In this invention, when connecting the surface electrode of the semiconductor chip and the thin metal wire, the thin metal wire is vibrated ultrasonically before and after the contact, so that the surface oxide film of the Au electrode can be efficiently destroyed. The initial bondability between Au and Au is improved.
第1図(a)〜(C)はこの発明の一実施例を説明する
ための工程図であり、Auボールの生成からAuボール
を表面電極に接続するまでを示すものである。なお、符
号は第2図と同じものを示す。FIGS. 1(a) to 1(C) are process diagrams for explaining one embodiment of the present invention, and show the steps from the generation of Au balls to the connection of the Au balls to the surface electrodes. Note that the symbols indicate the same things as in FIG. 2.
まず、第1図(a)に示すように、電気トーチ4を用い
てAu線2を溶解し、第1図(b)に示すように、Au
ボール2aを生成する。次いで、Auボール2aをA℃
電極1aとの接触前に超音波振動させる。次いで、第1
図(C)に示すように、表面電極1aにAuボール2a
を接触させた後、さらに超音波振動させ、この超音波振
動と、あらかじめ半導体チップ1に加えておいた熱のエ
ネルギーによって、An電極1aの表面酸化膜を破壊し
、AJZとAuの合金を形成することにより、A1電極
1aとAu線2の接続を行う。First, as shown in FIG. 1(a), an electric torch 4 is used to melt the Au wire 2, and as shown in FIG. 1(b), the Au wire 2 is melted.
A ball 2a is generated. Next, the Au ball 2a is heated to A°C.
Ultrasonic vibration is applied before contact with the electrode 1a. Then the first
As shown in Figure (C), an Au ball 2a is placed on the surface electrode 1a.
After contacting the An electrodes 1a, the An electrodes 1a are further subjected to ultrasonic vibration, and the ultrasonic vibrations and the heat energy previously applied to the semiconductor chip 1 destroy the surface oxide film of the An electrode 1a, forming an alloy of AJZ and Au. By doing so, the A1 electrode 1a and the Au wire 2 are connected.
上記のような半導体装置の製造方法によれば、Auボー
ル2aをAfl電極1aとの接触前にも超音波振動させ
るので、Au2電極1aの表面酸化膜を効率的に破壊す
ることができ、AuとAu2の初期的な接続不良あるい
は初期的な剥離を防止できる。According to the method for manufacturing a semiconductor device as described above, since the Au ball 2a is subjected to ultrasonic vibration even before it comes into contact with the Afl electrode 1a, the surface oxide film of the Au2 electrode 1a can be efficiently destroyed, and the Au It is possible to prevent initial connection failure or initial peeling between Au2 and Au2.
なお、上記実施例では金属細線がAu線の場合について
示したが、金属細線がAu線あるはCu線の場合でもよ
く、上記実施例と同様の効果を奏する。In the above embodiment, the thin metal wire is an Au wire, but the thin metal wire may be an Au wire or a Cu wire, and the same effects as in the above embodiment can be obtained.
この発明は、以上説明したように、金属細線を表面電極
に接続する際、金属細線を表面電極との接続前後に超音
波振動させて接続するようにしたので、表面電極の表面
酸化膜を効率的に破壊することができ、接続部での接続
不良あるいは剥離を防止することができる。As explained above, in this invention, when connecting a thin metal wire to a surface electrode, the thin metal wire is vibrated ultrasonically before and after connecting to the surface electrode, so that the surface oxide film of the surface electrode can be effectively removed. This can prevent poor connection or peeling at the connection part.
第1図(a)〜(c)はこの発明の一実施例を説明する
ための工程図、第2図(a)〜(C)は従来例を説明す
るための工程図である。
図において、1は半導体チップ、1aは表面電極、2は
金属細線、2aはAuボール、3はキャピラリ、4は電
気トーチである。
なお、各図中の同一符号は同一または相当部分を示す。
代理人 大 岩 増 雄 (外2名)第1図
4 馬ジ気トーチ
第2図FIGS. 1(a) to (c) are process diagrams for explaining one embodiment of the present invention, and FIGS. 2(a) to (C) are process diagrams for explaining a conventional example. In the figure, 1 is a semiconductor chip, 1a is a surface electrode, 2 is a thin metal wire, 2a is an Au ball, 3 is a capillary, and 4 is an electric torch. Note that the same reference numerals in each figure indicate the same or corresponding parts. Agent Masuo Oiwa (2 others) Figure 1 4 Umajiki Torch Figure 2
Claims (1)
に金属細線を接続する方法において、前記金属細線と表
面電極とを接触させる前後に前記金属細線を超音波振動
させることを特徴とする半導体装置の製造方法。A method for connecting a thin metal wire to a surface electrode of a semiconductor chip mounted on a metal frame, wherein the thin metal wire is ultrasonically vibrated before and after the thin metal wire and the surface electrode are brought into contact with each other. Method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63155843A JPH01321645A (en) | 1988-06-22 | 1988-06-22 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63155843A JPH01321645A (en) | 1988-06-22 | 1988-06-22 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01321645A true JPH01321645A (en) | 1989-12-27 |
Family
ID=15614710
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63155843A Pending JPH01321645A (en) | 1988-06-22 | 1988-06-22 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01321645A (en) |
-
1988
- 1988-06-22 JP JP63155843A patent/JPH01321645A/en active Pending
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