JPH0139221B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming an electrode contact window in the manufacture of a bipolar semiconductor integrated circuit device in which a transistor and a Schottky barrier diode are installed together. .

In semiconductor devices such as bipolar semiconductor integrated circuit devices, a shot key barrier diode (SBD) is installed between the base and collector of the transistor to prevent a reduction in the switching speed of the transistors arranged in the integrated circuit device. Semiconductor integrated circuit devices, such as S-TTL, have been put into practical use, for example, having a gate circuit consisting of the following.

However, in manufacturing a bipolar semiconductor integrated circuit device in which a transistor and an SBD are arranged on the same silicon substrate as described above, the conventional method used to form the emitter layer of the transistor and the electrode contact window of the transistor and the SBD. The outline of the process was as described in the following sections () to ().

() Silicon (Si) with completed formation of N ⁺ collector contact layer and P type base layer
On the silicon dioxide (SiO ₂ ) film on the substrate surface,
A resist pattern for forming a contact window is formed using the first photomask, and etching is performed to form a collector contact window, an emitter contact window, a base contact window, and an SBD contact window halfway in the SiO ₂ film.

() Using a second photomask, stack a resist mask pattern covering only the SBD/contact window on top of the resist mask pattern, and then perform etching to form the collector contact window, emitter contact window, and base contact window. Penetrate to the board surface.

() After removing the resist mask layer and depositing a polysilicon layer on the substrate surface and a phosphosilicate glass (PSG) layer thereon, a base contact is formed on the PSG layer using a third photomask. A resist mask layer is formed that exposes the window and its periphery, and etching is performed to remove the PSG layer on the base contact window and its periphery.

() Phosphorus contained in PSG is introduced through the emitter contact window using the solid phase diffusion method to form a shallow N-type emitter layer in the base layer of the Si substrate, and then the PSG layer on the substrate is dissolved and removed. (Washed emitter method) () Using the fourth photomask, form a resist pattern that exposes the polysilicon surface of the SBD/contact window and its surrounding area, and perform etching to remove the polysilicon surface of the SBD/contact window and its surrounding area. Remove the silicon layer.

() Using a fifth photomask, form a resist mask layer overlapping the resist mask layer to expose the SBD/contact window and its surrounding area in a narrower range than the fourth photomask, and perform etching to remove the SBD. - Penetrate the contact window to the board surface.

As explained above, in the conventional method, the first step is to form the emitter layer and the electrode contact window.
Since a total of 5 [types] of photomasks are used, the process becomes complicated, and there is a problem in that the process steps and man-hours are large.

In view of the above-mentioned problems, the present invention has been devised to provide a transistor that can further reduce the types of photomasks used, thereby shortening the number of process steps and reducing the number of man-hours.
A method for forming an electrode contact window in the manufacture of a bipolar semiconductor integrated circuit device equipped with an SBD is provided.

That is, the present invention uses carbon dioxide on a silicon substrate when manufacturing a bipolar semiconductor integrated circuit device having a collector contact layer and a base contact layer on the same silicon substrate on which a transistor and a shot key barrier diode (SBD) are provided. Collector contact window and emitter contact window penetrated through silicon (SiO ₂ ) film, base contact window and shot key barrier diode (SBD) contact window with silicon dioxide (SiO ₂ ) layer remaining at the bottom. After forming a silicon (Si) substrate, a polysilicon layer and a silicate glass layer containing an impurity imparting a desired conductivity type to silicon (Si) are sequentially deposited on the silicon (Si) substrate, and then a base contact window and a silicon silicate glass layer are sequentially deposited. After removing the silicate glass layer and polysilicon layer on the Yotsky barrier diode (SBD) contact window, the base contact window and the Schottky barrier diode (SBD) contact window are penetrated. , the emitter layer is formed by solid phase diffusion using the silicate glass layer as a diffusion source.

The present invention will be explained in detail below with reference to sectional views for explaining the process of one embodiment shown in FIGS. 1 to 7.

For example, in the manufacture of bipolar semiconductor integrated circuit devices such as S-TTL in which an NPN transistor and an SBD are installed on the same Si substrate, the emitter layer of the transistor, each electrode contact window of the transistor, and the electrode contact window of the SBD are formed. In the method of the present invention, first, as shown in FIG. 1, the formation of an N ⁺ collector contact layer 2 and a P-type base layer 3 is completed on a collector layer 1 made of N-type Si formed as an upper layer. on Si substrate
A photoresist layer 5 is deposited on the SiO ₂ film 4, and a collector contact window 6, an emitter contact window 7, a base contact window 8 and
After forming a mask pattern for etching the SBD/contact windows 9, the SiO ₂ film 4 is etched using a hydrofluoric acid treatment solution, etc., and each contact window is etched to the same thickness as the SiO ₂ film 4. Form to approximately 1/2 depth.

A second photoresist layer 10 is then deposited on the substrate, leaving the first photoresist layer 5 in place, as shown in FIG. After forming a mask layer to cover the base contact window 8 and the SBD contact window 9 as shown in _FIG . The contact window 7 is passed through to the substrate surface.

Next, as shown in FIG. 3, after removing the mask layer consisting of the first photoresist layer and the second photoresist layer 10, the substrate surface is coated by CVD method or the like.
A polysilicon layer 11 with a thickness of about 1000 [Å] is deposited, and then a silicate glass layer (hereinafter referred to as "silicate glass layer") containing phosphorus as an impurity with a thickness of about 5000 to 10000 [Å] is deposited on the polysilicon layer 11 by CVD method. PSG layer) 1
2 is deposited.

Next, after depositing a third photoresist layer 15 on the substrate surface, using a third photomask, as shown in FIG. The exposed PSG layer is etched away using hydrofluoric acid, etc., and the underlying polysilicon layer is etched away using a hydrofluoric acid + nitric acid treatment solution to form the collector contact window 6 and the emitter. Polysilicon layer 11 and
The PSG layer 12 is left behind to expose the other contact windows, ie, the base contact window 8 and the SBD contact window 9, and the SiO ₂ film 4 around them.

Next, a fourth photoresist layer 16 is deposited on the substrate surface, leaving the mask layer formed by the third photoresist layer 15 as it is, and using a fourth photomask, as shown in FIG. A mask layer is formed by the fourth photoresist layer 16 that exposes the periphery of the base contact window 8 and the SBD contact window 9 in a range narrower than the area to be removed. - Penetrate the contact window 8 and SBD/contact window 9. As a result of this etching, the walls of the base contact window 8 and the SBD contact window 9 are formed in a step-like manner as shown in the figure, resulting in a structure that prevents disconnection of the wiring layer.

Next, after removing the fourth photoresist layer 16 and the third photoresist layer 15 on the substrate, the substrate is heated to about 1100 to 1150 [°C] to form an emitter as shown in FIG.・PSG is formed by solid phase diffusion from the contact window 7 through the polysilicon layer 11.
The phosphorus (P) contained in the layer 12 is converted into a P-type base layer 3.
A shallow emitter layer 13 having a thickness of, for example, about 2000 to 4000 [Å] is formed. At this time, phosphorus (P) is also introduced into the N ⁺ collector contact layer 2 through the collector contact window 6 (phosphorus introduction layer 14), but the N ⁺ collector contact layer is doped with the same conduction type impurity as the above introduction layer. There is no problem since it is a formed N ⁺ layer.

Finally, the PSG layer 12 on the substrate is removed using hydrofluoric acid, etc., and the PSG layer 12 on the substrate is removed as shown in FIG.
a collector contact window 6 for the SiO ₂ film 4;
The formation of the emitter contact window 7, the base contact window 8 and the SBD contact window 9 and the formation of the emitter layer 13 on the base layer 3 of the substrate are completed.

In the above embodiments, the present invention has been described with respect to the manufacturing process of a bipolar semiconductor integrated circuit device in which an NPN transistor and an SBD are provided together, but the method of the present invention also applies to a method in which a transistor of different conductivity type and an SBD are provided together. It can also be applied to manufacturing bipolar semiconductor integrated circuits.

As explained above, according to the method of the present invention, in the process of solid-phase diffusion of emitters and formation of electrode contact windows of transistors and SBDs in the manufacturing of bipolar semiconductor integrated circuit devices in which transistors and SBDs are installed together, Using a total of 5 [types] of photomasks from 1st to 5th,
Instead of 5 [times] of photo-etching work being performed, it is now possible to use a total of 4 [types] of photomasks from the first to fourth photomasks and perform the photo-etching work 4 [times]. At the same time, the number of semiconductor integrated circuit devices used can be reduced, and at the same time, the manufacturing steps and man-hours for manufacturing semiconductor integrated circuit devices can be reduced.

[Brief explanation of drawings]

FIGS. 1 to 7 are cross-sectional views for explaining the number of steps in one embodiment of the present invention. In the figure, 1 is a collector layer, 2 is an N ⁺ collector contact layer, 3 is a P-type base layer, 4 is a silicon dioxide film, 5 is a first photoresist layer, 6
is the collector contact window, 7 is the emitter contact window, 8 is the base contact window, 9 is the Schottky barrier diode contact window, 1
0 is a second photoresist layer, 11 is a polysilicon layer, 12 is a phosphosilicate glass layer, 13 is an emitter layer, and 14 is a phosphorus introduction layer.

Claims (1)

[Claims] 1. When manufacturing a bipolar semiconductor integrated circuit device having a collector contact layer and a base contact layer on the same silicon substrate on which a transistor and a Schottky barrier diode are provided, a silicon dioxide film on the silicon substrate is
Penetrated collector contact window and emitter
After forming the contact window, the base contact window with a silicon dioxide layer remaining on the bottom, and the Schottky barrier diode contact window, a polysilicon layer and a desired conductivity type for the silicon are formed on the silicon substrate. After sequentially depositing silicate glass layers containing impurities that give a and Schottky barrier diode.
1. A method of manufacturing a semiconductor device, comprising penetrating a contact window and then forming an emitter layer by solid phase diffusion using the silicate glass layer as a diffusion source.