JPH0151075B2 - - Google Patents

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Publication number
JPH0151075B2
JPH0151075B2 JP59023353A JP2335384A JPH0151075B2 JP H0151075 B2 JPH0151075 B2 JP H0151075B2 JP 59023353 A JP59023353 A JP 59023353A JP 2335384 A JP2335384 A JP 2335384A JP H0151075 B2 JPH0151075 B2 JP H0151075B2
Authority
JP
Japan
Prior art keywords
layer
thick film
conductor layer
circuit conductor
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59023353A
Other languages
Japanese (ja)
Other versions
JPS60167497A (en
Inventor
Hisashi Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59023353A priority Critical patent/JPS60167497A/en
Publication of JPS60167497A publication Critical patent/JPS60167497A/en
Publication of JPH0151075B2 publication Critical patent/JPH0151075B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 産業上の利用分野 本発明は、混成集積回路用セラミツク多層回路
基板の製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method of manufacturing a ceramic multilayer circuit board for a hybrid integrated circuit.

従来例の構成とその問題点 近年、電子機器の小型、軽量化や高機能化に対
する要求が増大してくるにつれ、それらの電子回
路の高密度化が重要な課題となつている。
Conventional Structures and Their Problems In recent years, as demands for electronic devices to be smaller, lighter, and more functional have increased, increasing the density of these electronic circuits has become an important issue.

このような中にあつて、電子回路の高密度化を
はかる手段として昨今様々な方策が講じられてお
り、とりわけ、回路の機能ブロツク化によるモジ
ユール部品(ユニツト化)を使つて電子回路を構
成し高密度化をはかる実装方法が多くの電子機器
に採用されてくるようになつた。
Under these circumstances, various measures have recently been taken as a means of increasing the density of electronic circuits.In particular, electronic circuits are constructed using modular parts (unitization) by converting circuits into functional blocks. Mounting methods that aim at higher density are now being adopted in many electronic devices.

この機能ブロツク化されたモジユール部品は、
混成集積回路部品、別名ハイブリツトICとも呼
ばれるものであり、その形態としてはいろいろな
ものが実用化され、電子機器の小型、軽量化や高
機能化さらには低価格化に寄与している。
This functional block modular part is
Hybrid integrated circuit components, also known as hybrid ICs, have been put into practical use in a variety of forms, contributing to smaller, lighter weight, higher functionality, and lower prices of electronic devices.

現在、もつとも広く用いられている混成集積部
品の構成としては、アルミナなどのセラミツク絶
縁基板上に、銀−パラジウムから成るメタルグレ
ーズ系の厚膜導体材料により回路導体層を形成す
るとともに、その同一面上に酸化ルテニウム系の
厚膜抵抗材料により抵抗回路層を形成した、回路
基板上に機能ブロツク回路を構成するのに必要な
回路素子として例えばコンデンサーやトランジス
タ、ICなどを搭載し、電気的に接続したもので
ある。
Currently, the configuration of hybrid integrated components that is widely used is to form a circuit conductor layer using a metal glaze-based thick film conductor material made of silver-palladium on a ceramic insulating substrate such as alumina, and to form a circuit conductor layer on the same surface. A resistor circuit layer is formed using a ruthenium oxide thick film resistor material on top of the circuit board. Circuit elements necessary to construct a functional block circuit, such as capacitors, transistors, and ICs, are mounted on the circuit board and electrically connected. This is what I did.

ところで、昨今この混成集積回路部品自体の高
集積化に対する要求が急速に増大しており、それ
とともに回路基板の多層化が必要不可欠な条件と
なつている。
Nowadays, there has been a rapid increase in demand for higher integration of hybrid integrated circuit components themselves, and along with this, multi-layering of circuit boards has become an indispensable condition.

この多層回路基板には、従来からいろいろな製
造方法が実施されているがセラミツク基板をベー
スとした多層回路基板としてその代表的な製造工
程の一例を第1図A〜Cに示す。
Various manufacturing methods have been used to date for this multilayer circuit board, and an example of a typical manufacturing process for a multilayer circuit board based on a ceramic substrate is shown in FIGS. 1A to 1C.

この多層回路基板の製造方法は、まづ第1図A
に示すごとく、アルミナなどから成るセラミツク
絶縁基板1の表面に、銀−パラジウムから成るメ
タルグレーズ系の導体ペーストと、同一面上に酸
化ルテニウムから成るメタルグレーズ系の抵抗体
ペーストとを、それぞれスクリーン印刷法により
塗布し、第1回路導体層2と抵抗体層2と抵抗体
層3とを形成し、次いで第1図Bに示すごとく第
1回路導体層2の表面にフオトポリマーから成る
絶縁体層4を形成するとともに、この絶縁体層4
に第1回路導体層2の一部が表面に露出するよう
にバアイヤホール状の微細孔5をあけ、しかる後
に第1図Cに示すように絶縁体層4の表面に無電
解めつきと電気めつき技術を併用し、セミアデイ
チイブ法により第2回路導体層6を形成し、微細
孔5を通して第1回路導体層と電気的に接続する
ことにより回路導体層を多層化した製造方法であ
る。
The method for manufacturing this multilayer circuit board is shown in Figure 1A.
As shown in the figure, a metal glaze conductor paste made of silver-palladium and a metal glaze resistor paste made of ruthenium oxide are screen printed on the surface of a ceramic insulating substrate 1 made of alumina or the like, respectively. A first circuit conductor layer 2, a resistor layer 2, and a resistor layer 3 are formed by coating the first circuit conductor layer 2, and then an insulating layer made of a photopolymer is applied on the surface of the first circuit conductor layer 2 as shown in FIG. 4 and this insulating layer 4
A micro hole 5 in the form of a via hole is made in the first circuit conductor layer 2 so that a part of it is exposed on the surface, and then electroless plating and electric plating are applied to the surface of the insulating layer 4 as shown in FIG. 1C. This is a manufacturing method in which the second circuit conductor layer 6 is formed by a semi-additive method using a bonding technique, and is electrically connected to the first circuit conductor layer through the micro holes 5 to form a multilayer circuit conductor layer.

ところが、このような方法による多層回路基板
の重大な欠点はフオトポリマーによる絶縁体層4
の表面にめつき法により第2回路導体層6を形成
する方法において、絶縁体層4から露出したメタ
ルグレーズ系の第1回路導体層2に含まれるガラ
ス成分が無電解めつき液や電気めつき液中に含ま
れる酸やアルカリに極めて侵されやすく、従つて
第1回路導体層2と第2回路導体層6の接続の信
頼性が十分に確保されないことである。
However, a serious drawback of the multilayer circuit board produced by this method is that the insulator layer 4 made of photopolymer
In the method of forming the second circuit conductor layer 6 on the surface of the insulating layer 4 by a plating method, the glass component contained in the metal glaze-based first circuit conductor layer 2 exposed from the insulating layer 4 is exposed to an electroless plating solution or an electric metal. The problem is that it is extremely easily attacked by acids and alkalis contained in the soaking liquid, and therefore, the reliability of the connection between the first circuit conductor layer 2 and the second circuit conductor layer 6 cannot be sufficiently ensured.

発明の目的 本発明の目的は、層間導体層の接続の信頼性を
向上した多層回路基板の製造方法を提供すること
である。
OBJECT OF THE INVENTION An object of the present invention is to provide a method for manufacturing a multilayer circuit board that improves the reliability of connections between interlayer conductor layers.

発明の構成 本発明の多層回路基板の製造方法は、セラミツ
ク絶縁基板の少なくとも一主面上にメタルグレー
ズ系の厚膜回路導体層と厚膜抵抗体層とを形成し
てから、厚膜回路導体層上および厚膜抵抗体層上
にフオトポリマーからなる絶縁体層を形成し、さ
らにこの絶縁体層の必要箇所に写真技術を用いて
バイヤホール状の微細孔を形成して厚膜回路導体
の一部を露出させ、前記微細孔内に高耐熱樹脂系
の導電ペーストを充填した後、絶縁体層上に無電
解めつき法により回路導体層を形成するものであ
る。
Structure of the Invention The method for manufacturing a multilayer circuit board of the present invention includes forming a metal glaze-based thick film circuit conductor layer and a thick film resistor layer on at least one main surface of a ceramic insulating substrate, and then forming a thick film circuit conductor layer and a thick film resistor layer on at least one main surface of a ceramic insulating substrate. An insulating layer made of a photopolymer is formed on the layer and the thick film resistor layer, and micro holes in the form of via holes are formed in the necessary locations of this insulating layer using photographic technology to form the thick film circuit conductor. After exposing a portion and filling the micropores with a highly heat-resistant resin-based conductive paste, a circuit conductor layer is formed on the insulator layer by electroless plating.

実施例の説明 以下本発明の一実施例について、図面を参照し
ながら説明する。
DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

第2図A〜Dは、本発明の一実施例における多
層回路基板の製造方法による工程を示すものであ
る。
FIGS. 2A to 2D show steps in a method for manufacturing a multilayer circuit board according to an embodiment of the present invention.

第2図において7は、セラミツク絶縁基板、8
は厚膜第1回路導体層、9は厚膜抵抗体層、10
はフオトポリマー絶縁体層、11は微細孔、12
は高耐熱樹脂系導電層、13は第2回路導体層で
ある。
In FIG. 2, 7 is a ceramic insulating substrate;
9 is a thick film first circuit conductor layer, 9 is a thick film resistor layer, and 10 is a thick film first circuit conductor layer.
is a photopolymer insulator layer, 11 is a micropore, 12
1 is a high heat-resistant resin conductive layer, and 13 is a second circuit conductor layer.

以上のように構成された本実施例の多層回路基
板について以下その製造工程を詳細に説明する。
まず第2図Aに示すように、アルミナなどのセラ
ミツク絶縁基板7の一主面上に銀や銀−パラジウ
ムの微粉末をガラスフリツトと樹脂バインダーに
混合してペースト状としたメタルグレーズ系の導
体ペーストをスクリーン印刷法により塗布し、
850〜900℃の高温で焼成することにより厚膜第1
回路導体層8を形成し、さらに、この厚膜回路導
体層の同一面上に酸化ルテニウムの微粉末をガラ
スフリツトと樹脂バインダーに混合してペースト
状とした抵抗体ペーストを同様にスクリーン印刷
法により塗布し、800℃〜850℃の高温で焼成する
ことにより厚膜抵抗体層9を形成しレーザートリ
ミング法により所定の抵抗値になるよう調整し
た。次いで第2図Bに示すごとく、厚膜第1回路
導体層8の全表面にフオトポリマータイプの絶縁
体層10を塗布し、フオト技術を用いて、接続を
必要とする厚膜第1回路導体層の一部が表面を露
出するようにバイヤホール状に微細孔11をあ
け、さらに第2図Cに示すごとくこの微細孔11
の中に高耐熱性を有する導電ペーストをスクリー
ン印刷法により充填し、加熱硬化させることによ
り導電体層12を形成する。
The manufacturing process of the multilayer circuit board of this embodiment configured as described above will be explained in detail below.
First, as shown in FIG. 2A, a metal glaze-based conductive paste is prepared by mixing fine powder of silver or silver-palladium with glass frit and a resin binder on one main surface of a ceramic insulating substrate 7 made of alumina or the like. is applied by screen printing method,
By firing at a high temperature of 850 to 900℃, the first thick film
A circuit conductor layer 8 is formed, and then a resistor paste made by mixing fine powder of ruthenium oxide with glass frit and a resin binder into a paste is applied on the same surface of this thick film circuit conductor layer by the same screen printing method. Then, a thick film resistor layer 9 was formed by firing at a high temperature of 800° C. to 850° C., and adjusted to a predetermined resistance value by a laser trimming method. Then, as shown in FIG. 2B, a photopolymer type insulator layer 10 is applied to the entire surface of the thick film first circuit conductor layer 8, and a photopolymer type insulator layer 10 is applied to form the thick film first circuit conductor to which connection is required. A fine hole 11 is made in the form of a via hole so that a part of the layer is exposed on the surface, and then this fine hole 11 is made as shown in FIG. 2C.
The conductive layer 12 is formed by filling a conductive paste with high heat resistance into the conductive paste by screen printing and hardening it by heating.

この工程において、絶縁体層として使用するフ
オトポリマーは、耐熱性はもとより、電気絶縁特
性、耐薬品性などにすぐれた特性が要求される。
In this step, the photopolymer used as the insulating layer is required to have excellent properties such as heat resistance, electrical insulation properties, and chemical resistance.

本実施例においては、この目的に合致するフオ
トポリマーとしてエポキシ変性したアクリル樹脂
および環化ゴム系ポリブタジエン樹脂をドライフ
イルム化したものを用いた。
In this example, a dry film of an epoxy-modified acrylic resin and a cyclized rubber-based polybutadiene resin was used as a photopolymer that met this purpose.

また、微細孔11に充填する導電層12として
は、高耐熱性とともに耐薬品性、熱衝撃性にすぐ
れた特性が要求されるが、このような要求を満足
する導電ペーストとして、本実施例では分子量の
大きいエポキシ樹脂に銀の微粉末を分散し、硬化
剤として芳香族アミンを用いた導電ペーストを使
用した。
Further, the conductive layer 12 filling the micropores 11 is required to have high heat resistance as well as excellent chemical resistance and thermal shock resistance. Fine silver powder was dispersed in a high-molecular-weight epoxy resin, and a conductive paste using an aromatic amine as a hardening agent was used.

そして、第2図Dに示すごとく、フオトポリマ
ーから成る絶縁体層10の表面全体に無電解めつ
きと電気めつきを施こして導電金属層を形成し、
さらにエツチング法によつて所望の配線回路状に
導電金属層から成る第2の回路導体層13を形成
し、厚膜第1回路導体層8と電気的に接続した多
層回路基板を作つた。
Then, as shown in FIG. 2D, electroless plating and electroplating are applied to the entire surface of the insulating layer 10 made of photopolymer to form a conductive metal layer,
Furthermore, a second circuit conductor layer 13 made of a conductive metal layer was formed in a desired wiring circuit shape by an etching method, and a multilayer circuit board electrically connected to the thick film first circuit conductor layer 8 was produced.

以上のように、本実施例によれば、フオトポリ
マー絶縁体層10に設けた微細孔11に高耐熱樹
脂系の導電ペースト12を充填し、この導電層1
2を介してめつき法により第2回路導体層13を
形成するので、めつき工程における厚膜第1回路
導体層8の侵食が全くないため層間導体層の接続
の信頼性が確保できる。
As described above, according to this embodiment, the micropores 11 provided in the photopolymer insulating layer 10 are filled with a conductive paste 12 made of a high heat-resistant resin, and the conductive layer 1
Since the second circuit conductor layer 13 is formed by the plating method through the interlayer conductor layer 2, there is no erosion of the thick film first circuit conductor layer 8 during the plating process, so the reliability of the connection between the interlayer conductor layers can be ensured.

さらに、絶縁体層10がフオトポリマーで構成
されるので、従来のような絶縁体層形成のための
高温焼成を必要としない。そのため、多層回路基
板の製造が非常に容易になる。それだけでなく、
絶縁体層10の形成時に厚膜抵抗体層9の抵抗値
が変化するというおそれもないので、絶縁体層1
0下に厚膜抵抗体層9を有する、高密度実装に適
した多層回路基板を得ることができる。
Furthermore, since the insulator layer 10 is composed of a photopolymer, there is no need for high-temperature firing to form the insulator layer as in the conventional case. Therefore, manufacturing of the multilayer circuit board becomes very easy. not only that,
Since there is no fear that the resistance value of the thick film resistor layer 9 will change when the insulator layer 10 is formed, the insulator layer 1
A multilayer circuit board suitable for high-density packaging can be obtained, which has a thick film resistor layer 9 under the layer 9.

次に、本発明の他の実施例について図面を参照
しながら説明する。
Next, other embodiments of the present invention will be described with reference to the drawings.

第3図A〜Dは、本発明の他の実施例における
多層回路基板の製造工程を示したものである。
3A to 3D show the manufacturing process of a multilayer circuit board according to another embodiment of the present invention.

まず第3図AとBは、前述の実施例で示した第
2図A,Bと全く同様であり、まず第3図Aに示
すようにセラミツク絶縁基板7の一主面上に厚膜
第1回路導体層8と、その同一面上に厚膜抵抗体
層9を形成してから、第3図Bに示すようにこの
表面にフオトポリマー絶縁体層10を形成し、写
真技術により、バアイヤホール状微細孔11をあ
ける。しかる後に第3図Cに示すごとく、微細孔
11に銀の微粉末とエポキシ樹脂から成る高耐熱
樹脂系の導電ペースト12をスクリーン印刷法に
より充填するとともに、フオトポリマー絶縁体層
10の表面にも、所望の配線回路状に導電ペース
ト12を塗布し、加熱硬化し、第3図Dに示すご
とく、この基板を無電解銅やニツケルめつき液に
浸漬して、配線回路状の樹脂系導電体層12上に
銅やニツケルなどの導電金属層を析出させること
により第2回路導体層13を形成することにより
多層回路基板を作るものである。
First, FIGS. 3A and 3B are completely similar to FIGS. 2A and 2B shown in the above-mentioned embodiment, and first, as shown in FIG. 1. After forming a circuit conductor layer 8 and a thick film resistor layer 9 on the same surface thereof, a photopolymer insulator layer 10 is formed on this surface as shown in FIG. A shaped micropore 11 is made. Thereafter, as shown in FIG. 3C, the fine holes 11 are filled with a highly heat-resistant resin conductive paste 12 made of fine silver powder and epoxy resin by screen printing, and the surface of the photopolymer insulator layer 10 is also filled with a conductive paste 12. , the conductive paste 12 is applied in the shape of a desired wiring circuit, cured by heating, and as shown in FIG. A multilayer circuit board is produced by forming a second circuit conductor layer 13 by depositing a layer of conductive metal such as copper or nickel on layer 12.

この実施例においては、前述した実施例で得ら
れる多層回路基板よりも第2回路導体層13とフ
オトポリマー絶縁体層10の密着性がすぐれた多
層回路基板が実現できるとともに、第2回路導体
層が無電解めつきのみで形成できるため、工程の
簡略化がはかれるメリツトが得られる。
In this example, a multilayer circuit board with better adhesion between the second circuit conductor layer 13 and the photopolymer insulator layer 10 than the multilayer circuit board obtained in the above-described example can be realized. Since it can be formed only by electroless plating, it has the advantage of simplifying the process.

なお、上述した実施例では、いずれもセラミツ
ク絶縁基板の一方の面に回路導体層を多層化する
方法について述べたが、本発明ではセラミツク絶
縁基板の表裏両面にわたつて厚膜回路導体層と抵
抗体層を形成し、表裏の回路導体層をスルーホー
ル接続してから、それぞれの面に上述した方法で
回路導体層と多層化する方法であつてもよいこと
はいうまでもない。
In the above-mentioned embodiments, a method was described in which a circuit conductor layer is multilayered on one side of a ceramic insulating substrate, but in the present invention, a thick film circuit conductor layer and a resistor are formed on both the front and back sides of a ceramic insulating substrate. It goes without saying that it is also possible to form a body layer, connect the front and back circuit conductor layers through through holes, and then multilayer the circuit conductor layers on each surface using the method described above.

発明の効果 以上の説明から明らかなように、本発明はセラ
ミツク絶縁基板の少くとも一主面上に厚膜回路導
体層と、同一面上に厚膜抵抗体層を形成し、その
表面フオトポリマーによる絶縁体層を形成すると
ともに接続を必要とする個所に写真技術を用い
て、バアイヤホール状の微細孔をあけて厚膜回路
導体層の一部を露出させ、しかる後に、この微細
孔内に高耐熱樹脂系の導電ペーストを充填して、
フオトポリマー層の表面にめつき技術により第2
回路導体層を形成することにより多層回路基板を
作るものであり、フオトポリマー絶縁体層に設け
た微細孔に導電ペーストを充填することにより、
露出した厚膜回路導体層が完全に保護され、従つ
て以降のめつき工程における、酸、アルカリ溶液
による厚膜回路導体層に含まれるガラス成分が溶
出することがなく、層間回路導体層の電気的接続
が確実に行なえるとともに、熱衝撃性や耐湿試験
による層間接続の信頼性が著しく向上する効果が
得られた。
Effects of the Invention As is clear from the above description, the present invention forms a thick film circuit conductor layer on at least one main surface of a ceramic insulating substrate, a thick film resistor layer on the same surface, and a photopolymer layer on the surface thereof. At the same time as forming an insulator layer using a method of forming an insulator layer, a micro hole in the form of a via ear hole is made using photographic technology at the location where a connection is required to expose a part of the thick film circuit conductor layer. Filled with heat-resistant resin conductive paste,
A second coating is applied to the surface of the photopolymer layer using plating technology.
A multilayer circuit board is created by forming a circuit conductor layer, and by filling micro holes provided in a photopolymer insulator layer with conductive paste.
The exposed thick film circuit conductor layer is completely protected, and therefore the glass components contained in the thick film circuit conductor layer will not be eluted by acid or alkaline solutions during the subsequent plating process, and the electricity in the interlayer circuit conductor layer will be protected. In addition to ensuring reliable physical connections, the reliability of interlayer connections in thermal shock and moisture resistance tests was significantly improved.

また、微細孔に充填する導体ペーストを用いて
フオトポリマー絶縁体層上に回路状に印刷して第
2回路導体層を形成することにより、最外層の回
路導体層の密着性がきわめてすぐれた多層回路基
板が得られ、しかも第2回路導体層が無電解めつ
き法のみによつて形成できるため、工程の簡略化
がはかれる効果が得られる。
In addition, by printing a circuit in the form of a circuit on the photopolymer insulator layer using a conductor paste that fills the micropores to form the second circuit conductor layer, we have created a multilayer structure with extremely high adhesion of the outermost circuit conductor layer. A circuit board can be obtained, and since the second circuit conductor layer can be formed only by electroless plating, the process can be simplified.

さらに、絶縁体層がフオトポリマーで構成され
るので、従来の多層回路基板製造におけるような
高温焼成を必要としない。そのため、多層回路基
板の製造が非常に容易になる。それに加えて、絶
縁体層形成時に厚膜抵抗体層の抵抗値が変化する
というおそれもなくなり、絶縁体層下に厚膜抵抗
体層を有する、高密度実装に適した多層回路基板
を提供できるという効果が得られる。
Furthermore, since the insulator layer is comprised of a photopolymer, high temperature firing as in conventional multilayer circuit board manufacturing is not required. Therefore, manufacturing of the multilayer circuit board becomes very easy. In addition, there is no fear that the resistance value of the thick film resistor layer will change during the formation of the insulator layer, making it possible to provide a multilayer circuit board that has a thick film resistor layer under the insulator layer and is suitable for high-density packaging. This effect can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図A〜Cは従来の多層回路基板の製造工程
図、第2図A〜Dは本発明の一実施例における多
層回路基板の製造工程図、第3図A〜Dは本発明
の他の実施例における多層回路基板の製造工程図
の一部である。 7……セラミツク絶縁基板、8……厚膜第1回
路導体層、9……厚膜抵抗体層、10……フオト
ポリマー絶縁体層、11……微細孔、12……高
耐熱樹脂系導電層、13……第2回路導体層。
FIGS. 1A to 1C are manufacturing process diagrams of a conventional multilayer circuit board, FIGS. 2A to D are manufacturing process diagrams of a multilayer circuit board according to an embodiment of the present invention, and FIGS. 3A to D are manufacturing process diagrams of a conventional multilayer circuit board. It is a part of manufacturing process diagram of the multilayer circuit board in Example. 7... Ceramic insulating substrate, 8... Thick film first circuit conductor layer, 9... Thick film resistor layer, 10... Photopolymer insulating layer, 11... Micropore, 12... High heat resistant resin conductive layer Layer 13...Second circuit conductor layer.

Claims (1)

【特許請求の範囲】 1 セラミツク絶縁基板の少なくとも一主面上に
メタルグレーズ系の厚膜回路導体層を形成する工
程と、前記セラミツク絶縁基板の同一主面上に厚
膜抵抗体層を形成する工程と、前記厚膜回路導体
層上および前記厚膜抵抗体層上にフオトポリマー
からなる絶縁体層を形成する工程と、前記絶縁体
層の必要箇所に写真技術を用いてバイヤホール状
の微細孔を形成して前記厚膜回路導体の一部を露
出させる工程と、前記微細孔内に高耐熱樹脂系の
導電ペーストを充填する工程と、前記絶縁体層上
に無電解めつき法により回路導体層を形成する工
程とを有することを特徴とする多層回路基板の製
造方法。 2 高耐熱樹脂系の導電ペーストを、フオトポリ
マーからなる絶縁体層に設けられた微細孔に充填
すると同時に、前記絶縁体層の表面上にも配線回
路状に塗布し、しかる後に無電解めつき法により
導電金属層を析出させて第2の回路導体層を形成
することを特徴とする特許請求の範囲第1項記載
の多層回路基板の製造方法。
[Claims] 1. Forming a metal glaze-based thick film circuit conductor layer on at least one main surface of a ceramic insulating substrate, and forming a thick film resistor layer on the same main surface of the ceramic insulating substrate. a step of forming an insulating layer made of a photopolymer on the thick film circuit conductor layer and the thick film resistor layer; A step of forming a hole to expose a part of the thick film circuit conductor, a step of filling the fine hole with a conductive paste made of a high heat resistant resin, and a step of forming a circuit on the insulating layer by an electroless plating method. 1. A method for manufacturing a multilayer circuit board, comprising the step of forming a conductor layer. 2 A conductive paste made of a high heat-resistant resin is filled into the micropores provided in the insulating layer made of photopolymer, and at the same time, it is applied on the surface of the insulating layer in the form of a wiring circuit, and then electroless plating is performed. 2. The method of manufacturing a multilayer circuit board according to claim 1, wherein the second circuit conductor layer is formed by depositing a conductive metal layer by a method.
JP59023353A 1984-02-10 1984-02-10 Method of producing multilayer circuit board Granted JPS60167497A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59023353A JPS60167497A (en) 1984-02-10 1984-02-10 Method of producing multilayer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59023353A JPS60167497A (en) 1984-02-10 1984-02-10 Method of producing multilayer circuit board

Publications (2)

Publication Number Publication Date
JPS60167497A JPS60167497A (en) 1985-08-30
JPH0151075B2 true JPH0151075B2 (en) 1989-11-01

Family

ID=12108210

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59023353A Granted JPS60167497A (en) 1984-02-10 1984-02-10 Method of producing multilayer circuit board

Country Status (1)

Country Link
JP (1) JPS60167497A (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS556822A (en) * 1978-06-30 1980-01-18 Oki Electric Ind Co Ltd Method of manufacturing ceramic multiilayer wiring board
JPS5651899A (en) * 1979-10-05 1981-05-09 Nippon Electric Co Method of manufacturing high density multilayer circuit board
JPS56118395A (en) * 1980-02-23 1981-09-17 Tokyo Shibaura Electric Co Method of forming multilayer wire
JPS5817696A (en) * 1981-07-23 1983-02-01 日立化成工業株式会社 Method of producing multilayer printed circuit board

Also Published As

Publication number Publication date
JPS60167497A (en) 1985-08-30

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