JPH0157525B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a differential amplifier circuit suitable for use in an input stage of a voltage comparison circuit.

[Background of the invention]

Conventionally, differential amplifier circuits use a large number of transistors, and pairs of transistors must be strictly balanced, but they can be easily integrated into an IC (integrated circuit); According to
The number of transistors is no longer an issue, and the balance between the pair of transistors has become extremely good.For this reason, they are widely used as input stages of arithmetic circuits such as voltage comparison circuits.

In addition, conventionally, when differential amplifier circuits were used in voltage comparison circuits, there was a problem with the operating speed, but various improvements have been made to differential amplifier circuits, and even when used in arithmetic circuits, the operating speed can be increased sufficiently. It is now possible to increase

FIG. 1 is a circuit diagram showing an example of such a conventional differential amplifier circuit constituting a voltage comparison circuit, in which 1 is a voltage comparison circuit, 2 is a final stage circuit, 3 is an output terminal, 4 is a constant current source, and 5 is a comparison voltage source, 6 is a bias voltage source, 7, 8 are load resistors, 9, 10, 11, 12 are transistors, 13 is a power supply voltage source, 14 is an amplifier circuit, 15 is an input terminal, 16 is a resistor, 17, 18 is a diode.

In the figure, a constant current source 4, a comparison voltage source 5, a bias voltage source 6, load resistors 7, 8, and transistors (hereinafter referred to as TR) 9, 10, 11, and 12 are input stages of a voltage comparison circuit 1. Configure a dynamic amplifier circuit. The emitters of TR11 and TR12 are connected to a common constant current source 4, and the collector of TR11 is connected to a common constant current source 4.
The emitter of TR9 is connected to the collector of TR12, and the emitter of TR10 is connected to the collector of TR12. T.R.
Collectors 9 and 10 are connected to a power supply voltage source 13 via load resistors 7 and 8, respectively. That is,
TRs 9 and 10 are cascade-connected to TRs 11 and 12. The base of TR11 has input terminal 1
One input voltage V _i amplified by the preceding stage amplifier circuit 14 is supplied from the TR 5, and the other input voltage, that is, the comparison voltage V _S is supplied from the comparison voltage source 5 to the base of the TR 12.

TRs 9 and 10 are intended to speed up the operation of the voltage comparator circuit 1, and have a constant equal bias voltage applied to their bases from a bias voltage source 6.
V _B is applied.

To explain the operation of this differential amplifier circuit, now,
When the input voltage V _i applied to the base of TR11 is larger than the comparison voltage V _S of the comparison voltage source 5, TR
11 is turned on and TR12 is turned off, current flows through the load resistor 7 and no current flows through the load resistor 8. For this purpose, the collector of TR9 is connected to the power supply voltage source 1.
A voltage obtained by subtracting the voltage drop due to the load resistor 7 from the power supply voltage V _CC of No. 3 is generated, and the power supply voltage V _CC of the power supply voltage source 13 is generated at the collector of the TR 10. Conversely, when the input voltage V _i is smaller than the comparison voltage V _S , TR11 is turned off, TR12 is turned on, and TR
The collector of 9 is connected to the power supply voltage of power supply voltage source 13.
V _CC is generated, and the collector of TR10 has the power supply voltage
A voltage is obtained by subtracting the voltage drop across the load resistor 8 from V _CC . Furthermore, the input voltage V _i is the comparison voltage
When equal to V _S , equal current flows to TR11, 12, and therefore load resistors 7, 8, and since the resistance values of load resistors 7, 8 are set equal, the same current flows to the collectors of TR9, 10. A voltage is generated.

Therefore, by supplying the voltages generated at the respective collectors of TRs 9 and 10 to the final stage circuit 2, the polarity changes depending on whether the input voltage V _i is larger or smaller than the comparison voltage V _S at the output terminal 3. When different output voltages are obtained and the input voltage V _i and the comparison voltage V _S are equal, this output voltage becomes the midpoint potential.

In this way, the voltage comparison circuit 1 compares the input voltage V _i and the comparison voltage V _S .

However, in order for such a differential amplifier circuit to operate normally, _it is necessary to
The collector voltage of TR11 (i.e., the bias voltage V _B of the bias voltage source 6 is
TR9 minus the base-emitter voltage of 9
(emitter voltage) must always be as high as the product of the collector-emitter resistance when the TR 11 is on and the current of the constant current source 4.

Therefore, when the differential amplifier circuit handles a high input voltage V _i , the bias voltage V _B must be set high enough, but if the bias voltage V _B is set high enough, the power supply voltage source 13 will fluctuate. In this case, the collector voltage of TR9 may become lower than the emitter voltage, and the differential amplifier circuit will not operate properly.

In order to eliminate this inconvenience, the differential amplifier circuit shown in FIG. 1 is provided with a limiter consisting of a resistor 16 and diodes 17 and 18, which limits the amplitude of the high input voltage V _i and prevents the bias voltage V _B from being set too high. I'm trying not to have to.

However, the resistor 16 is connected to the amplifier circuit 14 and the base of TR11 in the differential amplifier circuit, and the limiter formed by diodes 17 and 18 is connected between the connection point between the resistor 16 and the base of TR11 and the comparison voltage source 5. Since it is connected, the resistance 16
The input voltage V _i is delayed by a delay time determined by the resistance value of the diodes 17 and the parasitic capacitance of the diodes 17 and 18, and this delay time affects the operating speed of the voltage comparator circuit 1. The comparison voltage source 5 must also supply current to the diodes 17 and 18.

Of course, if the resistance value of the resistor 16 is made sufficiently large, the current supply capability of the bias voltage source 5 can be reduced, but since the delay time becomes longer,
The high speed performance of the voltage comparator circuit 1 will be impaired.

In order to construct a high-speed voltage comparison circuit, a resistor of about several hundred (Ω) is used as the resistor 16, but in this case, the current supply capacity of the comparison voltage source 5 is required to be about several (mA). If the resistor 16 and diodes 17 and 18 are not provided, the current supply capacity of the comparison voltage source 5 is only a few (μA), so the comparison voltage source 5 only needs about two resistors. Assuming that the current supply capacity of the source 5 is approximately several (mA), the comparison voltage source 5 is 2
It requires two or more transistors in addition to about two resistors.

Therefore, we decided to create a monolithic version of the voltage comparison circuit shown in Figure 1.
When built into the IC, resistor 16 and diode 17,
18 requires a size several times the standard size in consideration of withstand current, and the transistor constituting the comparison voltage source 5 similarly requires a size several times the standard size. .

Therefore, the number of elements and chip size in the monolithic IC increase, making it expensive, and the operation of the comparison voltage source 5 also fluctuates as the current flowing through the limiter formed by the diodes 17 and 18 changes.
Further, a change in the characteristics of the limiter due to temperature causes a change in the comparison voltage value of the voltage comparator.

[Purpose of the invention]

The purpose of the present invention is to eliminate the drawbacks of the above-mentioned prior art,
It is an object of the present invention to provide a differential amplifier circuit which can operate normally even with high input voltages and can operate quickly.

[Summary of the invention]

To achieve this objective, the present invention provides a pair of high-speed transistors cascaded to a pair of transistors supplied with an input voltage and a comparison voltage. The feature is that a varying base bias voltage is applied.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a circuit diagram showing an embodiment of the differential amplifier circuit according to the present invention, in which 19 is a bias voltage generating circuit, and parts corresponding to those in FIG. 1 are given the same reference numerals.

In FIG. 2, bias voltage generation circuit 19
is supplied with the power supply voltage V _CC of the power supply voltage source 13,
A bias voltage V _B corresponding to this power supply voltage V _CC is generated. This bias voltage V _B is commonly applied to the bases of TRs 9 and 10. For this purpose, TR9,1
The base voltage of 0 changes with fluctuations in the power supply voltage V _CC . These base voltages rise when the power supply voltage V _CC rises, and fall when the power supply voltage V _CC falls, and the bias voltage generation circuit 19 operates to generate such a bias voltage V _B.

By the way, if the input voltage V _i of TR11 becomes sufficiently high and the voltage between the base and emitter of each of TR9, 10, 11, and 12 is now sufficiently low to the extent that it can be ignored, the emitter voltage of TR11 becomes The voltage obtained by subtracting the voltage resulting from the product of the current i4 of the constant current source ₄ and the collector-emitter resistance (hereinafter referred to as on-resistance) R _CE when the transistor 11 is turned on (hereinafter referred to as on-voltage drop) from the collector voltage. When TR11 is also high, the TR11 becomes saturated and its operation becomes unstable. That is,
TR11 is no longer on.

The bias voltage generation circuit 19
input voltage to prevent saturation.
Keep the bias voltage V _B high so that TR11 does not saturate even when V _i increases to its maximum value, and
Even if the power supply voltage V _CC drops, the bias voltage V _B also drops to prevent transistors 9 and 10 from being saturated.

That is, since the amplifier circuit 14 is generally composed of an emitter follower in which the collector of the final stage transistor is connected to the power supply,
The output voltage of the amplifier circuit 14 becomes equal to the voltage at the emitter of its emitter follower. This output voltage is supplied as the input voltage V _i of the voltage comparison circuit 1 to the base of the TR 11 constituting the differential amplifier circuit. For this reason, the maximum output voltage V _M of the amplifier circuit 14 is
This is the maximum output voltage of the amplifier circuit 14, and is the voltage obtained by subtracting the base-emitter voltage V _BE of the final stage transistor from the power supply voltage V _CC of the voltage source 13, and is therefore expressed by the following equation. .

V _M =V _CC -V _BE (1) Generally, V _BE is about 0.7 (V). If TR11 is not saturated when the amplifier circuit 14 generates the maximum output voltage V _M , TR11 will not be saturated no matter what input voltage V _i is supplied.
If the bias voltage V _B at this time is V _BM , then V _BM > V _M + R _CE ×i ₄ ...(2) must be satisfied. As mentioned earlier, R _CE and i ₄ are the on-resistance of the TR 11 and the current of the constant current source 4, respectively, and therefore, the second
The term is the ON voltage drop of TR11.

By the way, since V _BE ≫R _CE ×i ₄ , equations (1) and (2)
Therefore, V _BM > V _CC −V _BE ……(3).

That is, the bias generation circuit 19 generates the bias voltage V _B that satisfies equation (3) when the maximum input voltage is supplied to the TR 11.

Furthermore, even if the power supply voltage V _CC of the voltage source fluctuates,
The bias voltage V _B that changes with this fluctuation is
The emitter voltage of TRs 9 and 10 is the voltage obtained by subtracting the voltage obtained by multiplying the sum of _the load resistance 7 and the on-resistance of TR 9 by the current i 4 of the constant current source ₄ from the power supply voltage V CC , and the power supply voltage V _CC to load resistance 8 and
The sum of the on-resistance of TR10 and the current of constant current source 4 i ₄
The resistance values of the load resistors 7 and 8 and the current value of the constant current source 4 are set so that they are always lower than the voltage obtained by subtracting the voltage multiplied by . This prevents TR9 and TR10 from becoming saturated.

However, even if the input voltage V _i rises and becomes sufficiently high, the input voltage V _i remains at the maximum value shown in equation (1), and the bias voltage V _B at this time satisfies equation (3). Therefore, TRs 11 and 12 do not saturate, and even if the power supply voltage V _CC decreases, the bias voltage V _B also decreases and TRs 9 and 10 do not saturate. In this case, the input voltage V _i also decreases. Because it decreases,
TRs 11 and 12 are also never saturated. Therefore, a sufficiently high input voltage V _i can be directly supplied to the base of TR11 without limiting the amplitude, and the differential amplifier circuit remains stable even when the power supply voltage V _CC changes. Operate. For this reason, there is no need to provide a limiter as shown in Figure 1, so the operation is fast, and the constant current source 5 can be made as small as the current supply capacity (μA), making the operation more stable. By reducing the number of elements, it is possible to realize a monolithic IC with a small chip size.

FIG. 3 is a circuit diagram of the embodiment of FIG. 2 showing one specific bias generation circuit, in which 20 is a current source, 21 is a resistor, and parts corresponding to those in FIG. 2 have the same reference numerals. Some explanations will be omitted.

In FIG. 3, a current source 20 and a resistor 21 constitute a bias voltage generation circuit 19 (FIG. ₂ ).
If the current value of is i ₂₀ and the base current of TRs 9 and 10 is i _B , then the base voltages of TRs 9 and 10 V ₉ and V ₁₀ are V ₉ = V ₁₀ = V _CC −R ₂₁ × (i ₂₀ + i _B ) and changes with fluctuations in the power supply voltage V _CC .
Therefore, the resistance value R ₂₁ of the resistor 21 is set so that the maximum value of the base voltages V ₉ and V ₁₀ satisfies the above formula (3), and the resistance value of the resistors 7 and 8 and the constant current source 4 are set. By setting the current values as explained in FIG. 2, TRs 9, 10, 11, and 12 will not become saturated.

FIG. 4 is a circuit diagram of the embodiment of FIG. 2 showing another specific bias voltage generation circuit, in which 22 is a resistor, 23 is a diode, and parts corresponding to those in FIG. 2 are denoted by the same reference numerals. Some explanations will be omitted.

In FIG. 4, a resistor 22 and a diode 23 constitute a bias voltage generation circuit 19 (FIG. 2), and the forward voltage of the diode 23 is now
Assuming V _F , the base voltages of TR9 and 10 are V ₉ and V ₁₀
V ₉ =V ₁₀ =V _CC −V _F , which changes with fluctuations in the power supply voltage V _CC .
Therefore, a diode with a forward voltage V _F such that the maximum value of the base voltages V ₉ and V ₁₀ satisfies the above formula (3) is used as the diode 23, and the resistance values of the resistors 7 and 8 and the constant current source By setting the current value of 4 as explained earlier, TR9, 10, 1
1 and 12 are never saturated.

In addition, although the above-mentioned example explained the case where it was used as an input stage of a voltage comparison circuit, the present invention
It is not limited to this.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to directly handle high input voltages without imposing amplitude restrictions, speeding up and stabilizing the operation, and reducing the number of elements. When making monolithic ICs, the chip size is reduced,
It is possible to realize a low cost, and to provide a differential amplifier circuit with excellent functions without the drawbacks of the above-mentioned conventional technology.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an example of a conventional differential amplifier circuit used as an input stage of a voltage comparison circuit, and FIG. 2 is an embodiment of a differential amplifier circuit according to the present invention used as an input stage of a voltage comparison circuit. FIGS. 3 and 4 are circuit diagrams of the embodiment of FIG. 2, each showing a specific bias circuit. DESCRIPTION OF SYMBOLS 1... Voltage comparison circuit, 4... Constant current source, 5... Comparison voltage source, 7, 8... Load resistance, 13... Power supply voltage source, 1
4...Amplification circuit, 19...Bias voltage generation circuit, 2
0...Current source.

Claims (1)

[Claims] 1 first and second transistors whose respective emitters are connected to a common constant current source; whose emitters are connected to the collector of the first transistor and whose collectors are connected to a voltage source via a first load; The third
a fourth transistor whose emitter is connected to the collector of the second transistor and whose collector is connected to the voltage source via a second load, the bases of the first and second transistors; In a differential amplifier circuit configured to supply first and second input voltages, respectively, a bias voltage generation circuit is provided which is supplied with the voltage of the voltage source and generates a bias voltage according to the voltage. is applied to the bases of the third and fourth transistors.