JPH0158702B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention provides the following features when recording, reproducing, or transmitting an information signal having a certain amount of temporally continuous information.
This invention relates to a timing detection device that detects the timing such as the beginning of this information signal during playback, and is capable of highly reliable timing detection even when there is a relatively long period of signal loss, such as dropout. This provides a timing detection method with special features. As a recording and playback method for audio signals in a VTR (video tape recorder), the audio signal is compressed on the time axis for each field period and recorded on a recording track that is an extension of the recording track of the video signal using a rotating head. has already been proposed. The audio signal recording and reproducing method will be explained in detail. FIG. 1 is an explanatory diagram showing a recording pattern on a magnetic tape in a specific example of this system. Note that this specific example is an example of a helical scan method in which recording and reproduction are performed using a rotating cylinder to which two magnetic heads are attached. FIG. 2 is an explanatory diagram showing a state in which the magnetic tape is wound around a rotating cylinder. As shown in the figure, the two magnetic heads H ₁ and H ₂ are positioned exactly opposite to each other with respect to the center of the rotating cylinder. The video signal is sent to the magnetic head every field period.
H ₁ and magnetic head H ₂ are used alternately for recording and reproduction. The audio signal is time-base compressed for each field period and is recorded by the same head immediately after recording the video signal. Therefore, a recording pattern as shown in FIG. 1 is obtained. In addition, A in FIG. 1 shows the recording trajectory by the rotating head, B shows the scanning direction of the rotating head, C shows the recording band of the video signal, D shows the recording band of the audio signal, and E in FIG. F is the magnetic tape, G is the guide post, H is the recording section of the video signal, I is the recording section of the audio signal, J is the rotation direction of the rotating cylinder, and θ is the direction of rotation to the rotating cylinder E. Each figure shows the winding angle of the magnetic tape. FIG. 3 is a time chart for explaining temporal operations. Figure 3a shows how the input video signal is divided into 1 field periods and each signal is
V ₁ , V ₂ , V ₃ ..., b divides the input audio signal every field period, and divides each signal into A ₁ , A ₂ , A ₃
..., where c is magnetic H ₁ ,
b indicates a signal recorded and reproduced by the magnetic head _H2 , and e indicates a reproduced signal. For example, the audio signal _A1 in the first field period is
The signal is time-base compressed and converted into a signal _A'1 , which is recorded by the magnetic head _H1 at a timing as shown in c immediately after the video signal _V1 of the first field period. The audio signal _A2 in the next second field period is
Similarly, the time axis is compressed and converted to A′ ₂ signal,
Immediately after the video signal V ₂ in the second field period,
Recorded by magnetic head _H2 . In this way, the audio signals A ₃ , A ₄ ,
A ₅ … is also compressed on the time axis and becomes A′ ₃ , A′ ₄ , A′ ₅
... are converted into signals of the magnetic head H ₁ , respectively.
H ₂ is recorded alternately at timings c and d. During playback, each signal is played back at timings c and d, similar to when recording, and the signals from each head are
A′ ₁ , A′ ₂ , A′ ₃ … are each extended in time,
The original time axis signals A″ ₁ , A″ ₂ , A″ ₃ , etc. are converted to obtain a temporally continuous reproduced audio signal like e. Note that time axis compression is For example, by using a clock signal with a frequency _c that is more than twice the highest frequency of the audio signal,
This is done by sampling the audio signal, writing each sample signal into memory every field period, and then reading it out faster using a clock signal of higher frequency ' _c . Conversely, time axis expansion during playback is performed by writing into the memory at high speed using a clock signal of frequency ' _c , and reading at a slower speed using a clock signal of frequency _c . In addition, the memory capacity is 1
The capacity is large enough to store the audio signal of a field period, and if it is made up of memory elements at addresses 1 to N, for example, the first sample signal of the audio signal of one field period is stored in the memory at the first address. element, the second sample signal is written to the memory element at the second address, . . . the N-th sample signal is written to the memory element at the N-th address, and at the time of reading, it is read out sequentially from the first address. Now, during playback, it is necessary to write the first sample signal (for example, the first sample signal of signal A' ₁ ) at the first address when it exists.
Incidentally, the time axis of the magnetically recorded and reproduced reproduced signal fluctuates due to time axis fluctuations occurring in the magnetic recording and reproducing system, and the timing of this first sample signal also fluctuates in time. Therefore, the first
The timing of writing to an address (writing start timing) also needs to be changed in accordance with this variation. In other words, to do this, it is necessary to detect this writing start timing. This detection method includes, for example, adding a detection signal for this detection immediately before the first sample signal of the time-domain compressed audio signal (for example, the signal of A' ₁ ) during recording, and then recording it. Sometimes, a method of detecting based on the presence or absence of this detection signal may be considered. A specific example of a conventional method of this method will be described. FIG. 4 is a waveform diagram showing only a part of the time-base compressed audio signal, and a pulse signal L similar to a synchronization signal of a video signal is added as a detection signal. Then, the presence or absence of this pulse signal L is detected, and the signal start timing is detected using the falling time t ₁ or rising time t ₂ of the pulse signal L. However, such a detection method has a problem in that the detection malfunctions when a signal drop such as a drop occurs. Another specific example is a method of using a digital signal as a detection signal. For example, by using a digital signal representing a suitable numerical value (for example, 100110), as the number of bits increases, false detections can be reduced. However, even a 1-bit error results in a false detection, which is disadvantageous because the detection rate (number of accurate detections/number of times it should be detected) decreases. In other words,
This is because if an error occurs in any one bit when it should be detected, it is equivalently assumed that there is no detection signal. The present invention relates to a timing detection device for detecting a desired timing (in this example, the start timing of a time-domain compressed audio signal) as in the examples shown in FIGS. The present invention provides a timing detection signal transmission and reception system that is effective when detecting a desired timing from a signal that has passed through a signal transmission system that has many signal deletions such as relatively long dropouts. First, before explaining the specific configuration of the present invention, the principle of the present invention will be explained. FIG. 5 is an explanatory diagram for explaining this principle, and the horizontal axis is time. As shown in the figure, there is a detection signal immediately before the timing t _P to be detected. This detection signal is a digital signal and consists of a plurality of detection unit signals P ₁ to _{P 5} (described later). During detection, these detection unit signals P ₁ to P ₅ are
Its presence or absence is detected at time points t ₁ to t ₄ and t _P , respectively. By the way, the timing t _P to be detected is
It is possible to detect the detection unit signal P5 by simply detecting the presence or absence of the detection unit signal _P5 (detected at _tP ).
Timing detection is possible even without _P1 to _P4 .
However, in the case of only this detection unit signal _P5 ,
Due to an error such as a dropout, this signal may be assumed to be absent even when an error occurs, resulting in inaccurate timing detection. In such a case, use other detection unit signals.
A feature of the present invention is that timing detection is performed as a result of detecting P ₁ to _{P 4} to perform timing detection that is resistant to errors such as dropouts. For example, if the signal at _P5 cannot be detected due to an error, but the signal at _P4 can be detected normally, it can be detected at time _t4 , but not at time _tP . As will be explained in detail later, this detection unit signal includes an identification signal that identifies the number of the detection unit signal, and from this identification signal, in this case, It can be seen that the detection unit signal P ₄ was detected at time t ₄ , and from this, the timing t _P to be detected is
It can be seen that the time T _P is earlier than that. Therefore, this timing detection is equivalently performed by generating a detection signal at a timing delayed by T _P from this detection time point _t4 . Further, even if the signals P ₄ and P ₅ are not detected due to an error, if any one of the signals P ₁ to _{P 3} can be detected in the same way, this timing detection can be equivalently performed. As described above, the present invention detects a plurality of detection unit signals, and if any one detection unit signal is detected, desired timing detection can be performed. In the conventional detection method using one detection unit signal, if this detection unit signal is not detected due to an error such as dropout,
Timing detection is not performed. In other words, a complete malfunction will occur in response to an error such as a dropout. However, in the timing detection (start timing detection of the time axis compressed audio signal) in the examples shown in Figures 1 to 3, it is necessary to perform this timing detection reliably even if there is an error such as a dropout. This is inconvenient for timing detection such as. This is because, if this detection is not performed, the audio signal for that period (the audio signal for one field period) cannot be reproduced or is erroneously reproduced, resulting in a significant deterioration of the sound quality. This is an explanatory diagram showing a specific example of a detection unit signal, and as shown in the figure, it consists of a delimiter signal M and an identification signal N. In this concrete example, the delimiter signal M is a 4-bit signal.
The digital signal (A ₁ to _{A 4} ) and identification signal N are:
It consists of a 3-bit (B ₁ to _{B 3} ) digital signal. The delimiter signal M is a signal for distinguishing which bit signal from which bit signal is a detection unit signal or not, and is also a signal for detecting whether or not it is a detection unit signal. This detection was continuous in time because it was performed using the temporally continuous 4-bit (A ₁ to A ₄ ) signal. It is a signal (described later) that can be distinguished from other signals combining 4 bits (for example, A ₂ to A ₄ , B ₁ ). As mentioned above, the identification signal N is a signal for identifying which detection unit signal it is, and in the specific example of FIG. 6, it is a 3-bit signal, so it is 8
Species (000-111) can be identified. Note that the specific example in Figure 5 is an example in which five detection unit signals are used, and the identification signal
The number of bits should be at least 3 bits. In the example of FIG. 5, the number of identification unit signals is:
Although the number is 5, any number may be used. If this number is n and the detection unit signal period is T _P , then the detection signal period T is T = nT _P , but n should be such that this T is longer than the maximum dropout period T _D. Then, even if there is the longest dropout, any detection unit signal will be detected, so timing detection can be performed for any dropout. Even when T is smaller than T _D , the probability of false timing detection decreases as n increases, although it is not perfect. Once this number n is determined, the number R of bits of the identification signal is also determined according to this number n. For example, when the detection signal is composed of five detection unit signals P ₁ to P ₅ as in the specific example shown in FIG.
The number of bits of the identification signal N in each detection unit signal is
As shown in FIG. 6, 3 bits (B ₁ to B ₃ ) are sufficient. Table 1 shows an example of each identification signal N in this case.

[Table] The example in Table 1 is expressed in binary numbers according to the order of the detection unit signals, and other examples may be used as long as they can be identified. Next, an example of the delimiter signal M will be explained. Table 2 is an example of this signal.

[Table] This delimiter signal M consists of a temporally continuous 4-bit signal, and is composed of a temporally continuous 4-bit signal.
The signal must be distinguishable from other signals (for example, A ₃ , A ₄ , B ₁ , B ₂ ), and is limited by the identification signal N. For example, a case where the identification signal is as shown in Table 1 will be explained.

[Table] Table 3 is a table showing combinations of temporally continuous 4-bit signals. Combination 1 is the desired signal to be detected, and must be a signal that can be distinguished from other combinations of signals. The discrimination signal M is a signal as shown in Table 2 (A ₁ is 1, A ₂ ~
This distinction is possible if A ₄ is 0). Because the 1st bit in combinations 2 to 4 is A ₂ to _{A 4}
is 0, so both are 0, but the combination 1
Since this is the 1st bit of , combinations 2 to 4 can be distinguished from each other based on this difference. In addition, in combinations 5 to 7, any of the second to fourth bits contains A ₁ , and one of these bits is at least 1, but in combination 1, the Since the second to fourth bits are all 0, combinations 5 to 7 can be distinguished from each other by this difference. That is, the signals in combinations 2 to 7 cannot be the same as in combination 1. As described above, it can be seen that the example delimiter signal in Table 2 is a signal that satisfies the desired conditions, but other such signals (for example, 0111) can be considered. Also, although we have explained an example in which the number of bits of this delimiter signal is 4 bits, any number of bits of 4 bits or more can be used.
Bit is fine too. This is because if the number of bits is equal to or less than the number of bits of the identification signal, it becomes impossible to distinguish it from the identification signal, so the number of bits Q of the delimiter signal needs to be larger than the number of bits R of the identification signal. However, if the number of bits is increased too much, the detection signal period becomes correspondingly longer, and for example, when recording and reproducing this signal, a correspondingly larger number of recording media is required, which is not preferable in terms of recording density. Therefore, the preferred method for determining the number of bits is to determine the minimum number n of detection unit signals based on the nature of the error such as the longest dropout period, and then determine the minimum number R of identification signals according to this number n. In this method, the minimum number of bits Q (Q=R+1 is the minimum) of the delimiter signal is determined from this R. Note that the present invention provides a timing detection device for detecting desired timing, such as the start timing of an information signal, during reproduction or in a receiver when recording, reproducing, or transmitting an information signal in a recording/reproducing system or a signal transmission path. , and various applications can be considered as this application. For example, the examples shown in Figures 1 to 3 are examples of applications in which this device is effective.It can be used to detect the start timing of a time-base compressed audio signal during playback, and has the effect of increasing the reliability of this detection. be. Next, a specific configuration of the present invention will be explained. FIG. 7 is this basic block diagram, and FIG. 8 is a waveform diagram of each part. First, a control signal input to the control signal input terminal 1 is applied to the detection signal generation circuit 2. The detection signal generation circuit 2 is controlled by this control signal and generates a detection signal. Note that this control signal is a pulse signal as shown in FIG. 8A, and its rising time t _S is ahead of the timing t _P to be detected by a time T (a time corresponding to the detection signal period). Further, the detection signal from the detection signal generation circuit 2 is a digital signal having the timing as shown in FIG. 8B, and the signal starts at time t _S and ends at time t _P. For convenience of notation, Figure 8 B is
Although it is indicated by diagonal lines, the exact waveform will be described later. By applying a control signal at a time t _S that is T before the timing t _P that is desired to be detected during reproduction or in the receiver, a detection signal as shown in (b) can be obtained. For example, when detecting the start timing of a time-base compressed audio signal during playback as in the examples shown in FIGS. This will result in a signal for use. If this detection signal is added to the time-base compressed audio signal and recorded, the start timing can be detected by detecting the presence or absence of this detection signal during playback. Now, the examples shown in Figures 1 to 3 are examples of applications, and in general terms, the recording/reproducing system can also be considered as a type of transmission path, and in Figure 7, this detection signal is transmitted. Passing through path 3, detection circuit 4
shall be given to Note that this transmission line 3 may be a recording/reproducing system like the examples shown in FIGS. 1 to 3, or may be a wireless transmission or transmission line. Further, it may be a transmission line that transmits other signals (time-base compressed audio signals in the examples shown in FIGS. 1 to 3), or it may be a dedicated transmission line that does not transmit other signals. A possible application of this dedicated transmission line is to perform remote control using this timing detection. In this case as well, very reliable remote control can be performed even when the quality of the transmission path is poor, which is very effective. Next, the detection circuit 4 detects the presence or absence of this detection signal, outputs a detection signal as shown in FIG. Note that this detection signal is a pulse signal, and is a signal that rises at the timing t _P to be detected. In this way, by obtaining a detection signal having the same timing as the timing t _P to be detected, timing detection can be performed equivalently. Note that this detection signal differs depending on the purpose of use of the application example, but in the examples shown in Figures 1 to 3, it is used to control the operation to start writing the time-axis compressed audio signal to the memory during playback. It will be done. The above is the explanation of the basic block diagram of FIG. 7. Next, a specific example of the detection signal generation circuit 2 will be explained. First, before explaining the specific configuration, this circuit 2
The detection signal generated by this will be explained below. Since the principle of timing detection and the detection signal have already been explained in FIGS. 5 and 6, the waveform diagram of the detection signal in this specific example (see Table 1 and Table 1) is shown in FIG. 10A. As shown in the figure, this detection signal consists of a digital signal (in this case, a low level voltage signal when it is 0 and a high level voltage signal when it is 1).
Each detection unit signal is further comprised _{of 4-bit delimiter signals X1-X5 and 3 -} bit identification signals _Y1 - _Y5 . Note that each bit of each delimiter signal X ₁ to Y ₅ is a signal having 1000 pieces of information in chronological order, and each of the identification signals X ₁ to X5 is a signal having different information (see Table 2). In other words, in this detection signal, each detection unit signal is 7 bits.
It is made up of digital signals, so in total
It consists of a 35-bit digital signal. Next, a specific example of this detection signal generating circuit 2 will be explained with reference to FIG. 9, which is a block diagram thereof, and FIG. 10, which is a waveform diagram of each part thereof. First, at a time t _S that is a time T (corresponding to the detection signal period) from the timing t _P to be detected, the first
A control signal as shown in FIG. The set/reset flip-flop 13 is set by this control signal, and its output lightly shifts from a low level voltage to a high level voltage, as shown in FIG. , maintains high level voltage until reset. Next, this output is given to gate circuit 8 and gate circuit 10. On the other hand, a clock signal with a period T _C as shown in FIG. By the signal C, only the clock signal during the high level period of the signal C is gated. Therefore,
At the output of this gate circuit 10, a clock signal as shown in FIG. The counter 11 is a counter whose count increases by 1 each time one clock signal is applied, and at time _tS , it is reset by the control signal RO and becomes a count of 1. . Note that _FIG .
), it shows that it changed to 1 at time t _S. Then, each time one clock signal is given, the count value changes from 1 to 2, from 2 to 3, etc., and 35
At the time t _P (same timing as the timing to be detected) when the value changes from 36 to 36, the output of the decoder 12 becomes
As shown in FIG. 10, the level changes from a low level to a high level. Note that this decoder 12 includes a counter 1.
1 is given a signal corresponding to the count value, and this decoder 12 is composed of a logic circuit that outputs a high level output signal only when the count value is 36, and a low level output signal otherwise. It is a circuit. Next, the signal from this decoder 12 is given to a monostable multivibrator 14. The monostable multivibrator 14 is triggered at the rising edge of this signal and outputs a pulse signal that momentarily becomes high level at time _tP as shown in FIG. This signal is applied to the reset input of the reset flip-flop 13 to reset the reset flip-flop 13. Therefore, the output signal H of the set/reset flip-flop 13 changes from high level to low level at time _tP , and the output of the gate circuit 10 controlled by this output signal H The clock signal is no longer output as shown in Figure 10 (E). Therefore, since the clock signal is not applied to the count value of the counter 11 after time _tP , the count value of the counter 11 is maintained at that value until the next clock signal is applied. As a result, the count value of the counter 11 varies from 1 to 35 at every clock cycle from the time t _S when the control signal LO is applied to the timing t _P at which detection is to be performed.
It will change sequentially. Next, a signal corresponding to the count value of the counter 11 is applied as an address signal to the ROM (read only memory) 7 to control address selection. In addition, addresses 1 to 35 of this ROM7
The memory element at the address stores data corresponding to a desired detection signal. And counter 1
The data at the address corresponding to the count value of 1 is sequentially read out, and a digital signal corresponding to the data is given to the gate circuit 8. On the other hand, this gate circuit 8 is supplied with a signal C from the set/reset flip-flop 13 which is at a high level only during the detection signal period T, and the signal from the ROM 7 is supplied with the signal C which is at a high level only during the detection signal period T. Only the signal A is gated and outputted to the detection signal output terminal 15 as a desired detection signal A. The above is a description of a specific example of the detection signal generation circuit 2. This specific example is a description of a specific example of the circuit that generates the detection signal in the case of FIGS. 5 and 6 described above. Similarly, circuits that generate other detection signals can be similarly inferred. Furthermore, the circuit configuration is just one example, and other configurations may also be used. Next, the detection circuit 4 will be explained in detail. As already explained with reference to FIG. This is a circuit that detects a desired timing, and the specific circuit configuration differs depending on the detection signal. Therefore, as the detection signal, we assume a detection signal as shown in Fig. 10A,
A specific example at this time will be explained. Figure 11 shows this block diagram, Figure 12 and Figure 1.
Figure 3 is a waveform diagram of each part. First, the signal input to the detection signal input terminal 16 is
The detection signal P is given to the shift register 17. On the other hand, the shift register 17 is supplied with the clock signal C from the clock signal generation circuit 18, and each time this clock signal is supplied,
The data of the detection signal is shifted sequentially,
As a result, the signals at the outputs Q ₁ to Q ₇ of each stage are
The signal will be like this. Note that this clock signal C is generated from a detection signal by a PLL (fabric locked loop) or the like, and is a signal synchronized in phase with each data of the detection signal. Next, the output signals Q ₁ to _{Q 3} are provided to an identification signal decoder 19, and the output signals Q ₄ to _{Q 7} are provided to a discrimination signal decoder 20. The delimiter signal decoder 20 outputs signals Q ₄ to Q ₅ as 0, 0, and 0, respectively.
This circuit outputs an output signal G at a high level only when the signal is 0 or 1, and at a low level otherwise, and is constituted by a logic circuit. Therefore, a pulse signal G that rises at timings t ₁ and t ₂ that satisfies this condition can be obtained. On the other hand, in the identification signal decoder 19, when the signals Q ₁ to _{Q 3} are 0, 0, 1, only the g ₁ output terminal becomes high level; when the signals are 0, 1, 0, only the g ₂ output terminal becomes high level;
For 1, 1, only _g3 and the output terminal corresponding to the binary number are at high level, and the other signals are at low level. And these output signals g ₁ ~ _{g 5}
are applied to gate circuits 21-1 to 21-5, respectively. These gate circuits 21-1 to 21-5 include
Signal G from the delimiter signal decoder is applied, and only when this signal G is at high level, input signals g ₁ to _{g 5} pass; otherwise, it is at low level, and as a result, gate circuits 21-1 to 21-5, signals such as S ₁ and S ₂ in FIG. 12 are obtained. In addition, S ₃ ~
S ₅ has been omitted for convenience of notation, but t ₃ ~ _{t P}
A pulse signal similar to S ₁ to S ₂ is obtained only at the timing of . However, there are no errors due to dropouts etc.
In the case of normal detection, for example, for the signal S ₁ , the signals Q ₁ to _{Q 7} are 0, 0, 1, 0, 0,
A pulse signal is output only when it is 0 or 1, but
Otherwise, no output will occur. Next, these signals S ₁ to _{S 4} other than S ₅ are given to delay circuits 22-1 to 22-4, respectively, and delayed by _4TP , _3TP , _2TP , and _TP, respectively. Note that the delay circuits 22-1 to 22-4 are
Although omitted in the figure, they are 28, 21, and 1, respectively.
It consists of a 4- and 7-stage shift register and is driven by a clock signal C from a clock signal generation circuit 18. Therefore, the outputs of the delay circuits 22-1 to 22-4 are pulse signals having the same timing as _S5 , such as S1 _' to _S4 ' in FIG. It will be done. The OR circuit 23 performs OR logic, and if any of the input signals _S1 ' to _S4 ' and _S5 is a pulse signal, it rises at a desired timing _tP . The detection signal S is obtained and the detection signal output terminal 2
4 is output. The above is a description of a specific example, but other configurations may be used as long as they have similar functions. Further, even if the detection signal is another signal different from the above specific example, the same analogy can be made, although the configuration must be changed accordingly. As described above, according to the present invention, the timing detection method accurately detects the timing of the beginning of a unit section of a recording or transmission information signal during recording and reproduction or through a transmission path, during reproduction, or at a receiver. This is particularly effective against errors such as dropouts in recording and reproducing systems. In particular, when compressing the time axis of an audio signal and magnetically recording and reproducing it using a rotating head, the conventional method detects the start timing of the audio signal during playback.
This error in detecting dropouts has caused significant deterioration of the audio signal, but according to the present invention, highly reliable detection is possible.

[Brief explanation of drawings]

Fig. 1 is a diagram showing a recording pattern on a magnetic tape showing an example of a time axis compression recording method for audio signals, Fig. 2 is a plan view showing the main parts of a recording device using the same recording method, and Fig. 3 is the same operation. 4 is a waveform diagram for explaining the same operation, FIGS. 5 and 6 are operation explanatory diagrams for explaining the principle of the present invention, and FIG. 7 is a block diagram showing the basic configuration of the present invention. , FIG. 8 is an explanatory diagram of the same operation, FIG. 9 is a block diagram of an embodiment of the detection signal generating circuit of the present invention, FIG. 10 is a diagram explanatory of the same operation, and FIG. The block diagram of the embodiment, FIGS. 12 and 13, are explanatory diagrams of the same operation. 2...Detection signal generation circuit, 3...Transmission line, 4...Detection circuit, 7...ROM, 8, 10, 21...Gate circuit, 9, 18...Clock generator, 11...Counter, 12...Decoder, 13...Flip-flop ,
19...Identification signal decoder, 20...Separator signal decoder, 22...Delay circuit, 23...OR circuit.

Claims (1)

[Claims] 1. When recording, reproducing, or transmitting information signals,
In a timing detection signal transmission/reception method for recording/reproducing or transmitting/receiving a timing detection signal for detecting a desired timing such as a start timing of the information signal during reproduction or on a receiving side,
A first means for generating a timing detection signal consisting of a plurality of mutually distinguishable detection unit signals during recording or on the transmission side, and a second means for recording, reproducing, or transmitting the timing detection signal together with the information signal. a third means for detecting the presence or absence of each detection unit signal in the timing detection signal during reproduction or on the receiving side and obtaining a plurality of first detection signals according to the result; fourth means for obtaining a plurality of second detection signals having the same timing by delaying each of the first detection signals; and selecting at least one detection signal from among the plurality of second detection signals. . A timing detection signal transmission/reception system, comprising a fifth means for reproducing the timing detection signal.