JPH0159623B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integrating circuit capable of resetting an output voltage to an arbitrary value.

Integrating circuits using operational amplifiers have a simple circuit configuration and have been widely used. Since it is easy to set the accumulated charge of the capacitor (integrating capacitor) used for integration to zero at the start of integration by using a switch installed in parallel with the capacitor, the zero-reset type integrating circuit is
Traditionally used. However, for example, an integrating circuit used in the correlator of an automatic equalizer may have a non-zero output value at the start of equalization, so a reset-type integrating circuit that can be set to an arbitrary value is required. be.

SUMMARY OF THE INVENTION In view of these demands, it is an object of the present invention to provide a reset type integrating circuit which can be set to any output voltage value and has a simple circuit configuration.

According to the present invention, an operational amplifier including a capacitor in at least a feedback circuit, an inverting input terminal of the operational amplifier connected to the first switch element, and an output terminal of the operational amplifier connected via the second switch element. An integrating circuit is obtained that includes a first resistive element and a voltage source connected to a connection point between the first switch element and the first resistive element via a second resistive element.

Hereinafter, the present invention will be explained in detail using the drawings. FIG. 1 shows one embodiment of the present invention. A region 10 surrounded by a dashed line is a general integrating circuit. 2 is a resistive element that determines the time constant of integration, 3 is an operational amplifier, 4 is an integrating capacitor, and 5 is a voltage source that applies a bias voltage V _B. Also,
21 is an input terminal, and 22, 23, and 24 are an inverting input terminal, a non-inverting input terminal, and an output terminal of the operational amplifier 3, respectively. Area 3 surrounded by a dashed line
0 is a circuit that can set the output of the integrating circuit to an arbitrary value. 31, 32 are switches, 33, 34
is a resistive element, and 35 is a power supply for providing an arbitrary output voltage.

First, when switches 31 and 32 are closed,
That is, consider the reset state of the integrator. Due to the imaginary short of the operational amplifier 3, the inverting input terminal 22 is always set to the voltage _VB applied to the non-inverting input terminal 23. Therefore,
The current I ₁ flowing through resistor 2 changes the resistance value of resistor element 2 to R ₀
Assuming that the signal voltage input from the terminal 21 is V _I , I ₁ =(V _I −V _B )/R ₀ . In addition, the resistance value of the resistance element 34 is R ₂ , and the voltage value of the voltage source 35 is
When V _R is assumed, the current I ₂ flowing through the resistance element 34 is I ₂
= (V _R −V _B )/R ₂ . The resistance element 33 has
Since a current of (I ₁ + I ₂ ) flows, if the resistance value of the resistance element 33 is R ₁ , the voltage across the resistance element 33 is {(V _I −V _B )/R _O + (V _R −V _B ) /R ₂ }R ₁ , and the voltage Vout at the output terminal 24 is Vout=[V _B −
{(V _I −V _B )/R ₀ +(V _R −V _B )/R ₂ }R ₁ ]. That is, the output voltage Vout is always [V _B − {(V _I −
V _B )/R ₀ + (V _R − V _B )/R ₂ }R ₁ ]. Here, if the value of resistor element 2 is sufficiently larger than the value of resistor element 34 (R ₀ ≫ R ₂ ),
When selected, Vout becomes approximately {V _B −R ₂ /R ₁ (V _R −V _B )}, which is a constant value independent of the input signal V _I .
Since the voltage value Vout is a function of V _R , R ₁ , and R _{2 ,} the Vout can be set to any value by appropriately adjusting the resistance elements 33 and 34 and the voltage source 35 .

Next, when the switches 31 and 32 are opened, the voltage source 3
No current is injected from the terminal 21 into the integrating circuit 10 at all, and V _I is gradually integrated into the voltage Vout at the terminal 24 by the current injected from the terminal 21. If the time from the switches 31 and 32 is opened is T, the output voltage Vout is Vout={V _B −R ₁ /R ₂ (V _R −V _B )}−∫ ^T ₀ V ₁ −V _B /C ₀ R ₀
dt. The first term is an arbitrary set value given in advance, and the second term is an integral value of the input signal.

As described above, a reset type integrator that can be set to any value at the time of reset can be realized using a simple circuit. However, when the circuit shown in FIG. 1 is used, the set value changes depending on the input signal from the terminal 21. FIG. 2 is for canceling the influence of this input signal. The switch 6 is connected to the resistance element 2
and the inverting input terminal 22. Since the other components are exactly the same as those in FIG. 1, they are designated by the same numbers as in FIG. Switch 6 operates completely opposite to switches 31 and 32.

That is, during the reset period (switches 31 and 32 are closed), switch 6 is open, and during the integration period (switches 31 and 32 are open), switch 6 is closed. Therefore, the reset period is
Since the switch 6 is open, the influence of the input signal V _I input from the terminal 21 is completely eliminated, and the set value becomes [V _B −R ₁ /R ₂ (V _R −V _B )]. On the other hand, during the integration period, the switch 6 is closed, which is exactly the same as in FIG.

Therefore, by using FIG. 2, any accurate value can be set regardless of the input signal.

Resistance elements 33 and 34 in FIGS. 1 and 2
may be of any type as long as it has a function as a resistance element. In FIG. 3, an FET channel resistance is used instead of a resistance element.
36 was used in place of the resistor element 33 in Figure 1.
A voltage V ₁ is applied to the gate of the FET via a terminal 38 . 37 is a FET used in place of the resistive element 33 in FIG. 1, and a voltage V ₂ is applied to the gate of the FET via a terminal 39.
The other components are the same as those in FIG. 1, and therefore are indicated by the same numbers as in FIG.
FET channel resistance can be freely controlled by gate voltage. That is, an arbitrary value to be set can be freely selected depending on the voltage value V _R of the voltage source 35, the gate voltage value V ₁ of the FET 36, and the gate voltage value V ₂ of the FET 37. As mentioned above,
The resistance elements 33 and 34 in FIG. 1 may be active elements such as FETs.

Although FIG. 3 describes the case where the switch 6 shown in FIG. 2 is not provided, it goes without saying that the switch 6 may be provided.

Reset type integrating circuits have a very wide range of applications, including analog circuits and data acquisition circuits. In particular, the reset type integrating circuit of the present invention can be applied to various fields, with automatic equalizers being one example.

The integration circuit 10 used in the drawings is one example, and
Any integration circuit using an operational amplifier including a capacitor in the feedback circuit may be used. Also,
The switches 31, 32, and 6 may be any switches as long as they have a switching function, such as mechanical switches or electrical switches using FETs.

In FIG. 3, the first resistance element 36, the second
FET was used as the resistive element 37, but these are as follows.
Things that function as resistors, such as bipolar transistors, resistances attached to wiring, etc.
If so, the present invention is effective.

[Brief explanation of drawings]

FIG. 1 is for explaining the operation of the present invention. 10 is an integrating circuit, and 30 is an initial value setting circuit. Reference numerals 31 and 32 are switches for switching the integration circuit between a reset mode and an integration mode. The voltage source V _R and the resistors 33 and 34 are parts for setting arbitrary initial values. Figure 2 shows resistor 2 and terminal 2 in Figure 1.
A switch 6 is added between 2 and 2. In Figure 3, the resistors 33 and 34 in Figure 1 are FET38,
39 is a diagram showing that there is no problem even if the number is 39.

Claims (1)

[Claims] 1 An operational amplifier including at least a capacitor in its feedback circuit, a first switch element connected from the inverting input terminal of the operational amplifier, and a first resistance element connected from the output terminal of the operational amplifier via a second switch element. , a voltage source connected to a connection point between the first switch element and the first resistance element via a second resistance element.