JPH0178063U - - Google Patents

Info

Publication number
JPH0178063U
JPH0178063U JP1987174099U JP17409987U JPH0178063U JP H0178063 U JPH0178063 U JP H0178063U JP 1987174099 U JP1987174099 U JP 1987174099U JP 17409987 U JP17409987 U JP 17409987U JP H0178063 U JPH0178063 U JP H0178063U
Authority
JP
Japan
Prior art keywords
submount
optical semiconductor
view
solder
sides
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987174099U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987174099U priority Critical patent/JPH0178063U/ja
Publication of JPH0178063U publication Critical patent/JPH0178063U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
    • H10W72/07554—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図ａ，ｂ，ｃはこの考案の光半導体素子用
サブマウントの一実施例を示す平面図および正面
図ならびにサブマウントの裏面図、第２図ａ，ｂ
はこの考案の他の実施例を示す光半導体素子用サ
ブマウントの平面図および正面図、第３図ａ，ｂ
は従来の光半導体素子用サブマウントの平面図お
よび正面図を示す。 図において、１はサブマウント、２はメタライ
ズ層、３は半田層、４は半田層のくびれ部、５は
ＬＤチツプ、６はＬＤの発光点、７は放熱ブロツ
ク、８はレーザ光、９はワイヤボンド線、１０は
ワイヤボンド領域を示す。なお図中、同一符号は
同一または相当部分を示す。 Figures 1a, b, and c are a plan view and front view showing an embodiment of the optical semiconductor device submount of this invention, and a back view of the submount, and Figures 2a and b are
3a and b are a plan view and a front view of a submount for an optical semiconductor device showing another embodiment of this invention.
1 shows a plan view and a front view of a conventional submount for optical semiconductor devices. In the figure, 1 is a submount, 2 is a metallized layer, 3 is a solder layer, 4 is a constriction of the solder layer, 5 is an LD chip, 6 is a light emitting point of LD, 7 is a heat dissipation block, 8 is a laser beam, and 9 is a A wire bond line, 10, indicates a wire bond area. In the drawings, the same reference numerals indicate the same or corresponding parts.

補正 昭６３．２．４ 実用新案登録請求の範囲を次のように補正する
。Amendment February 4, 1983 The scope of claims for utility model registration is amended as follows.

【実用新案登録請求の範囲】 光半導体素子用サブマウントはダイボンドされ
る面が正方形となつており、 その両面にメタライ
ズ層、半田層が形成され、前記サブマウントの両
面の各辺毎に光のけられ防止用の部分的な半田が
除去された領域が形成されている事を特徴とする
光半導体素子用サブマウント。[Claims for Utility Model Registration] The submount for optical semiconductor devices has a square die-bonded surface, and a metallization layer and a solder layer are formed on both sides of the submount. A submount for an optical semiconductor device, characterized in that a region from which partial solder is removed to prevent light vignetting is formed on each side.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 光半導体素子用サブマウントはダイボンドされ
る面が正方形となつており、その面が正方形とな
つており、その両面にメタライズ層、半田層が形
成され、前記サブマウントの両面の各辺毎に光の
けられ防止用の部分的な半田が除去された領域が
形成されている事を特徴とする光半導体素子用サ
ブマウント。 The submount for optical semiconductor devices has a square die-bonded surface, and a metallized layer and a solder layer are formed on both sides of the submount, and each side of both sides of the submount has a square shape. A submount for an optical semiconductor device, characterized in that a region is formed where solder is partially removed to prevent it from being pushed out.
JP1987174099U 1987-11-12 1987-11-12 Pending JPH0178063U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987174099U JPH0178063U (en) 1987-11-12 1987-11-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987174099U JPH0178063U (en) 1987-11-12 1987-11-12

Publications (1)

Publication Number Publication Date
JPH0178063U true JPH0178063U (en) 1989-05-25

Family

ID=31465974

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987174099U Pending JPH0178063U (en) 1987-11-12 1987-11-12

Country Status (1)

Country Link
JP (1) JPH0178063U (en)

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