JPH0186312U

JPH0186312U -

Info

Publication number: JPH0186312U
Application number: JP18163787U
Authority: JP
Priority date: 1987-11-28
Filing date: 1987-11-28
Publication date: 1989-06-07

Description

[Brief explanation of the drawing]

第１図は本考案の一実施例となる利得制御型増
幅器を示す回路図、第２図及び第３図は第１図の
回路構成中の負荷回路の他の具体例を示す回路図
、第４図は従来の利得制御型増幅器の一例を示す
回路図である。１１……第１のトランジスタ、１２……第２の
トランジスタ、１３……第３のトランジスタ、１
４……第４のトランジスタ、１５……入力信号源
、１６……負荷抵抗、１７……出力端子、２１…
…第１の差動増幅器、２２……第２の差動増幅器
、２３……第１の電流源、２４……制御信号入力
端子、３１，３２……Ｐ型ＭＯＳトランジスタ、
３３……定電流源。 FIG. 1 is a circuit diagram showing a gain control type amplifier as an embodiment of the present invention, FIGS. 2 and 3 are circuit diagrams showing other specific examples of the load circuit in the circuit configuration of FIG. FIG. 4 is a circuit diagram showing an example of a conventional gain control type amplifier. 11...first transistor, 12...second transistor, 13...third transistor, 1
4... Fourth transistor, 15... Input signal source, 16... Load resistor, 17... Output terminal, 21...
...First differential amplifier, 22...Second differential amplifier, 23...First current source, 24...Control signal input terminal, 31, 32...P-type MOS transistor,
33... constant current source.

Claims

[Claims for Utility Model Registration] First and second transistors whose sources or emitters are commonly connected, and between the gate or base of the first transistor and the gate or base of the second transistor. It has a first differential amplifier to which an input signal is supplied, and third and fourth transistors whose sources or emitters are commonly connected, and whose drains or collectors are connected to the first transistor. the drain or collector of the fourth transistor is connected to the drain or collector of the second transistor, at least one of which is connected to the first reference potential via a load circuit; a second differential amplifier, wherein the gate or base of a third transistor is connected to the gate or base of the second transistor, and the gate or base of the fourth transistor is connected to the gate or base of the first transistor; and a first current source whose current is controlled by the control signal and which is inserted and connected between the common source or common emitter of the first differential amplifier and the second reference potential; A gain control type amplifier comprising: a second current source in which the increasing and decreasing directions of current are controlled in opposite directions and connected to the common source or common emitter of the second differential amplifier.