JPH0193140A - Wafer testing device - Google Patents

Abstract

PURPOSE:To make the multiple simultaneous inspections feasible even if high speed operating elements are included by a method wherein, besides the terminal group in contact with one another through the intermediary of bonding pad and probe provided on elements, GND parts divided into the same numbers as those of elements to be inspected simultaneously are provided to make the potential impressed thereon correspond to elements. CONSTITUTION:GND parts divided into 5a, 5b are connected to probe couples 2a, 2b respectively through the intermediary of a printed wiring, terminals 4c, 4h provided on the surface side of board main body 1 and another printed wiring provided on the rear side of main body. The other parts are made entirely similar to the normally composed main body. Through these procedures, the high speed operating elements can be simultaneously judged by changing the voltage impressed on the GND parts 5a, 5b similar to the case of relatively low speed operating elements to cut down the inspection time.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a wafer test device, and particularly to a multi-measurement probe board that can simultaneously test a plurality of integrated circuit elements formed on a semiconductor wafer during a wafer test. It is something.

[Conventional technology]

Conventionally, in wafer testing, when a plurality of high-speed operating elements formed on a semiconductor wafer are simultaneously tested, a wafer testing apparatus comprising a multi-measurement probe board as shown in FIG. 3 has been used. Figure 4 is a complimentary view of Figure 3. In both figures, 1 is a board main body, and two groups of probe needles each consisting of a plurality of probe needles 2 are mounted on a probe needle fixing part in the left and right regions of the approximately central part of the board main body 1 so that two elements can be tested simultaneously. Fixed by 3. Further, each probe needle 2 has a group of probe needles in the right region connected to a plurality of terminals 4a provided in the right region of the outer periphery of the board main body 1.
The terminal group consisting of ~4d and the printed wiring provided on the back side of the board body 1 are electrically connected, and the probe needle group on the left side area is provided on the left side area of the outer periphery of the board body 1. It is electrically connected to a terminal group consisting of a plurality of terminals 4e to 4h via printed wiring provided on the back side of the board body 1. Further, a GND portion 5 is provided on the front side of the board body 1 so as to surround the probe needle 2, and a GND probe needle 28.2b to which a GND potential is applied in the probe needle 2 is provided on the back side of the board body 1. It is electrically connected to the GND portion 5 through printed wiring and terminals 4c and 4h provided on the side, and printed wiring and metal wires provided on the front side of the board body 1. In addition, 6a.

6b is a capacitor, and this capacitor 6a.

6b is connected between the GND section 5 and terminals 4a and 4t to which a power supply potential (hereinafter referred to as rVCCJ) is applied, in order to suppress fluctuations in the voltage applied to the element to be measured. Here, why capacitor 5a as above
, 5b should be provided will be explained in detail below.

When testing conventional devices with relatively slow operating speeds, such as the CMOS logic 4000B series, voltage fluctuations caused by device operation do not pose a major obstacle to testing.
A capacitor 5a is connected between the terminals 4a, 4f and the GND section 5.
5b is not necessary. This is because such an element as described above has a large margin against voltage fluctuations. - On the other hand, devices with high-speed operation, such as HCM OS (=
The HiOhspeed CHO3) series has a small margin against voltage fluctuations, so in order to suppress voltage fluctuations, it is necessary to connect capacitors 6a and 6b between terminals 4a and 4f that apply VCC and terminals 4c and 4h that apply GND. There is. However, when actually mounting the capacitors 6a and 6b on the board body 1, one end of the capacitors 5a and 6b must be connected to the terminals 4c and 4h to which the GND potential is applied due to the space on the board body 1. Since it is difficult to connect GN, which is relatively easy to connect,
j) One ends of capacitors 6a and 6b are connected to section 5.

Next, a description will be given of the operation performed when performing an inspection using the wafer test apparatus configured as described above. During wafer testing, these terminals 4a to 4h are connected to a tester (not shown). First, the probe needles 2 electrically connected to the terminals 4a to 4d are pressed against the bonding pads of the first elements on the wafer, and
The probe needles 2 electrically connected to the probes 8 to 4h are pressed against the bonding pads of the second element located adjacent to the first element. Next, electrical signals are applied from the tester to the first and second elements to simultaneously test the pixel elements. In other words, a tester (not shown)
to terminals 4a to 4d.

While applying a signal under a certain condition to the first element through the probe needle 2 and the GND probe needle 2a, the probe needle 2. Signals and the like outputted via the GND probe needle 2a and the terminals 4a to 4d are taken out, and based on these signals, a tester determines whether the first element is good or bad.

Similarly to the above, signals are exchanged between the tester and the second element (not shown) via the probe needle 2 electrically connected to the terminals 40 to 4Q, and the second element is tested. This is carried out in parallel with the inspection of the first element.

When the testing of the two elements is completed, the next two elements to be tested are moved to predetermined positions, and the quality of each element is determined in the same manner as above. Furthermore, these series of operations are repeated for all elements on the semiconductor chip.

[Problem that the invention seeks to solve]

When inspecting elements on a semiconductor wafer, one of the aspects of inspecting the elements on the wafer is measuring leakage current flowing between a VCC power supply terminal and a GND power supply terminal while the element is in operation. When measuring leakage current, apply voltage under a certain condition to each of the two elements at the same time, and measure vCC.
Measure the current flowing between the power supply terminal and the GND power supply terminal. However, in the conventional wafer test equipment, since the capacitors 6a and 6b are connected by the GND part 5 as described above, when the leakage current of one element is being measured, the leakage current of the other element is connected to the GND part 5. and flows into the capacitors 6a and 6b. For example, if we consider the case of measuring the leakage current of the first element, when measuring the leakage current of the first element, in addition to the leakage current of this element, there is a part of the leakage current of the second element. flows through the capacitor into the system that measures leakage current in the tester. Therefore, the leakage current of the first element cannot be accurately measured. The same applies to the second element.

As described above, when a plurality of fast-operating devices are simultaneously tested, there is a problem in that the conventional wafer test apparatus cannot accurately determine the quality of each device.

The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a wafer test apparatus that can simultaneously test a plurality of fast-moving devices.

[Means for solving problems]

A wafer test apparatus according to the present invention includes a group of probe needles that contact bonding pads provided on the element and exchange potentials, signals, etc. when testing an element formed on a semiconductor wafer; A plurality of sets of terminals electrically connected to the board are provided on the board main body so that a plurality of devices can be tested simultaneously, and a GND portion to which a GND potential is applied is provided on the board main body. In the wafer test apparatus, the GND portion is divided into the same number of devices to be tested simultaneously, and the GND potential to be applied to each device is also applied to the GND portion corresponding to that device.

[Effect]

The wafer test apparatus according to the present invention is configured such that the GND part is divided into the same number of elements as the number of elements to be tested simultaneously, and the GND potential to be applied to each element is also applied to the GND part corresponding to that element. Therefore, when measuring the leakage current of one semiconductor chip, the leakage current of the other semiconductor chip does not flow into the capacitor and the GND part, allowing accurate measurement.
Since a plurality of elements can be tested simultaneously, testing time can be shortened.

〔Example〕

FIG. 1 is a plan view of a wafer test apparatus according to an embodiment of the present invention, and FIG. 2 is a back view of FIG. 1. In both figures, 5a and 5b are divided GND parts, and each GND part 5a and 5b is connected to printed wiring and terminals 4c and 4h provided on the surface side of the board body 1, respectively.
It is also connected to GND probe needles 2a and 2b via printed wiring provided on the back side of the board body 1.

Other aspects are exactly the same as before.

The wafer test apparatus configured as described above performs inspection in the same manner as in the past. However, unlike in the past, the GND portions 5a and 5b are divided, so the system for testing the negative element and the system for testing the other element are electrically completely separated, making it possible to measure the leakage current of one element. This prevents the leakage current of the other element from flowing into the other element while the other element is in use, and allows accurate measurement of the leakage current of two elements at the same time. Therefore, it is possible to determine the quality of two devices at the same time, even for devices that operate quickly, in the same way as for devices that operate relatively slowly, and the inspection time can be shortened.

Note that in the above embodiment, a multi-type that can test two elements at the same time has been described, but for a multi-type that can test three or more elements at the same time, the GND portion 5 is connected to the element in the same manner as above. The same effect as in the above embodiment can be achieved by dividing the number by the number corresponding to .

(Effects of the Invention) As described above, according to the present invention, the GND part is divided into the same number of elements as the number of elements to be tested simultaneously, and the GND potential to be applied to each element is also applied to the GND part corresponding to that element. Since the present invention is constructed so as to be configured so that a plurality of fast-operating devices can be accurately tested simultaneously, a wafer test apparatus is obtained, and the test time can be shortened.

[Brief explanation of the drawing]

Fig. 1 is a plan view showing an embodiment of the present invention, Fig. 2 is a back view of Fig. 1, Fig. 3 is a plan view of a conventional wafer test equipment, and Fig. 4 is a back view of Fig. 3. be. In the figure, 1 is the board body, 2 is the probe needle, 2a,
2bG; probe needle for tGND, 5a and 5b are GND parts. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] (1) When testing an element formed on a semiconductor wafer, a group of probe needles that contact bonding pads provided on the element and exchange potentials and signals, and a group of probe needles that are electrically connected to the group of probe needles. In a wafer test apparatus, a plurality of terminal groups are provided on a board main body so that a plurality of devices can be tested simultaneously, and a GND portion to which a GND potential is applied is provided on the board main body. , a wafer test characterized in that the GND part is divided into the same number of elements as the number of elements to be tested simultaneously, and the GND potential to be applied to each element is also applied to the GND part corresponding to that element. Device.