JPH0193143A - Manufacture of semiconductor substrate - Google Patents

Abstract

PURPOSE:To make possible a reduction in the intervals between elements by a method wherein roughnesses are respectively formed on the surfaces on each one side of first and second semiconductor substrates and are each covered with an insulating layer, the roughnesses are respectively engaged with each other and are fitted in each other using a fluid bonding agent, the substrates are removed while the roughnesses are remained and the elements are respectively provided on the roughness parts. CONSTITUTION:An N<+> layer 2 is deposited on the surface on one side of an N<-> Si substrate 1 and is covered with an SiO2 layer 3, the side of the layer 3 is supported by another substrate 4, an etching is performed to form parts consisting of the substrate 1 and the layer 2 as roughnesses 5 formed at intervals and the roughnesses 5 are encircled with an SiO2 layer 6. Moreover, the same treatment as the above is performed on a P<-> Si substrate 7 to form roughnesses 10 consisting of the substrate 7 covered with an SiO2 layer 12 and a P<-> layer 11 on this surface layer part and these roughnesses 5 and 10 are fitted in each other using a bonding agent while the roughnesses 5 and 10 are engaged with each other. After that, the substrates other than the roughnesses 5 and 10 are etched and removed and necessary elements are respectively formed on the roughnesses 5 and 10, which are completely insulated in the row direction. A reduction in the intervals between the elements is made possible in such a way and the utilization factor of a space is improved.

Description

[Detailed description of the invention] (Industrial application field) This invention relates to a method for manufacturing a semiconductor substrate.

(Prior Art and Problems) Conventionally, in dual-type transistors such as P-channel transistors and N-channel 1 to transistors used in power transistors, space was required between the elements of the P-channel transistor and the N-channel transistor. However, there was a limit to the ability to shorten the distance between pixel elements and compress the power element.

(Objective of the Invention) An object of the present invention is to solve the above-mentioned problems and provide a semiconductor substrate in which elements can be compressed.

(Means for Solving the Problems) In order to achieve the above object, the present invention includes a step of forming an insulating layer on the uneven surface after forming unevenness on the main surface of a first semiconductor substrate, and a step of forming an insulating layer on the uneven surface. forming an uneven surface on the main surface of the semiconductor substrate, and fitting the uneven surface of the first semiconductor substrate and the uneven surface of the second semiconductor substrate to each other via a fluid adhesive material; A step of curing the adhesive material to bond the uneven surfaces of both semiconductor substrates in close contact with each other; The gist thereof is a method of manufacturing a semiconductor substrate, which includes a step of removing unnecessary portions.

(Operation) Irregularities are formed on the main surface of the first semiconductor substrate, and an insulating layer is formed on the uneven surface, and recesses and recesses are formed on the main surface of the second semiconductor substrate, and the first semiconductor substrate The uneven surface of the second semiconductor substrate and the uneven surface of the second semiconductor substrate are fitted to each other via a fluid adhesive material, and the uneven surface of the semiconductor substrate is bonded in a tight state by curing the adhesive material. . Further, an unnecessary portion of the first or second semiconductor substrate is removed from the other surface of at least one of the semiconductor substrates.

As a result, substrates for forming elements that are insulated via the insulating layer are alternately formed on the uneven portions of the first and second semiconductor substrates.

- (Example) An example embodying the present invention will be described below with reference to the drawings.

FIGS. 1A to 1J are cross-sectional views for explaining the manufacturing process of a semiconductor substrate.

First, as shown in FIG. 1(a), an N layer 2 is formed on the main surface of a -1 3i substrate 1, and an 8102 layer 3 as an insulating layer is roughly laminated on the N layer 2. Further, another 3i substrate 4 is prepared, and both 3 and 4 are placed facing each other so that the SiO layer 3 is located on the 3i substrate 4, and the two 3 and 4 are bonded together (FIG. 4(b)). For this bonding method, BPS
This can be carried out by melting with G or the like, direct bonding, or anodizing, bonding, or the like. The substrate bonded in this manner becomes a first semiconductor substrate.

Roughly, as shown in the same figure (C), a plurality of recesses are formed by etching in a predetermined region of the main surface of this substrate to form an uneven surface 5, and the uneven surface (on the convex surface) is Five layers 02 and 6 are formed as insulating layers.

On the other hand, as shown in FIG. 4(d), 5102 layers 8 are laminated on the main surface of the P- Si substrate 7. Then, another Si substrate 9 is prepared, and both 8 and 9 are placed facing each other so that the 5 layer 02 layer 8 is located on top of the 3i substrate 9, and both 8 and 9 are bonded together (FIG. 3(e)) ). This bonding method is carried out by melting using the above-mentioned BPSG or the like, direct bonding, anodizing bonding, or the like. The substrate bonded in this manner becomes a second semiconductor substrate.

Next, as shown in FIG. A P- layer 11 is formed in the part.Furthermore, the P- layer 11
An 8102 layer 12 as an insulating layer is laminated on the upper surface of the 8102 layer 12. Then, as shown in FIG. 3(Q), a BPSG film 13 as an adhesive material is formed on the entire upper surface.

Subsequently, as shown in FIG. 5(h), the uneven surface (main surface) of the first semiconductor substrate shown in FIG.
The uneven surfaces (main surfaces) of the second semiconductor substrate shown in > are fitted into each other. - In the same figure (h), the first semiconductor substrate is arranged at the bottom and the second semiconductor substrate is arranged at the top. Then, from this state, the BPSG film 13 is heated to fluidize the BPSG film 13 and then returned to room temperature to harden, thereby bonding the first semiconductor substrate and the second semiconductor substrate. During this heat treatment, the BPSG is melted and fluidized, so that the uneven surfaces of both substrates are adhered in close contact with each other without any gaps, and there is no need to fill the space (gap) with an insulator.

After bonding both substrates in this way, as shown in the same figure (i), the 3i substrate 4.9 is etched from both the upper and lower surfaces to remove unnecessary portions of the first and second semiconductor substrates. An etching solution is used to prevent damage to the substrate that is intended to be used.

After etching, s for contacting N”l12.
+ A predetermined region of the O2 layer 3 is etched to form a contact hole 14.

Then, as shown in FIG. 6J, a metal portion 15 layer made of a conductive material such as aluminum is formed on the lower surface by vapor deposition or sputtering, and the upper surface is polished.

Then, as shown in FIG. 2, for the semiconductor substrate thus manufactured, an N-channel power transistor 16 is alternately placed on the N- 81 substrate 1, and a P-channel power transistor 17 is placed on the P- Si substrate 7. to form. here,
18 is a P diffusion layer, 19 is an N diffusion layer, 20 is a gate electrode, 21 is a source electrode, 22 is an N diffusion layer, 23 is a P diffusion layer, 24 is a gate electrode, 25 is a source electrode, and 26 is a drain electrode. .

In this example, the insulating layer (Si02) 3.6.12
- Since the substrates forming each element are arranged in a horizontally insulated state, the distance between the elements can be very short, and the power It becomes possible to downsize the device. In addition, by adhering two different conductivity type substrates, completely independent N-type and P-type substrates are constructed with insulators, so no parasitic elements are created, and each element is stable and less susceptible to the effects of each other. The operating elements can be made small.

Furthermore, by changing the shape of the unevenness, the substrate area of each element structure can be arranged regularly or irregularly. Furthermore, similarly, by changing the shape of the unevenness, it is possible to selectively manufacture a substrate having a desired area. Furthermore, it is also possible to create three-dimensional elements using the same semiconductor substrate.

Furthermore, since the uneven surfaces of both substrates were bonded by melting and fluidizing the BPSG film 13 through the BPSG film 13, the uneven parts could be brought into close contact with each other without any gaps, and the process of filling the gaps could be performed. You'll be better off without it.

In general, since BPSG was used as the adhesive material in this example, it is possible to manufacture a semiconductor substrate using an existing semiconductor manufacturing process (adhesion process using BPSG) without incorporating a special process such as applying an adhesive material. can.

Note that this invention is not limited to the above embodiments,
For example, in the above embodiment, BPSG was melted when bonding the first and second substrates on which irregularities were formed. It is also possible to form an adhesive that is fluid at room temperature using a spinner or the like, press both substrates to completely fill the gap between the two wafers (substrates), and then harden them by heat treatment to bond them. . Furthermore, the adhesive material may be a room-temperature-curing adhesive that can be cured at room temperature, in addition to such a heat-curing adhesive.

Further, the substrate may be formed as shown in FIGS. 3(a) to 3(d).

That is, as shown in FIG. 3(a), an unevenness 28Tc is formed on the main surface of the P- substrate 27, and a P+ layer 29 is formed on the upper surface thereof. Furthermore, S as an insulating layer on top of it! 02 layers 30 layers stack 0. On the other hand, as shown in FIG. 3(b), N+
An N− layer 32 is formed on the main surface of the substrate 31, and the N− layer 32 is roughly formed on the main surface of the substrate 31.
f! ! Irregularities 33 are formed on the main surface of 32. A Si02 layer 34' as an insulating layer is formed on the entire surface of the uneven surface, and a BPSG film 35 is formed as an adhesive material. Subsequently, as shown in FIG. 3(C), the uneven surface of the first semiconductor substrate shown in FIG. 3(a) and the uneven surface of the second semiconductor substrate shown in FIG. 3(b) are The BPSG film 35 is bonded by fitting and bonding. Thereafter, as shown in FIG. 3(d), the upper surface is polished to remove unnecessary portions.

Then, as shown in FIG. 4, elements 16 and 17 similar to those shown in FIG. 2 are formed.

In this case, the cost can be considerably reduced compared to the method described above.

Further, in each of the above embodiments, the insulating layer was formed on the uneven surfaces of both the first and second semiconductor substrates, but the insulating layer was formed only on either the first or second semiconductor substrate. Good too. Furthermore, BPSG is formed on the uneven surface of either the first or second semiconductor substrate and the two substrates are bonded together. May also be used as adhesive material (
(The adhesive material may be the insulating layer itself).

Furthermore, in each of the above embodiments, two substrates (wafers) for forming devices are of different conductivity types, but substrates of the same conductivity type but with different concentrations may be used.

Effects of the Invention As detailed above, according to the present invention, the uneven surface of the first semiconductor substrate and the uneven surface of the second semiconductor substrate are in close contact with each other, and can be completely insulated by the insulating layer. It has an excellent effect of making effective use of space and compressing it.

[Brief explanation of the drawing]

1(a)-('') are cross-sectional views for explaining the manufacturing process of a semiconductor substrate embodying the present invention, and FIG. 2 is a view for explaining a semiconductor device manufactured using the semiconductor substrate. ,
3(a) to 3(d) are cross-sectional views for explaining the manufacturing process of a semiconductor substrate by scraping, and FIG. 4 is a diagram for explaining a semiconductor device manufactured using the semiconductor substrate. 1 is an 81 substrate, 3 is an 8102 layer as an insulating layer, 6 is a SiO2 layer as an insulating layer, 7 is a 3i substrate, 12 is a SiO2 layer as an insulating layer, 13 is BPSG as an adhesive material
27 is a P-substrate, 30 is a SiO2 layer as an insulating layer, 31 is an N substrate, 34 is a SiO2 layer as an insulating layer,
35 is a BPSG film as an adhesive material. Patent applicant Nippondenso Co., Ltd. Agent
Patent Attorney On 1) Hironobu (a) (C) (d)

Claims (1)

[Claims] 1. After forming irregularities on the main surface of the first semiconductor substrate, forming an insulating layer on the irregular surface; and forming irregularities on the main surface of the second semiconductor substrate. , After fitting the uneven surface of the first semiconductor substrate and the uneven surface of the second semiconductor substrate to each other via a fluid adhesive material, the unevenness of both semiconductor substrates is removed by curing the adhesive material. The method is characterized by comprising the steps of adhering the semiconductor substrates with their surfaces in close contact with each other, and removing an unnecessary portion of the semiconductor substrate from the other surface of at least one of the first and second semiconductor substrates. A method for manufacturing a semiconductor substrate. 2. The method of manufacturing a semiconductor substrate according to claim 1, wherein the adhesive material is the insulating layer itself. 3. The method for manufacturing a semiconductor substrate according to claim 1, wherein the adhesive material is BPSG.