JPH0194697A - Multilayer printed wiring board - Google Patents
Multilayer printed wiring boardInfo
- Publication number
- JPH0194697A JPH0194697A JP25206987A JP25206987A JPH0194697A JP H0194697 A JPH0194697 A JP H0194697A JP 25206987 A JP25206987 A JP 25206987A JP 25206987 A JP25206987 A JP 25206987A JP H0194697 A JPH0194697 A JP H0194697A
- Authority
- JP
- Japan
- Prior art keywords
- throughhole
- wiring board
- printed wiring
- multilayer printed
- extending
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims description 11
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 238000005553 drilling Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000007747 plating Methods 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 238000003672 processing method Methods 0.000 description 2
- 230000004308 accommodation Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、印刷配線板に関し、特に内層を2層以上有す
る多層印刷配線板に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a printed wiring board, and particularly to a multilayer printed wiring board having two or more inner layers.
近年、多層印刷配線板の高密度化は著しく、20層以上
の導体層を有する高多層印刷配線板が出現している。こ
の場合、板厚は必然的に厚くなる一方、十分な配線収容
性を確保するため、スルーホール径は、小さくなり、例
えばアスペクト比4.0’ /”0.4=10以上が必
要とされるようになってきた。一方、アスペクト比が高
くなるにつれ、ドリルによるスルーホール穴あけ加工は
難かしくなり、ステップ穴あけ法や表裏加工法が考案さ
れ、実用に供せられている。In recent years, the density of multilayer printed wiring boards has increased significantly, and highly multilayer printed wiring boards having 20 or more conductor layers have appeared. In this case, while the plate thickness inevitably becomes thicker, the through-hole diameter becomes smaller in order to ensure sufficient wiring accommodation.For example, an aspect ratio of 4.0'/"0.4=10 or more is required. On the other hand, as the aspect ratio increases, it becomes difficult to drill through-holes with a drill, so step drilling methods and front-back processing methods have been devised and put into practical use.
第2図は従来の多層印刷配線板2の側面図であり、内装
導体層1を積層した多層印刷配線板2に表裏貫通スルー
ホール3が設けられている。FIG. 2 is a side view of a conventional multilayer printed wiring board 2, in which front and back through holes 3 are provided in the multilayer printed wiring board 2 on which internal conductor layers 1 are laminated.
しかしながら、第2図に示す如く、従来の内層導体層1
を積層してなる多層印刷配線板2においては、ステップ
穴あけ法や表裏加工法によるスルーホール加゛工で穴あ
け位置の誤差や、ドリル径精度の影響により、加工後の
表裏貫通スルーホール3の内壁に段差を生じてしまい、
スルーホールめっき後のめっきの接続信頼性が悪化する
という欠点を有していた。However, as shown in FIG.
In the multilayer printed wiring board 2 formed by laminating layers, the inner walls of the front and back penetrating through holes 3 after processing may be affected by errors in the drilling position and drill diameter accuracy during through hole processing using the step drilling method or the front and back processing methods. There is a step in the
This had the disadvantage that the connection reliability of the plating after through-hole plating deteriorated.
例えば板厚6.0mmのポリイミド材による印刷配線板
の場合、穴径0.35mmで表裏加工をした場合には、
MIL−FTQ−107に規定する接続信頼性試験にお
いて、20サイクル印加後で接続抵抗の上昇が認められ
、第3図の如<40サイクル印加で接続不良を発生し始
め、それ以後急激に不良が増大する傾向にある。また、
これら接続不良部の断面観察の結果、穴加工時に発生す
る段差の部分でT/Hめっきのバレルクラックが発生し
ていることが明らかになった。For example, in the case of a printed wiring board made of polyimide material with a board thickness of 6.0 mm, if the front and back sides are processed with a hole diameter of 0.35 mm,
In the connection reliability test specified in MIL-FTQ-107, an increase in connection resistance was observed after 20 cycles of application, and as shown in Figure 3, connection failures began to occur after 40 cycles of application, and after that, failures rapidly occurred. It tends to increase. Also,
As a result of cross-sectional observation of these connection failures, it was revealed that barrel cracks in the T/H plating occurred at the step portions that occur during hole drilling.
上述した従来の多層印刷配線板に対し、本発明はコスト
アップにつながる製造精度の向上を行なわずとも高い接
続信頼性を有する多層印刷配線板が得られるという独創
的内容を有する。In contrast to the above-mentioned conventional multilayer printed wiring board, the present invention has an original content in that a multilayer printed wiring board having high connection reliability can be obtained without improving manufacturing accuracy which would lead to an increase in cost.
本発明は、内層導体層を2層以上有する多層印刷配線板
において、表裏貫通スルーホールに併設して内装導体層
間に導電貫通孔を設けたことを特徴としている。The present invention is characterized in that, in a multilayer printed wiring board having two or more inner conductor layers, conductive through holes are provided between the inner conductor layers in parallel with the front and back through holes.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は、本発明の一実施例の断面図である。FIG. 1 is a sectional view of one embodiment of the present invention.
内層導体層1を2つ有する多層印刷配線板2′において
、表裏貫通スルーホール3と内層スルーホール4を接続
する導体パターン5を設ける。電気信号は、表裏貫通ス
ルーホール3を通過すると同時に導体パターン5を介し
て内層スルーホール4も通過する。In a multilayer printed wiring board 2' having two inner conductor layers 1, a conductor pattern 5 is provided to connect front and back through holes 3 and inner layer through holes 4. The electrical signal passes through the front and back through holes 3 and at the same time passes through the inner layer through holes 4 via the conductor pattern 5.
かかる構造を有する本実施例の板厚6.0mmのポリイ
ミド材による多層印刷配線板の接続信頼性は、前述した
MIL法による試験における結果は、第2図に示す如く
200サイクルまで、接続不良なしの結果を得た。As for the connection reliability of the multilayer printed wiring board made of polyimide material with a board thickness of 6.0 mm according to this example having such a structure, the results of the above-mentioned MIL method test showed that there were no connection failures up to 200 cycles as shown in Figure 2. I got the result.
以上説明したように本発明は、表裏貫通スルーホール途
中に内層スルーホールを経由する導電経路を併設するこ
とにより、表裏貫通スルーホールの接続信頼性が製造精
度のばらつきのため悪化しても、導電経路としての信頼
性を保持できる効果がある。As explained above, the present invention provides a conductive path via an inner layer through-hole in the middle of the front and back through-holes, so that even if the connection reliability of the front and back through-holes deteriorates due to variations in manufacturing precision, the conductive path This has the effect of maintaining reliability as a route.
第1図は、本発明の一実施例の多層印刷配線板の構造を
示す断面図、第2図は、従来の多層印刷配線板の構造を
示す断面図、第3図は、第1図に示す実施例と第2図に
示す従来の多層印刷配線板のMIL−3TD−107法
による接続信頼性を比較した結果を示すグラフである。
1・・・内層導体層、2・2′・・・多層印刷配線板、
3・・・表裏貫通スルーホール、4・・・内層スルーホ
ール、5・・・導体パターン。FIG. 1 is a sectional view showing the structure of a multilayer printed wiring board according to an embodiment of the present invention, FIG. 2 is a sectional view showing the structure of a conventional multilayer printed wiring board, and FIG. 3 is similar to FIG. 1. 3 is a graph showing the results of comparing the connection reliability of the example shown in FIG. 2 and the conventional multilayer printed wiring board shown in FIG. 2 according to the MIL-3TD-107 method. 1... Inner conductor layer, 2.2'... Multilayer printed wiring board,
3... Front and back through holes, 4... Inner layer through holes, 5... Conductor pattern.
Claims (1)
、表裏貫通スルーホールに併設して内層導体層間に導電
貫通孔を設けたことを特徴とする多層印刷配線板。A multilayer printed wiring board having two or more inner conductor layers, characterized in that a conductive through-hole is provided between the inner conductor layers in parallel with the front and back through-holes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25206987A JPH0194697A (en) | 1987-10-05 | 1987-10-05 | Multilayer printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25206987A JPH0194697A (en) | 1987-10-05 | 1987-10-05 | Multilayer printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0194697A true JPH0194697A (en) | 1989-04-13 |
Family
ID=17232118
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25206987A Pending JPH0194697A (en) | 1987-10-05 | 1987-10-05 | Multilayer printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0194697A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02275695A (en) * | 1989-04-17 | 1990-11-09 | Nec Corp | Multilayer printed circuit board |
-
1987
- 1987-10-05 JP JP25206987A patent/JPH0194697A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02275695A (en) * | 1989-04-17 | 1990-11-09 | Nec Corp | Multilayer printed circuit board |
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