JPH0195366A - Preparing device for logic circuit connection information - Google Patents

Abstract

PURPOSE:To prepare correct connection information and to simplify the processing of a simulator by providing a macro circuit block generating part, an imaginary element generating part and a connection information preparing part and executing the mutual logic circuit block automatically. CONSTITUTION:In a digital logic circuit automatic connection information 4 composed of a macro circuit block generating part 5, an imaginary element generating part 6 and a connection information preparing part 7, first, a logical circuit group, which becomes an object, is selected and replaced to one corresponding macro logic circuit block. Next, the terminal of the same signal signal name with respective signal names as a key concerning an external terminal is extracted by the generating part 6, three extracted external terminal or above exist, and then, an imaginary element having the input of the number corresponding to the output exclusive-use terminal and one output occurs. When the extracted elements from the preparing part 7 are two, the connection information to connect directly both terminals occurs, and when the elements are three or above, the connection information to connect respective terminals corresponding to the input output through the imaginary element occurs. Thus, the terminal can be automatically connected and therefore, the verifying processing can be easily executed.

Description

Detailed Description of the Invention Technical Field The present invention relates to a logic circuit connection information generation device, and more particularly to a logic circuit for generating connection information when connecting a plurality of logic circuit blocks, each of which is composed of digital circuit elements, to each other. The present invention relates to a connection information generation device.

When connecting multiple logic circuit blocks to each other, the current situation is that designers themselves check the input/output terminals between the logic circuit blocks and manually connect them. . Therefore, there are disadvantages in that it requires a lot of man-hours and also causes design errors.

In addition, input/output terminals with the same signal name are commonly connected between multiple logic circuit blocks, but in this case, there may be three or more input/output terminals with the same signal, resulting in a so-called wired connection configuration. be.

At this time, when performing logic verification (simulation) of the logic circuit using a simulator, there is a drawback that the simulator processing is complicated in the wired connection component. Furthermore, in a wired connection configuration in which three or more devices are connected, mistakes are likely to occur if the designer manually performs the connection.

Therefore, the present invention was made to solve the drawbacks of the conventional ones, and its purpose is to automatically connect logic circuit blocks to each other,
It is an object of the present invention to provide a logic circuit connection information generation device that can generate accurate connection information and simplify the processing of a simulator.

1. According to the present invention, there is provided a logic circuit connection information generation device that generates connection information when connecting a plurality of logic circuit blocks, each of which is constituted by a digital circuit element, to each other,
A storage means that stores in advance the input/output attributes and signal names of all external terminals in each of the logic circuit blocks; If there are three or more terminals, a means for generating a fictitious element that generates a fictitious element having a number of inputs and one output corresponding to the output-only terminal among these extracted external terminals; If there are two terminals, connection information for directly connecting both terminals is generated, and if there are three or more, connection information is generated to connect these three terminals via the above-mentioned aerial element.
A logic circuit connection information generation device is obtained, characterized in that it has a means for generating connection information for connecting more than one extraction terminal for input/output.

Example Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the invention.

In the figure, 1 is an input/output device, 2 is a performance processing device, 3 is a data storage device, and 4 is an automatic connection mechanism when connecting digital logic circuits, which can be realized by hardware or software. The automatic connection mechanism 4 for connecting digital logic circuits is composed of a macro circuit block generation section 5, a virtual element generation section 6, and a connection information generation section 7.

First, in each logic circuit block to be combined,
The input/output attributes (attributes indicating whether it is an input terminal or an output terminal) and signal names of all external terminals are stored in advance in a circuit information file (which can be considered as a data storage device 3).

For example, if we consider the circuit shown in Figure 3(A),
Digital logic circuit 10 consisting of digital logic elements.
Assume that there is a group of circuit sections such as 20.30. Each of the individual digital logic circuits 10, 20.30 includes a logic circuit section 15, an input terminal 11.12, and an output terminal 13.14. Input/output attribute (attribute indicating whether it is an input terminal or an output terminal)
and signal names 81 to S4 are respectively assigned and stored in the circuit information file in advance.

Furthermore, assuming that one macro logic circuit block A is constructed by combining these digital logic circuit groups 10 to 30 (see FIG. 3(B)), the digital logic circuit group that constitutes the block 8 is It is assumed that the names 10 to 30 are also stored in advance in the circuit information file.

FIG. 2 is a flowchart showing the operation of the automatic connection 814M4 when connecting digital logic circuits in the block of FIG. 1, and the operation of the embodiment of the present invention will be described with reference to FIGS. 3 to 6.

First, in step 21, a group of target logic circuits (group A in FIG. 3) is selected. In step 22, the selected logic circuit group is replaced with one corresponding macro logic circuit block A. This example is the third
It is shown in Figures (A>, (B)).

In the next step 23, it is checked whether or not another logic circuit group exists. If so, the process returns to step 21 to select the next logic circuit group and performs the same operation. If not, the process proceeds to step 24.

In this step 24, the external terminal with this signal name is extracted using the signal name on the external terminal as a key, and in the next step 25, if there are three or more external terminals with the same extracted signal name, In other words, it is determined whether there is a possibility of a wired logic connection. An example of this wired logic connection is shown in FIG. 4(A), in which external terminals having the signal name S1 are wired connected between macro logic circuit blocks A to C. .

In this case, a fictitious element 20 (see FIG. 4(B)) is generated in step 26, but in the example of FIG. An imaginary element 20 having three elements and one output is generated. Then, in the next step 27, all the input/output terminals having the same signal name S1 as this virtual element 20 are connected to the fourth
As shown in Figure (B), connection information is generated that connects via the virtual element 20 for input/output.

Here, the imaginary element 20 is an element that does not actually exist, but is an element provided for convenience in order to perform logic verification using a simulator. In the wired logic connection part, generate this fictitious element to match the input/output attributes of each terminal, connect each output terminal to the corresponding input of the fictitious element, and connect each input terminal to one output of the fictitious element. By generating connection information such as be.

In step 25, if there is no wired logic connection, there are only two external terminals with the same signal name. Connection information such that these two external terminals are directly connected to each other is generated in step 27. If the signal name of the external terminal remains, return to step 24 and proceed to steps 25~'
27 is repeated again.

A more specific example of the above processing operation is shown in the block diagrams shown in FIGS. 5 and 6. For macro logic circuit blocks A, B, and C, there are three external terminals corresponding to signal name S4. In this example, each external terminal has 84. S.

S4'' and these are interconnected by an aerial element 20.

As described above, according to the present invention, input/output terminals can be automatically connected when a plurality of macro logic circuit blocks are connected to each other, thereby reducing man-hours and mistakes. . Furthermore, the use of virtual elements in the wired logic connection section has the effect of facilitating logic verification processing.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a flowchart showing the operation of the blocks in FIG. 1, and FIGS. 3 to 6 are target logic when the blocks in FIG. FIG. 3 is a diagram showing connection modes of circuits, respectively. Explanation of symbols of main parts 5...Macro circuit block generation section 6...
・Virtual element generation unit 7...Connection information generation unit 10.20.30...Digital logic circuit group 1
1 to 14...External terminal 20---Available element

Claims (1)

[Claims] A logic circuit connection information generation device that generates connection information when connecting a plurality of logic circuit blocks each composed of digital circuit elements to each other, the logic circuit connection information generation device including input/output attributes of all external terminals in each of the logic circuit blocks. and a storage means that stores signal names in advance, and extracts terminals with the same signal name using each signal name as a key for the external terminal,
If there are three or more extracted external terminals, a fictitious element generating means for generating a fictitious element having a number of inputs and one output corresponding to the output-only terminal among these extracted external terminals; , when the number of extracted terminals is two, connection information for directly connecting both terminals is generated, and when there are three or more, these three or more extracted terminals are used for input/output via the above-mentioned aerial element. 1. A logic circuit connection information generation device comprising means for generating connection information for connection to a logic circuit.